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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17618 { 1556, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1556 = SCRATCH_LOAD_DWORD_SADDR
17622 { 1560, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1560 = SCRATCH_LOAD_SBYTE_D16_HI_SADDR
17623 { 1561, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1561 = SCRATCH_LOAD_SBYTE_D16_SADDR
17624 { 1562, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1562 = SCRATCH_LOAD_SBYTE_SADDR
17627 { 1565, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1565 = SCRATCH_LOAD_SHORT_D16_HI_SADDR
17628 { 1566, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1566 = SCRATCH_LOAD_SHORT_D16_SADDR
17630 { 1568, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1568 = SCRATCH_LOAD_SSHORT_SADDR
17634 { 1572, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1572 = SCRATCH_LOAD_UBYTE_D16_HI_SADDR
17635 { 1573, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1573 = SCRATCH_LOAD_UBYTE_D16_SADDR
17636 { 1574, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1574 = SCRATCH_LOAD_UBYTE_SADDR
17638 { 1576, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1576 = SCRATCH_LOAD_USHORT_SADDR
17641 { 1579, 6, 0, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1579 = SCRATCH_STORE_BYTE_D16_HI_SADDR
17642 { 1580, 6, 0, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1580 = SCRATCH_STORE_BYTE_SADDR
17650 { 1588, 6, 0, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1588 = SCRATCH_STORE_DWORD_SADDR
17653 { 1591, 6, 0, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1591 = SCRATCH_STORE_SHORT_D16_HI_SADDR
17654 { 1592, 6, 0, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x8080100200000ULL, ImplicitList5, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #1592 = SCRATCH_STORE_SHORT_SADDR
26662 { 10600, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10600 = SCRATCH_LOAD_DWORD_SADDR_gfx10
26663 { 10601, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10601 = SCRATCH_LOAD_DWORD_SADDR_vi
26666 { 10604, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10604 = SCRATCH_LOAD_SBYTE_D16_HI_SADDR_gfx10
26667 { 10605, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10605 = SCRATCH_LOAD_SBYTE_D16_HI_SADDR_vi
26670 { 10608, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10608 = SCRATCH_LOAD_SBYTE_D16_SADDR_gfx10
26671 { 10609, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10609 = SCRATCH_LOAD_SBYTE_D16_SADDR_vi
26674 { 10612, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10612 = SCRATCH_LOAD_SBYTE_SADDR_gfx10
26675 { 10613, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10613 = SCRATCH_LOAD_SBYTE_SADDR_vi
26678 { 10616, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10616 = SCRATCH_LOAD_SHORT_D16_HI_SADDR_gfx10
26679 { 10617, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10617 = SCRATCH_LOAD_SHORT_D16_HI_SADDR_vi
26682 { 10620, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10620 = SCRATCH_LOAD_SHORT_D16_SADDR_gfx10
26683 { 10621, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10621 = SCRATCH_LOAD_SHORT_D16_SADDR_vi
26686 { 10624, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10624 = SCRATCH_LOAD_SSHORT_SADDR_gfx10
26687 { 10625, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10625 = SCRATCH_LOAD_SSHORT_SADDR_vi
26690 { 10628, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10628 = SCRATCH_LOAD_UBYTE_D16_HI_SADDR_gfx10
26691 { 10629, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10629 = SCRATCH_LOAD_UBYTE_D16_HI_SADDR_vi
26694 { 10632, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10632 = SCRATCH_LOAD_UBYTE_D16_SADDR_gfx10
26695 { 10633, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10633 = SCRATCH_LOAD_UBYTE_D16_SADDR_vi
26698 { 10636, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10636 = SCRATCH_LOAD_UBYTE_SADDR_gfx10
26699 { 10637, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10637 = SCRATCH_LOAD_UBYTE_SADDR_vi
26702 { 10640, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10640 = SCRATCH_LOAD_USHORT_SADDR_gfx10
26703 { 10641, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10641 = SCRATCH_LOAD_USHORT_SADDR_vi
26706 { 10644, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10644 = SCRATCH_STORE_BYTE_D16_HI_SADDR_gfx10
26707 { 10645, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10645 = SCRATCH_STORE_BYTE_D16_HI_SADDR_vi
26710 { 10648, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10648 = SCRATCH_STORE_BYTE_SADDR_gfx10
26711 { 10649, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10649 = SCRATCH_STORE_BYTE_SADDR_vi
26726 { 10664, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10664 = SCRATCH_STORE_DWORD_SADDR_gfx10
26727 { 10665, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10665 = SCRATCH_STORE_DWORD_SADDR_vi
26730 { 10668, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10668 = SCRATCH_STORE_SHORT_D16_HI_SADDR_gfx10
26731 { 10669, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10669 = SCRATCH_STORE_SHORT_D16_HI_SADDR_vi
26734 { 10672, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10672 = SCRATCH_STORE_SHORT_SADDR_gfx10
26735 { 10673, 6, 0, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #10673 = SCRATCH_STORE_SHORT_SADDR_vi