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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17442 { 1380, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1380 = GLOBAL_ATOMIC_ADD_X2_SADDR_RTN
17450 { 1388, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1388 = GLOBAL_ATOMIC_AND_X2_SADDR_RTN
17466 { 1404, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1404 = GLOBAL_ATOMIC_DEC_X2_SADDR_RTN
17474 { 1412, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x28080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1412 = GLOBAL_ATOMIC_FCMPSWAP_X2_SADDR_RTN
17482 { 1420, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x28080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1420 = GLOBAL_ATOMIC_FMAX_X2_SADDR_RTN
17490 { 1428, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x28080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1428 = GLOBAL_ATOMIC_FMIN_X2_SADDR_RTN
17498 { 1436, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1436 = GLOBAL_ATOMIC_INC_X2_SADDR_RTN
17506 { 1444, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1444 = GLOBAL_ATOMIC_OR_X2_SADDR_RTN
17516 { 1454, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1454 = GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN
17524 { 1462, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1462 = GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN
17532 { 1470, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1470 = GLOBAL_ATOMIC_SUB_X2_SADDR_RTN
17540 { 1478, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1478 = GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN
17548 { 1486, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1486 = GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN
17556 { 1494, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1494 = GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN
17564 { 1502, 6, 1, 0, 3, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::HasPostISelHook), 0x8080100200000ULL, ImplicitList2, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #1502 = GLOBAL_ATOMIC_XOR_X2_SADDR_RTN
22231 { 6169, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6169 = GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_gfx10
22232 { 6170, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6170 = GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_vi
22247 { 6185, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6185 = GLOBAL_ATOMIC_AND_X2_SADDR_RTN_gfx10
22248 { 6186, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6186 = GLOBAL_ATOMIC_AND_X2_SADDR_RTN_vi
22279 { 6217, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6217 = GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_gfx10
22280 { 6218, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6218 = GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_vi
22291 { 6229, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6229 = GLOBAL_ATOMIC_FCMPSWAP_X2_SADDR_RTN_gfx10
22299 { 6237, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6237 = GLOBAL_ATOMIC_FMAX_X2_SADDR_RTN_gfx10
22307 { 6245, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x28080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6245 = GLOBAL_ATOMIC_FMIN_X2_SADDR_RTN_gfx10
22319 { 6257, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6257 = GLOBAL_ATOMIC_INC_X2_SADDR_RTN_gfx10
22320 { 6258, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6258 = GLOBAL_ATOMIC_INC_X2_SADDR_RTN_vi
22335 { 6273, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6273 = GLOBAL_ATOMIC_OR_X2_SADDR_RTN_gfx10
22336 { 6274, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6274 = GLOBAL_ATOMIC_OR_X2_SADDR_RTN_vi
22353 { 6291, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6291 = GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_gfx10
22354 { 6292, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6292 = GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_vi
22369 { 6307, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6307 = GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_gfx10
22370 { 6308, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6308 = GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_vi
22385 { 6323, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6323 = GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_gfx10
22386 { 6324, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6324 = GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_vi
22401 { 6339, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6339 = GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_gfx10
22402 { 6340, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6340 = GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_vi
22417 { 6355, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6355 = GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_gfx10
22418 { 6356, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6356 = GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_vi
22433 { 6371, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6371 = GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_gfx10
22434 { 6372, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6372 = GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_vi
22449 { 6387, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6387 = GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_gfx10
22450 { 6388, 6, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080100200000ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #6388 = GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_vi