|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17663 { 1601, 5, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo150, -1 ,nullptr }, // Inst #1601 = SI_INDIRECT_DST_V1
17664 { 1602, 5, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo151, -1 ,nullptr }, // Inst #1602 = SI_INDIRECT_DST_V16
17665 { 1603, 5, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo152, -1 ,nullptr }, // Inst #1603 = SI_INDIRECT_DST_V2
17666 { 1604, 5, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo153, -1 ,nullptr }, // Inst #1604 = SI_INDIRECT_DST_V4
17667 { 1605, 5, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo154, -1 ,nullptr }, // Inst #1605 = SI_INDIRECT_DST_V8
17668 { 1606, 4, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo155, -1 ,nullptr }, // Inst #1606 = SI_INDIRECT_SRC_V1
17669 { 1607, 4, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo156, -1 ,nullptr }, // Inst #1607 = SI_INDIRECT_SRC_V16
17670 { 1608, 4, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo157, -1 ,nullptr }, // Inst #1608 = SI_INDIRECT_SRC_V2
17671 { 1609, 4, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo158, -1 ,nullptr }, // Inst #1609 = SI_INDIRECT_SRC_V4
17672 { 1610, 4, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x2ULL, ImplicitList2, ImplicitList8, OperandInfo159, -1 ,nullptr }, // Inst #1610 = SI_INDIRECT_SRC_V8