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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenInstrInfo.inc17676 { 1614, 1, 0, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::CheapAsAMove), 0x1ULL, nullptr, ImplicitList10, OperandInfo161, -1 ,nullptr }, // Inst #1614 = SI_INIT_M0
18070 { 2008, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, nullptr, OperandInfo194, -1 ,nullptr }, // Inst #2008 = S_MOVRELD_B32
18071 { 2009, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, nullptr, OperandInfo198, -1 ,nullptr }, // Inst #2009 = S_MOVRELD_B64
18072 { 2010, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, nullptr, OperandInfo194, -1 ,nullptr }, // Inst #2010 = S_MOVRELSD_2_B32
18073 { 2011, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, nullptr, OperandInfo194, -1 ,nullptr }, // Inst #2011 = S_MOVRELS_B32
18074 { 2012, 2, 1, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, nullptr, OperandInfo198, -1 ,nullptr }, // Inst #2012 = S_MOVRELS_B64
18129 { 2067, 1, 0, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, ImplicitList10, OperandInfo161, -1 ,nullptr }, // Inst #2067 = S_SET_GPR_IDX_IDX
18129 { 2067, 1, 0, 4, 1, 0|(1ULL<<MCID::Pseudo), 0x5ULL, ImplicitList10, ImplicitList10, OperandInfo161, -1 ,nullptr }, // Inst #2067 = S_SET_GPR_IDX_IDX
19921 { 3859, 2, 1, 4, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x82ULL, ImplicitList10, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #3859 = V_MOVRELSD_2_B32_e32
19922 { 3860, 2, 1, 8, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::HasPostISelHook)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x402ULL, ImplicitList10, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #3860 = V_MOVRELSD_2_B32_e64
20159 { 4097, 4, 2, 4, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ExtraSrcRegAllocReq), 0x82ULL, ImplicitList10, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4097 = V_SWAPREL_B32
27686 { 11624, 1, 0, 4, 1, 0, 0x41ULL, nullptr, ImplicitList10, OperandInfo3, -1 ,nullptr }, // Inst #11624 = S_SET_GPR_IDX_MODE
27688 { 11626, 2, 0, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10000000011ULL, ImplicitList10, ImplicitList10, OperandInfo160, -1 ,nullptr }, // Inst #11626 = S_SET_GPR_IDX_ON
27688 { 11626, 2, 0, 4, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10000000011ULL, ImplicitList10, ImplicitList10, OperandInfo160, -1 ,nullptr }, // Inst #11626 = S_SET_GPR_IDX_ON
30695 { 14633, 2, 1, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x82ULL, ImplicitList10, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14633 = V_MOVRELSD_2_B32_e32_gfx10
30696 { 14634, 2, 1, 8, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402ULL, ImplicitList10, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14634 = V_MOVRELSD_2_B32_e64_gfx10
31263 { 15201, 4, 2, 4, 2, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x82ULL, ImplicitList10, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #15201 = V_SWAPREL_B32_gfx10