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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 226 BuildMI(*BB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), DstReg)
422 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), Dst1Reg)
733 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CCReg)
1104 MachineInstr *CopySCC = BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), AMDGPU::SCC)
1246 BuildMI(MBB, I, DL, TII.get(AMDGPU::COPY), TmpReg)
1248 BuildMI(MBB, I, DL, TII.get(AMDGPU::COPY), AMDGPU::SCC)
1382 BuildMI(*MBB, I, DL, TII.get(AMDGPU::COPY), AMDGPU::SCC)
1591 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), CondPhysReg)
1656 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), LoReg)
1658 BuildMI(*BB, &I, DL, TII.get(AMDGPU::COPY), HiReg)
lib/Target/AMDGPU/GCNDPPCombine.cpp 143 case AMDGPU::COPY:
lib/Target/AMDGPU/SIFixSGPRCopies.cpp 300 BuildMI(*MI.getParent(), &MI, MI.getDebugLoc(), TII->get(AMDGPU::COPY),
308 AMDGPU::V_ACCVGPR_WRITE_B32 : AMDGPU::COPY;
327 if (Copy->getOpcode() != AMDGPU::COPY)
607 case AMDGPU::COPY:
741 TII->get(AMDGPU::COPY), AMDGPU::M0)
lib/Target/AMDGPU/SIFixVGPRCopies.cpp 57 case AMDGPU::COPY:
lib/Target/AMDGPU/SIFixupVectorISel.cpp 100 case AMDGPU::COPY:
lib/Target/AMDGPU/SIFoldOperands.cpp 263 BuildMI(*MBB, MI, MI->getDebugLoc(), TII.get(AMDGPU::COPY), Dst1.getReg())
656 if (MovOp == AMDGPU::COPY)
735 BuildMI(MBB, UseMI, DL, TII->get(AMDGPU::COPY), Tmp).add(*Def);
746 BuildMI(MBB, UseMI, DL, TII->get(AMDGPU::COPY), Vgpr).add(*Def);
811 UseMI->setDesc(TII->get(AMDGPU::COPY));
996 MI->setDesc(TII->get(UseCopy ? AMDGPU::COPY : AMDGPU::V_MOV_B32_e32));
1035 mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
1056 mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
1070 mutateCopyOp(*MI, TII->get(AMDGPU::COPY));
1095 TII->get(Src0->isReg() ? (unsigned)AMDGPU::COPY : getMovOpc(false));
lib/Target/AMDGPU/SIFrameLowering.cpp 254 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), AMDGPU::FLAT_SCR_LO)
489 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchRsrcReg)
501 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchWaveOffsetReg)
506 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), ScratchRsrcReg)
522 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), SPReg)
712 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FuncInfo->SGPRForFPSaveRestoreCopy)
807 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FramePtrReg)
855 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), FuncInfo->getFrameOffsetReg())
lib/Target/AMDGPU/SIISelLowering.cpp 3764 BuildMI(*BB, MI, DL, TII->get(AMDGPU::COPY), SrcCondCopy)
lib/Target/AMDGPU/SIInstrInfo.cpp 699 AMDGPU::V_ACCVGPR_WRITE_B32 : AMDGPU::COPY;
828 BuildMI(MBB, I, DL, get(AMDGPU::COPY), SReg)
871 BuildMI(MBB, I, DL, get(AMDGPU::COPY), SReg)
885 BuildMI(MBB, I, DL, get(AMDGPU::COPY), SReg)
969 return AMDGPU::COPY;
977 return AMDGPU::COPY;
2266 case AMDGPU::COPY:
2332 if (Opc == AMDGPU::COPY) {
3731 case AMDGPU::COPY: return AMDGPU::COPY;
3731 case AMDGPU::COPY: return AMDGPU::COPY;
3741 AMDGPU::COPY : AMDGPU::V_MOV_B32_e32;
3836 Opcode = AMDGPU::COPY;
4290 BuildMI(InsertMBB, I, DL, get(AMDGPU::COPY), DstReg).add(Op);
5627 case AMDGPU::COPY:
5742 case AMDGPU::COPY:
6184 return !MI.isTerminator() && MI.getOpcode() != AMDGPU::COPY &&
6427 case AMDGPU::COPY:
lib/Target/AMDGPU/SILowerControlFlow.cpp 219 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg)
295 BuildMI(MBB, Start, DL, TII->get(AMDGPU::COPY), CopyReg)
lib/Target/AMDGPU/SILowerI1Copies.cpp 506 if (MI.getOpcode() != AMDGPU::COPY)
580 if (IncomingDef->getOpcode() == AMDGPU::COPY) {
677 MI.getOpcode() != AMDGPU::COPY)
741 if (MI->getOpcode() != AMDGPU::COPY)
824 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(CurReg);
826 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg).addReg(ExecReg);
860 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg)
863 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), DstReg)
lib/Target/AMDGPU/SIMachineScheduler.cpp 1873 } else if (SU->getInstr()->getOpcode() == AMDGPU::COPY) {
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp 61 case AMDGPU::COPY:
79 case AMDGPU::COPY:
184 MI.setDesc(TII.get(AMDGPU::COPY));
lib/Target/AMDGPU/SIRegisterInfo.cpp 854 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::COPY), AMDGPU::M0)
944 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::COPY), AMDGPU::M0)
1170 BuildMI(*MBB, MI, DL, TII->get(AMDGPU::COPY), ResultReg)
lib/Target/AMDGPU/SIShrinkInstructions.cpp 458 MovT.getOpcode() == AMDGPU::COPY);
481 MovY.getOpcode() != AMDGPU::COPY) ||
510 I->getOpcode() != AMDGPU::COPY) ||
591 MI.getOpcode() == AMDGPU::COPY)) {
lib/Target/AMDGPU/SIWholeQuadMode.cpp 562 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), SaveReg)
565 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), AMDGPU::SCC)
655 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), Exec)
845 BuildMI(*MI->getParent(), MI, DL, TII->get(AMDGPU::COPY), Dest)
871 MI->setDesc(TII->get(AMDGPU::COPY));
905 TII->get(AMDGPU::COPY), LiveMaskReg)