reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 5658   case MCK_VSrcB16: {
10093   case MCK_VSrcB16: return "MCK_VSrcB16";
18864   { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
18876   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
18960   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
18961   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
18962   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18963   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18964   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
18965   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
18966   { 13852 /* v_cmp_eq_i16_e32 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
18967   { 13852 /* v_cmp_eq_i16_e32 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
18992   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
18993   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
18994   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18995   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18996   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
18997   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
18998   { 13942 /* v_cmp_eq_u16_e32 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
18999   { 13942 /* v_cmp_eq_u16_e32 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19056   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19057   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19058   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19059   { 14115 /* v_cmp_f_i16_e32 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19084   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19085   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19086   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19087   { 14199 /* v_cmp_f_u16_e32 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19144   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19145   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19146   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19147   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19148   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19149   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19150   { 14374 /* v_cmp_ge_i16_e32 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19151   { 14374 /* v_cmp_ge_i16_e32 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19176   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19177   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19178   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19179   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19180   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19181   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19182   { 14464 /* v_cmp_ge_u16_e32 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19183   { 14464 /* v_cmp_ge_u16_e32 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19240   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19241   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19242   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19243   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19244   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19245   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19246   { 14644 /* v_cmp_gt_i16_e32 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19247   { 14644 /* v_cmp_gt_i16_e32 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19272   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19273   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19274   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19275   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19276   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19277   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19278   { 14734 /* v_cmp_gt_u16_e32 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19279   { 14734 /* v_cmp_gt_u16_e32 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19336   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19337   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19338   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19339   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19340   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19341   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19342   { 14914 /* v_cmp_le_i16_e32 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19343   { 14914 /* v_cmp_le_i16_e32 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19368   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19369   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19370   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19371   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19372   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19373   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19374   { 15004 /* v_cmp_le_u16_e32 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19375   { 15004 /* v_cmp_le_u16_e32 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19464   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19465   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19466   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19467   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19468   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19469   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19470   { 15274 /* v_cmp_lt_i16_e32 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19471   { 15274 /* v_cmp_lt_i16_e32 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19496   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19497   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19498   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19499   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19500   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19501   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19502   { 15364 /* v_cmp_lt_u16_e32 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19503   { 15364 /* v_cmp_lt_u16_e32 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19528   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19529   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19530   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19531   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19532   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19533   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19534   { 15454 /* v_cmp_ne_i16_e32 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19535   { 15454 /* v_cmp_ne_i16_e32 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19560   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19561   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19562   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19563   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19564   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19565   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19566   { 15544 /* v_cmp_ne_u16_e32 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19567   { 15544 /* v_cmp_ne_u16_e32 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19816   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19817   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19818   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19819   { 16293 /* v_cmp_t_i16_e32 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19844   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19845   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19846   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
19847   { 16377 /* v_cmp_t_u16_e32 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20244   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20245   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20246   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20247   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20248   { 18997 /* v_cmpx_eq_i16_e32 */, AMDGPU::V_CMPX_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20249   { 18997 /* v_cmpx_eq_i16_e32 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20270   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20271   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20272   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20273   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20274   { 19093 /* v_cmpx_eq_u16_e32 */, AMDGPU::V_CMPX_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20275   { 19093 /* v_cmpx_eq_u16_e32 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20322   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20323   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20324   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20325   { 19278 /* v_cmpx_f_i16_e32 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20346   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20347   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20348   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20349   { 19368 /* v_cmpx_f_u16_e32 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20396   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20397   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20398   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20399   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20400   { 19555 /* v_cmpx_ge_i16_e32 */, AMDGPU::V_CMPX_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20401   { 19555 /* v_cmpx_ge_i16_e32 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20422   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20423   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20424   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20425   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20426   { 19651 /* v_cmpx_ge_u16_e32 */, AMDGPU::V_CMPX_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20427   { 19651 /* v_cmpx_ge_u16_e32 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20474   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20475   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20476   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20477   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20478   { 19843 /* v_cmpx_gt_i16_e32 */, AMDGPU::V_CMPX_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20479   { 19843 /* v_cmpx_gt_i16_e32 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20500   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20501   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20502   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20503   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20504   { 19939 /* v_cmpx_gt_u16_e32 */, AMDGPU::V_CMPX_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20505   { 19939 /* v_cmpx_gt_u16_e32 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20552   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20553   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20554   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20555   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20556   { 20131 /* v_cmpx_le_i16_e32 */, AMDGPU::V_CMPX_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20557   { 20131 /* v_cmpx_le_i16_e32 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20578   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20579   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20580   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20581   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20582   { 20227 /* v_cmpx_le_u16_e32 */, AMDGPU::V_CMPX_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20583   { 20227 /* v_cmpx_le_u16_e32 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20656   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20657   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20658   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20659   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20660   { 20515 /* v_cmpx_lt_i16_e32 */, AMDGPU::V_CMPX_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20661   { 20515 /* v_cmpx_lt_i16_e32 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20682   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20683   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20684   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20685   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20686   { 20611 /* v_cmpx_lt_u16_e32 */, AMDGPU::V_CMPX_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20687   { 20611 /* v_cmpx_lt_u16_e32 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20708   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20709   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20710   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20711   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20712   { 20707 /* v_cmpx_ne_i16_e32 */, AMDGPU::V_CMPX_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20713   { 20707 /* v_cmpx_ne_i16_e32 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20734   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20735   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20736   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20737   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20738   { 20803 /* v_cmpx_ne_u16_e32 */, AMDGPU::V_CMPX_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20739   { 20803 /* v_cmpx_ne_u16_e32 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20942   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20943   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20944   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20945   { 21600 /* v_cmpx_t_i16_e32 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20966   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_isGFX8GFX9_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20967   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20968   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB16, MCK_VGPR_32 }, },
20969   { 21690 /* v_cmpx_t_u16_e32 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
21059   { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e32_gfx10, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16 }, },
21060   { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e32_vi, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16 }, },
21061   { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e32_gfx10, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16 }, },
21062   { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e32_vi, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16 }, },
21217   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21222   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21245   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21250   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21261   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21266   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21303   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21385   { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21411   { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21455   { 13281 /* v_add_i16 */, AMDGPU::V_ADD_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
21455   { 13281 /* v_add_i16 */, AMDGPU::V_ADD_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
21460   { 13316 /* v_add_nc_i16 */, AMDGPU::V_ADD_NC_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
21460   { 13316 /* v_add_nc_i16 */, AMDGPU::V_ADD_NC_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
21462   { 13342 /* v_add_nc_u16 */, AMDGPU::V_ADD_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21462   { 13342 /* v_add_nc_u16 */, AMDGPU::V_ADD_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21464   { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21464   { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21485   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21485   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21486   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21486   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21537   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21537   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21538   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21538   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21545   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21545   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21546   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21546   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21561   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21561   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21568   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21568   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21583   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21583   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21584   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21584   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21591   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21591   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21592   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21592   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21607   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21607   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21608   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21608   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21615   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21615   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21616   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21616   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21631   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21631   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21632   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21632   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21639   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21639   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21640   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21640   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21663   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21663   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21664   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21664   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21671   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21671   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21672   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21672   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21679   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21679   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21680   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21680   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21687   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21687   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21688   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21688   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21751   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21751   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21758   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21758   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21861   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21861   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21862   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21862   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21869   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21869   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21870   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21870   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21885   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21885   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21892   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21892   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21907   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21907   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21908   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21908   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21915   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21915   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21916   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21916   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21931   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21931   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21932   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21932   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21939   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21939   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21940   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21940   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21955   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21955   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21956   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21956   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21963   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21963   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21964   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21964   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21987   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21987   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21988   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21988   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21995   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21995   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21996   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21996   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22003   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22003   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22004   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22004   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22011   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22011   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22012   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22012   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22075   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22075   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22082   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22082   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22134   { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22135   { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22136   { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22137   { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22371   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22371   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22372   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22372   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22380   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22380   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22381   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22381   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22398   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22398   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22398   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22399   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22399   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22399   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22400   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22400   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22400   { 23752 /* v_mad_i16 */, AMDGPU::V_MAD_I16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22401   { 23762 /* v_mad_i32_i16 */, AMDGPU::V_MAD_I32_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22401   { 23762 /* v_mad_i32_i16 */, AMDGPU::V_MAD_I32_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22402   { 23762 /* v_mad_i32_i16 */, AMDGPU::V_MAD_I32_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22402   { 23762 /* v_mad_i32_i16 */, AMDGPU::V_MAD_I32_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22413   { 23838 /* v_mad_legacy_i16 */, AMDGPU::V_MAD_LEGACY_I16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22413   { 23838 /* v_mad_legacy_i16 */, AMDGPU::V_MAD_LEGACY_I16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22413   { 23838 /* v_mad_legacy_i16 */, AMDGPU::V_MAD_LEGACY_I16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22414   { 23855 /* v_mad_legacy_u16 */, AMDGPU::V_MAD_LEGACY_U16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22414   { 23855 /* v_mad_legacy_u16 */, AMDGPU::V_MAD_LEGACY_U16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22414   { 23855 /* v_mad_legacy_u16 */, AMDGPU::V_MAD_LEGACY_U16_gfx9, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22418   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22418   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22418   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmClampSI }, },
22419   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22419   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22419   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22420   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22420   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22420   { 23918 /* v_mad_u16 */, AMDGPU::V_MAD_U16_gfx9_gfx9, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX9Only, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22421   { 23928 /* v_mad_u32_u16 */, AMDGPU::V_MAD_U32_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22421   { 23928 /* v_mad_u32_u16 */, AMDGPU::V_MAD_U32_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22422   { 23928 /* v_mad_u32_u16 */, AMDGPU::V_MAD_U32_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22422   { 23928 /* v_mad_u32_u16 */, AMDGPU::V_MAD_U32_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmClampSI }, },
22434   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22434   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22434   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22435   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22435   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22435   { 24040 /* v_max3_i16 */, AMDGPU::V_MAX3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22439   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22439   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22439   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22440   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22440   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22440   { 24062 /* v_max3_u16 */, AMDGPU::V_MAX3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22452   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22452   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22453   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22453   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22458   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22458   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22459   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22459   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22474   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22474   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22474   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22475   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22475   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22475   { 24231 /* v_med3_i16 */, AMDGPU::V_MED3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22479   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22479   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22479   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22480   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22480   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22480   { 24253 /* v_med3_u16 */, AMDGPU::V_MED3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22509   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22509   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22509   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22510   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22510   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22510   { 24731 /* v_min3_i16 */, AMDGPU::V_MIN3_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22514   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22514   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22514   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22515   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22515   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22515   { 24753 /* v_min3_u16 */, AMDGPU::V_MIN3_U16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22527   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22527   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22528   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22528   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22533   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22533   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22534   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22534   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22592   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22592   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22593   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22593   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22734   { 26008 /* v_sub_i16 */, AMDGPU::V_SUB_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22734   { 26008 /* v_sub_i16 */, AMDGPU::V_SUB_I16_vi, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22737   { 26028 /* v_sub_nc_i16 */, AMDGPU::V_SUB_NC_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22737   { 26028 /* v_sub_nc_i16 */, AMDGPU::V_SUB_NC_I16_gfx10, ConvertCustom_cvtVOP3OpSel, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16, MCK_ImmOpSel, MCK_ImmClampSI }, },
22739   { 26054 /* v_sub_nc_u16 */, AMDGPU::V_SUB_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22739   { 26054 /* v_sub_nc_u16 */, AMDGPU::V_SUB_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22741   { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22741   { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22768   { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22768   { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },