reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5074 case MCK_SGPR_32: 6364 case AMDGPU::SGPR0: OpKind = MCK_SGPR_32; break; 6365 case AMDGPU::SGPR1: OpKind = MCK_SGPR_32; break; 6366 case AMDGPU::SGPR2: OpKind = MCK_SGPR_32; break; 6367 case AMDGPU::SGPR3: OpKind = MCK_SGPR_32; break; 6368 case AMDGPU::SGPR4: OpKind = MCK_SGPR_32; break; 6369 case AMDGPU::SGPR5: OpKind = MCK_SGPR_32; break; 6370 case AMDGPU::SGPR6: OpKind = MCK_SGPR_32; break; 6371 case AMDGPU::SGPR7: OpKind = MCK_SGPR_32; break; 6372 case AMDGPU::SGPR8: OpKind = MCK_SGPR_32; break; 6373 case AMDGPU::SGPR9: OpKind = MCK_SGPR_32; break; 6374 case AMDGPU::SGPR10: OpKind = MCK_SGPR_32; break; 6375 case AMDGPU::SGPR11: OpKind = MCK_SGPR_32; break; 6376 case AMDGPU::SGPR12: OpKind = MCK_SGPR_32; break; 6377 case AMDGPU::SGPR13: OpKind = MCK_SGPR_32; break; 6378 case AMDGPU::SGPR14: OpKind = MCK_SGPR_32; break; 6379 case AMDGPU::SGPR15: OpKind = MCK_SGPR_32; break; 6380 case AMDGPU::SGPR16: OpKind = MCK_SGPR_32; break; 6381 case AMDGPU::SGPR17: OpKind = MCK_SGPR_32; break; 6382 case AMDGPU::SGPR18: OpKind = MCK_SGPR_32; break; 6383 case AMDGPU::SGPR19: OpKind = MCK_SGPR_32; break; 6384 case AMDGPU::SGPR20: OpKind = MCK_SGPR_32; break; 6385 case AMDGPU::SGPR21: OpKind = MCK_SGPR_32; break; 6386 case AMDGPU::SGPR22: OpKind = MCK_SGPR_32; break; 6387 case AMDGPU::SGPR23: OpKind = MCK_SGPR_32; break; 6388 case AMDGPU::SGPR24: OpKind = MCK_SGPR_32; break; 6389 case AMDGPU::SGPR25: OpKind = MCK_SGPR_32; break; 6390 case AMDGPU::SGPR26: OpKind = MCK_SGPR_32; break; 6391 case AMDGPU::SGPR27: OpKind = MCK_SGPR_32; break; 6392 case AMDGPU::SGPR28: OpKind = MCK_SGPR_32; break; 6393 case AMDGPU::SGPR29: OpKind = MCK_SGPR_32; break; 6394 case AMDGPU::SGPR30: OpKind = MCK_SGPR_32; break; 6395 case AMDGPU::SGPR31: OpKind = MCK_SGPR_32; break; 6396 case AMDGPU::SGPR32: OpKind = MCK_SGPR_32; break; 6397 case AMDGPU::SGPR33: OpKind = MCK_SGPR_32; break; 6398 case AMDGPU::SGPR34: OpKind = MCK_SGPR_32; break; 6399 case AMDGPU::SGPR35: OpKind = MCK_SGPR_32; break; 6400 case AMDGPU::SGPR36: OpKind = MCK_SGPR_32; break; 6401 case AMDGPU::SGPR37: OpKind = MCK_SGPR_32; break; 6402 case AMDGPU::SGPR38: OpKind = MCK_SGPR_32; break; 6403 case AMDGPU::SGPR39: OpKind = MCK_SGPR_32; break; 6404 case AMDGPU::SGPR40: OpKind = MCK_SGPR_32; break; 6405 case AMDGPU::SGPR41: OpKind = MCK_SGPR_32; break; 6406 case AMDGPU::SGPR42: OpKind = MCK_SGPR_32; break; 6407 case AMDGPU::SGPR43: OpKind = MCK_SGPR_32; break; 6408 case AMDGPU::SGPR44: OpKind = MCK_SGPR_32; break; 6409 case AMDGPU::SGPR45: OpKind = MCK_SGPR_32; break; 6410 case AMDGPU::SGPR46: OpKind = MCK_SGPR_32; break; 6411 case AMDGPU::SGPR47: OpKind = MCK_SGPR_32; break; 6412 case AMDGPU::SGPR48: OpKind = MCK_SGPR_32; break; 6413 case AMDGPU::SGPR49: OpKind = MCK_SGPR_32; break; 6414 case AMDGPU::SGPR50: OpKind = MCK_SGPR_32; break; 6415 case AMDGPU::SGPR51: OpKind = MCK_SGPR_32; break; 6416 case AMDGPU::SGPR52: OpKind = MCK_SGPR_32; break; 6417 case AMDGPU::SGPR53: OpKind = MCK_SGPR_32; break; 6418 case AMDGPU::SGPR54: OpKind = MCK_SGPR_32; break; 6419 case AMDGPU::SGPR55: OpKind = MCK_SGPR_32; break; 6420 case AMDGPU::SGPR56: OpKind = MCK_SGPR_32; break; 6421 case AMDGPU::SGPR57: OpKind = MCK_SGPR_32; break; 6422 case AMDGPU::SGPR58: OpKind = MCK_SGPR_32; break; 6423 case AMDGPU::SGPR59: OpKind = MCK_SGPR_32; break; 6424 case AMDGPU::SGPR60: OpKind = MCK_SGPR_32; break; 6425 case AMDGPU::SGPR61: OpKind = MCK_SGPR_32; break; 6426 case AMDGPU::SGPR62: OpKind = MCK_SGPR_32; break; 6427 case AMDGPU::SGPR63: OpKind = MCK_SGPR_32; break; 6428 case AMDGPU::SGPR64: OpKind = MCK_SGPR_32; break; 6429 case AMDGPU::SGPR65: OpKind = MCK_SGPR_32; break; 6430 case AMDGPU::SGPR66: OpKind = MCK_SGPR_32; break; 6431 case AMDGPU::SGPR67: OpKind = MCK_SGPR_32; break; 6432 case AMDGPU::SGPR68: OpKind = MCK_SGPR_32; break; 6433 case AMDGPU::SGPR69: OpKind = MCK_SGPR_32; break; 6434 case AMDGPU::SGPR70: OpKind = MCK_SGPR_32; break; 6435 case AMDGPU::SGPR71: OpKind = MCK_SGPR_32; break; 6436 case AMDGPU::SGPR72: OpKind = MCK_SGPR_32; break; 6437 case AMDGPU::SGPR73: OpKind = MCK_SGPR_32; break; 6438 case AMDGPU::SGPR74: OpKind = MCK_SGPR_32; break; 6439 case AMDGPU::SGPR75: OpKind = MCK_SGPR_32; break; 6440 case AMDGPU::SGPR76: OpKind = MCK_SGPR_32; break; 6441 case AMDGPU::SGPR77: OpKind = MCK_SGPR_32; break; 6442 case AMDGPU::SGPR78: OpKind = MCK_SGPR_32; break; 6443 case AMDGPU::SGPR79: OpKind = MCK_SGPR_32; break; 6444 case AMDGPU::SGPR80: OpKind = MCK_SGPR_32; break; 6445 case AMDGPU::SGPR81: OpKind = MCK_SGPR_32; break; 6446 case AMDGPU::SGPR82: OpKind = MCK_SGPR_32; break; 6447 case AMDGPU::SGPR83: OpKind = MCK_SGPR_32; break; 6448 case AMDGPU::SGPR84: OpKind = MCK_SGPR_32; break; 6449 case AMDGPU::SGPR85: OpKind = MCK_SGPR_32; break; 6450 case AMDGPU::SGPR86: OpKind = MCK_SGPR_32; break; 6451 case AMDGPU::SGPR87: OpKind = MCK_SGPR_32; break; 6452 case AMDGPU::SGPR88: OpKind = MCK_SGPR_32; break; 6453 case AMDGPU::SGPR89: OpKind = MCK_SGPR_32; break; 6454 case AMDGPU::SGPR90: OpKind = MCK_SGPR_32; break; 6455 case AMDGPU::SGPR91: OpKind = MCK_SGPR_32; break; 6456 case AMDGPU::SGPR92: OpKind = MCK_SGPR_32; break; 6457 case AMDGPU::SGPR93: OpKind = MCK_SGPR_32; break; 6458 case AMDGPU::SGPR94: OpKind = MCK_SGPR_32; break; 6459 case AMDGPU::SGPR95: OpKind = MCK_SGPR_32; break; 6460 case AMDGPU::SGPR96: OpKind = MCK_SGPR_32; break; 6461 case AMDGPU::SGPR97: OpKind = MCK_SGPR_32; break; 6462 case AMDGPU::SGPR98: OpKind = MCK_SGPR_32; break; 6463 case AMDGPU::SGPR99: OpKind = MCK_SGPR_32; break; 6464 case AMDGPU::SGPR100: OpKind = MCK_SGPR_32; break; 6465 case AMDGPU::SGPR101: OpKind = MCK_SGPR_32; break; 6466 case AMDGPU::SGPR102: OpKind = MCK_SGPR_32; break; 6467 case AMDGPU::SGPR103: OpKind = MCK_SGPR_32; break; 6468 case AMDGPU::SGPR104: OpKind = MCK_SGPR_32; break; 6469 case AMDGPU::SGPR105: OpKind = MCK_SGPR_32; break; 10017 case MCK_SGPR_32: return "MCK_SGPR_32";