reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 5174   case MCK_ImmSMRDOffset20:
 5525   case MCK_ImmSMRDOffset20: {
10074   case MCK_ImmSMRDOffset20: return "MCK_ImmSMRDOffset20";
17596   { 8081 /* s_atc_probe */, AMDGPU::S_ATC_PROBE_IMM_gfx10, Convert__Imm1_0__Reg1_1__ImmSMRDOffset201_2, AMFBS_isGFX8Plus_isGFX10Plus, { MCK_Imm, MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
17597   { 8081 /* s_atc_probe */, AMDGPU::S_ATC_PROBE_IMM_vi, Convert__Imm1_0__Reg1_1__ImmSMRDOffset201_2, AMFBS_isGFX8Plus_isGFX8GFX9, { MCK_Imm, MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
17600   { 8093 /* s_atc_probe_buffer */, AMDGPU::S_ATC_PROBE_BUFFER_IMM_gfx10, Convert__Imm1_0__Reg1_1__ImmSMRDOffset201_2, AMFBS_isGFX8Plus_isGFX10Plus, { MCK_Imm, MCK_SReg_128, MCK_ImmSMRDOffset20 }, },
17601   { 8093 /* s_atc_probe_buffer */, AMDGPU::S_ATC_PROBE_BUFFER_IMM_vi, Convert__Imm1_0__Reg1_1__ImmSMRDOffset201_2, AMFBS_isGFX8Plus_isGFX8GFX9, { MCK_Imm, MCK_SReg_128, MCK_ImmSMRDOffset20 }, },
17604   { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17605   { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17608   { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17609   { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17612   { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17613   { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17616   { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17617   { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17620   { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17621   { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17624   { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17625   { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17628   { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17629   { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17632   { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17633   { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17636   { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17637   { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17640   { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17641   { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17644   { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17645   { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17648   { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17649   { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17652   { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17653   { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17656   { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17657   { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17660   { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17661   { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17664   { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17665   { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17668   { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17669   { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17672   { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17673   { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17676   { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17677   { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17680   { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17681   { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17684   { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17685   { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17688   { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17689   { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17692   { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17693   { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17696   { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17697   { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17700   { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17701   { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17704   { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17705   { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17708   { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17709   { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17712   { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17713   { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17716   { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17717   { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17720   { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17721   { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17724   { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17725   { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17728   { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17729   { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17732   { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17733   { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17736   { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17737   { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17740   { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17741   { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17744   { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17745   { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17748   { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17749   { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17752   { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17753   { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17756   { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17757   { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17760   { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17761   { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17764   { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17765   { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17768   { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17769   { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17772   { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17773   { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17776   { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17777   { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17780   { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17781   { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17784   { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17785   { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17788   { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17789   { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17792   { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17793   { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17796   { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17797   { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17800   { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17801   { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17804   { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17805   { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17808   { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17809   { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17869   { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17870   { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17873   { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17874   { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17877   { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17878   { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17881   { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17882   { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17885   { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17886   { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17889   { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17890   { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17893   { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17894   { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17897   { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17898   { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17901   { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17902   { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17905   { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17906   { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17909   { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17910   { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17913   { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17914   { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17917   { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17918   { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17921   { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17922   { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17925   { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17926   { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17929   { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17930   { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17933   { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17934   { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17937   { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17938   { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17941   { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17942   { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17945   { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17946   { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17949   { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17950   { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17953   { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17954   { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17957   { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17958   { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17961   { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17962   { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17965   { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17966   { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17969   { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17970   { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17973   { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17974   { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17977   { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17978   { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17981   { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17982   { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17985   { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17986   { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17989   { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17990   { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17993   { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17994   { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17997   { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17998   { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18001   { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18002   { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18005   { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18006   { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18009   { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18010   { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18013   { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18014   { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18017   { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18018   { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18021   { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18022   { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18025   { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18026   { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18029   { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18030   { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18033   { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18034   { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18037   { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18038   { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18041   { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18042   { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18045   { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18046   { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18049   { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18050   { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18053   { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18054   { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18057   { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18058   { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18061   { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18062   { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18065   { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18066   { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18069   { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18070   { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18073   { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_gfx10, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18074   { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18079   { 9380 /* s_buffer_load_dword */, AMDGPU::S_BUFFER_LOAD_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18080   { 9380 /* s_buffer_load_dword */, AMDGPU::S_BUFFER_LOAD_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18086   { 9400 /* s_buffer_load_dwordx16 */, AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_512, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18087   { 9400 /* s_buffer_load_dwordx16 */, AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_512, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18093   { 9423 /* s_buffer_load_dwordx2 */, AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18094   { 9423 /* s_buffer_load_dwordx2 */, AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18100   { 9445 /* s_buffer_load_dwordx4 */, AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18101   { 9445 /* s_buffer_load_dwordx4 */, AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18107   { 9467 /* s_buffer_load_dwordx8 */, AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_256, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18108   { 9467 /* s_buffer_load_dwordx8 */, AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_256, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18112   { 9489 /* s_buffer_store_dword */, AMDGPU::S_BUFFER_STORE_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18113   { 9489 /* s_buffer_store_dword */, AMDGPU::S_BUFFER_STORE_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18116   { 9510 /* s_buffer_store_dwordx2 */, AMDGPU::S_BUFFER_STORE_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18117   { 9510 /* s_buffer_store_dwordx2 */, AMDGPU::S_BUFFER_STORE_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18120   { 9533 /* s_buffer_store_dwordx4 */, AMDGPU::S_BUFFER_STORE_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18121   { 9533 /* s_buffer_store_dwordx4 */, AMDGPU::S_BUFFER_STORE_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18219   { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_IMM_gfx10, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
18220   { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_IMM_vi, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
18223   { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_IMM_gfx10, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
18224   { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_IMM_vi, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
18277   { 10626 /* s_load_dword */, AMDGPU::S_LOAD_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18278   { 10626 /* s_load_dword */, AMDGPU::S_LOAD_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18284   { 10639 /* s_load_dwordx16 */, AMDGPU::S_LOAD_DWORDX16_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_512, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18285   { 10639 /* s_load_dwordx16 */, AMDGPU::S_LOAD_DWORDX16_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_512, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18291   { 10655 /* s_load_dwordx2 */, AMDGPU::S_LOAD_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18292   { 10655 /* s_load_dwordx2 */, AMDGPU::S_LOAD_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18298   { 10670 /* s_load_dwordx4 */, AMDGPU::S_LOAD_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18299   { 10670 /* s_load_dwordx4 */, AMDGPU::S_LOAD_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18305   { 10685 /* s_load_dwordx8 */, AMDGPU::S_LOAD_DWORDX8_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX10Plus, { MCK_SReg_256, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18306   { 10685 /* s_load_dwordx8 */, AMDGPU::S_LOAD_DWORDX8_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX8GFX9, { MCK_SReg_256, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18451   { 11480 /* s_scratch_load_dword */, AMDGPU::S_SCRATCH_LOAD_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18452   { 11480 /* s_scratch_load_dword */, AMDGPU::S_SCRATCH_LOAD_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18455   { 11501 /* s_scratch_load_dwordx2 */, AMDGPU::S_SCRATCH_LOAD_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18456   { 11501 /* s_scratch_load_dwordx2 */, AMDGPU::S_SCRATCH_LOAD_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18459   { 11524 /* s_scratch_load_dwordx4 */, AMDGPU::S_SCRATCH_LOAD_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18460   { 11524 /* s_scratch_load_dwordx4 */, AMDGPU::S_SCRATCH_LOAD_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18463   { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18464   { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18467   { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18468   { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18471   { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18472   { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18501   { 11835 /* s_store_dword */, AMDGPU::S_STORE_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18502   { 11835 /* s_store_dword */, AMDGPU::S_STORE_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18505   { 11849 /* s_store_dwordx2 */, AMDGPU::S_STORE_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18506   { 11849 /* s_store_dwordx2 */, AMDGPU::S_STORE_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18509   { 11865 /* s_store_dwordx4 */, AMDGPU::S_STORE_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18510   { 11865 /* s_store_dwordx4 */, AMDGPU::S_STORE_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
70121   { 8081 /* s_atc_probe */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8Plus_isGFX10Plus },
70122   { 8081 /* s_atc_probe */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8Plus_isGFX8GFX9 },
70123   { 8093 /* s_atc_probe_buffer */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8Plus_isGFX10Plus },
70124   { 8093 /* s_atc_probe_buffer */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8Plus_isGFX8GFX9 },
70127   { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70129   { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70133   { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70135   { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70139   { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70141   { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70145   { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70147   { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70151   { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70153   { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70157   { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70159   { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70163   { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70165   { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70169   { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70171   { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70175   { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70177   { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70181   { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70183   { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70187   { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70189   { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70193   { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70195   { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70199   { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70201   { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70205   { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70207   { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70211   { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70213   { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70217   { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70219   { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70223   { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70225   { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70229   { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70231   { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70235   { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70237   { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70241   { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70243   { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70247   { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70249   { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70253   { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70255   { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70259   { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70261   { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70265   { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70267   { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70271   { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70273   { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70277   { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70279   { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70283   { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70285   { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70289   { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70291   { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70295   { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70297   { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70301   { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70303   { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70307   { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70309   { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70313   { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70315   { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70319   { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70321   { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70325   { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70327   { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70331   { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70333   { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70337   { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70339   { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70343   { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70345   { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70349   { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70351   { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70355   { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70357   { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70361   { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70363   { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70367   { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70369   { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70373   { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70375   { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70379   { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70381   { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70385   { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70387   { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70391   { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70393   { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70397   { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70399   { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70403   { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70405   { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70409   { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70411   { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70415   { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70417   { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70421   { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70423   { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70427   { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70429   { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70433   { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70435   { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70441   { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70443   { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70447   { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70449   { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70453   { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70455   { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70459   { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70461   { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70465   { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70467   { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70471   { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70473   { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70477   { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70479   { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70483   { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70485   { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70489   { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70491   { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70495   { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70497   { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70501   { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70503   { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70507   { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70509   { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70513   { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70515   { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70519   { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70521   { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70525   { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70527   { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70531   { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70533   { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70537   { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70539   { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70543   { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70545   { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70549   { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70551   { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70555   { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70557   { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70561   { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70563   { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70567   { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70569   { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70573   { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70575   { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70579   { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70581   { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70585   { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70587   { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70591   { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70593   { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70597   { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70599   { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70603   { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70605   { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70609   { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70611   { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70615   { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70617   { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70621   { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70623   { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70627   { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70629   { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70633   { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70635   { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70639   { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70641   { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70645   { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70647   { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70651   { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70653   { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70657   { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70659   { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70663   { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70665   { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70669   { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70671   { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70675   { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70677   { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70681   { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70683   { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70687   { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70689   { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70693   { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70695   { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70699   { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70701   { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70705   { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70707   { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70711   { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70713   { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70717   { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70719   { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70723   { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70725   { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70729   { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70731   { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70735   { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70737   { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70741   { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70743   { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70747   { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70749   { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70760   { 9380 /* s_buffer_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70763   { 9380 /* s_buffer_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70778   { 9400 /* s_buffer_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70781   { 9400 /* s_buffer_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70796   { 9423 /* s_buffer_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70799   { 9423 /* s_buffer_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70814   { 9445 /* s_buffer_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70817   { 9445 /* s_buffer_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70832   { 9467 /* s_buffer_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70835   { 9467 /* s_buffer_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70845   { 9489 /* s_buffer_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
70848   { 9489 /* s_buffer_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
70855   { 9510 /* s_buffer_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
70858   { 9510 /* s_buffer_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
70865   { 9533 /* s_buffer_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
70868   { 9533 /* s_buffer_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
70895   { 10232 /* s_dcache_discard */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70896   { 10232 /* s_dcache_discard */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70897   { 10249 /* s_dcache_discard_x2 */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX10Plus },
70898   { 10249 /* s_dcache_discard_x2 */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70912   { 10626 /* s_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70915   { 10626 /* s_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70930   { 10639 /* s_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70933   { 10639 /* s_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70948   { 10655 /* s_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70951   { 10655 /* s_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70966   { 10670 /* s_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70969   { 10670 /* s_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70984   { 10685 /* s_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX10Plus },
70987   { 10685 /* s_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_isGFX8GFX9 },
70997   { 11480 /* s_scratch_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus },
71000   { 11480 /* s_scratch_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71007   { 11501 /* s_scratch_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus },
71010   { 11501 /* s_scratch_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71017   { 11524 /* s_scratch_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX10Plus },
71020   { 11524 /* s_scratch_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71027   { 11547 /* s_scratch_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts },
71030   { 11547 /* s_scratch_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71037   { 11569 /* s_scratch_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts },
71040   { 11569 /* s_scratch_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71047   { 11593 /* s_scratch_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts },
71050   { 11593 /* s_scratch_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71067   { 11835 /* s_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
71070   { 11835 /* s_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
71077   { 11849 /* s_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
71080   { 11849 /* s_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
71087   { 11865 /* s_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus },
71090   { 11865 /* s_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX8GFX9 },
80305   case MCK_ImmSMRDOffset20: