reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc
 6281   case MCK_ImmHwreg: {
10182   case MCK_ImmHwreg: return "MCK_ImmHwreg";
18266   { 10559 /* s_getreg_b32 */, AMDGPU::S_GETREG_B32_gfx10, Convert__Reg1_0__ImmHwreg1_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_ImmHwreg }, },
18267   { 10559 /* s_getreg_b32 */, AMDGPU::S_GETREG_B32_gfx6_gfx7, Convert__Reg1_0__ImmHwreg1_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_ImmHwreg }, },
18268   { 10559 /* s_getreg_b32 */, AMDGPU::S_GETREG_B32_vi, Convert__Reg1_0__ImmHwreg1_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_ImmHwreg }, },
18485   { 11755 /* s_setreg_b32 */, AMDGPU::S_SETREG_B32_gfx10, Convert__Reg1_1__ImmHwreg1_0, AMFBS_isGFX10Plus, { MCK_ImmHwreg, MCK_SReg_32 }, },
18486   { 11755 /* s_setreg_b32 */, AMDGPU::S_SETREG_B32_gfx6_gfx7, Convert__Reg1_1__ImmHwreg1_0, AMFBS_isGFX6GFX7, { MCK_ImmHwreg, MCK_SReg_32 }, },
18487   { 11755 /* s_setreg_b32 */, AMDGPU::S_SETREG_B32_vi, Convert__Reg1_1__ImmHwreg1_0, AMFBS_isGFX8GFX9, { MCK_ImmHwreg, MCK_SReg_32 }, },
18488   { 11768 /* s_setreg_imm32_b32 */, AMDGPU::S_SETREG_IMM32_B32_gfx10, Convert__Imm1_1__ImmHwreg1_0, AMFBS_isGFX10Plus, { MCK_ImmHwreg, MCK_Imm }, },
18489   { 11768 /* s_setreg_imm32_b32 */, AMDGPU::S_SETREG_IMM32_B32_gfx6_gfx7, Convert__Imm1_1__ImmHwreg1_0, AMFBS_isGFX6GFX7, { MCK_ImmHwreg, MCK_Imm }, },
18490   { 11768 /* s_setreg_imm32_b32 */, AMDGPU::S_SETREG_IMM32_B32_vi, Convert__Imm1_1__ImmHwreg1_0, AMFBS_isGFX8GFX9, { MCK_ImmHwreg, MCK_Imm }, },
70900   { 10559 /* s_getreg_b32 */, 2 /* 1 */, MCK_ImmHwreg, AMFBS_isGFX10Plus },
70901   { 10559 /* s_getreg_b32 */, 2 /* 1 */, MCK_ImmHwreg, AMFBS_isGFX6GFX7 },
70902   { 10559 /* s_getreg_b32 */, 2 /* 1 */, MCK_ImmHwreg, AMFBS_isGFX8GFX9 },
71057   { 11755 /* s_setreg_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX10Plus },
71058   { 11755 /* s_setreg_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX6GFX7 },
71059   { 11755 /* s_setreg_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX8GFX9 },
71060   { 11768 /* s_setreg_imm32_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX10Plus },
71061   { 11768 /* s_setreg_imm32_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX6GFX7 },
71062   { 11768 /* s_setreg_imm32_b32 */, 1 /* 0 */, MCK_ImmHwreg, AMFBS_isGFX8GFX9 },
80395   case MCK_ImmHwreg: