reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 6155   case MCK_ImmDim: {
10164   case MCK_ImmDim: return "MCK_ImmDim";
13452   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13453   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13454   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13455   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13456   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13457   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13458   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13459   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13460   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13461   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13462   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13463   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13464   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13465   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13482   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13483   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13484   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13485   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13486   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13487   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13488   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13489   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13490   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13491   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13492   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13493   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13494   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13495   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13512   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13513   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13514   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13515   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13516   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13517   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13518   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13519   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13520   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13521   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13522   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13523   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13524   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13525   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13542   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13543   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13544   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13545   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13546   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13547   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13548   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13549   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13550   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13551   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13552   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13553   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13554   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13555   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13572   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13573   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13574   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13575   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13576   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13577   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13578   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13579   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13580   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13581   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13582   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13583   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13584   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13585   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13602   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13603   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13604   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13605   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13606   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13607   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13608   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13609   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13610   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13611   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13612   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13613   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13614   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13615   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13632   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13633   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13634   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13635   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13636   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13637   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13638   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13639   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13640   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13641   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13642   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13643   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13644   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13645   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13662   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13663   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13664   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13665   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13666   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13667   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13668   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13669   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13670   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13671   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13672   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13673   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13674   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13675   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13692   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13693   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13694   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13695   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13696   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13697   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13698   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13699   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13700   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13701   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13702   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13703   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13704   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13705   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13722   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13723   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13724   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13725   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13726   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13727   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13728   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13729   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13730   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13731   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13732   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13733   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13734   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13735   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13752   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13753   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13754   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13755   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13756   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13757   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13758   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13759   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13760   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13761   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13762   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13763   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13764   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13765   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13782   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13783   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13784   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13785   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13786   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13787   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13788   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13789   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13790   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13791   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13792   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13793   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13794   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13795   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13812   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13813   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13814   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13815   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13816   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13817   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13818   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13819   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13820   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13821   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13822   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13823   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13824   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13825   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13838   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13839   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13840   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13841   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13842   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13843   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13844   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13845   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13846   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13847   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13848   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13849   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13850   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13851   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13852   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13853   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13854   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13855   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13865   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13866   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13867   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13868   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13869   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13870   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13871   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13872   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13873   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13874   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13875   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13876   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13877   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13878   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13879   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13880   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13881   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13882   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13895   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13896   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13897   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13898   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13899   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13900   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13901   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13902   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13903   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13904   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13905   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13906   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13907   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13908   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13909   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13910   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13911   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13912   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13913   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13914   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13915   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13916   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13917   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13918   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13928   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13929   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13930   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13931   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13932   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13933   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13934   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13935   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13936   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13937   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13938   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13939   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13940   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13941   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13942   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13943   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13944   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13945   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13946   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13947   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13948   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13958   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13959   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13960   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13961   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13962   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13963   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13964   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13965   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13966   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13967   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13968   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13969   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13970   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13971   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13972   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13973   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13974   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13975   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13985   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13986   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13987   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13988   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13989   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13990   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13991   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13992   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13993   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13994   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13995   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13996   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13997   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13998   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13999   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14000   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14001   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14002   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14012   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14013   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14014   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14015   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14016   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14017   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14018   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14019   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14020   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14021   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14022   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14023   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14024   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14025   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14026   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14027   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14028   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14029   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14039   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14040   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14041   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14042   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14043   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14044   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14045   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14046   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14047   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14048   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14049   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14050   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14051   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14052   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14053   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14054   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14055   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14056   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14057   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14058   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14059   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14066   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14067   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14068   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14069   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14070   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14071   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14072   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14073   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14074   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14075   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14076   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14077   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14078   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14079   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14080   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14081   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14082   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14083   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14090   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14091   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14092   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14093   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14094   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14095   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14096   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14097   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14098   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14099   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14100   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14101   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14102   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14103   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14104   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14117   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14118   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14119   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14120   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14121   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14122   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14123   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14124   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14125   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14126   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14127   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14128   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14129   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14130   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14131   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14132   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14133   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14134   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14135   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14136   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14137   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14138   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14139   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14140   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14150   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14151   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14152   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14153   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14154   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14155   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14156   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14157   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14158   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14159   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14160   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14161   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14162   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14163   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14164   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14165   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14166   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14167   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14168   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14169   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14170   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14183   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14184   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14185   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14186   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14187   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14188   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14189   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14190   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14191   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14192   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14193   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14194   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14195   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14196   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14197   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14198   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14199   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14200   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14201   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14202   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14203   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14204   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14205   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14206   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14216   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14217   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14218   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14219   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14220   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14221   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14222   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14223   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14224   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14225   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14226   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14227   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14228   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14229   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14230   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14231   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14232   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14233   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14234   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14235   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14236   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14246   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14247   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14248   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14249   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14250   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14251   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14252   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14253   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14254   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14255   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14256   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14257   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14258   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14259   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14260   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14261   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14262   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14263   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14273   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14274   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14275   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14276   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14277   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14278   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14279   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14280   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14281   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14282   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14283   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14284   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14285   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14286   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14287   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14288   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14289   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14290   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14300   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14301   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14302   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14303   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14304   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14305   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14306   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14307   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14308   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14309   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14310   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14311   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14312   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14313   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14314   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14315   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14316   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14317   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14330   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14331   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14332   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14333   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14334   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14335   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14336   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14337   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14338   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14339   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14340   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14341   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14342   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14343   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14344   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14345   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14346   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14347   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14348   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14349   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14350   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14363   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14364   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14365   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14366   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14367   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14368   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14369   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14370   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14371   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14372   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14373   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14374   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14375   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14376   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14377   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14378   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14379   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14380   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14381   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14382   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14383   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14384   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14385   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14386   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14399   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14400   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14401   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14402   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14403   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14404   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14405   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14406   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14407   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14408   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14409   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14410   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14411   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14412   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14413   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14414   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14415   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14416   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14417   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14418   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14419   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14432   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14433   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14434   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14435   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14436   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14437   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14438   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14439   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14440   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14441   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14442   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14443   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14444   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14445   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14446   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14447   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14448   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14449   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14450   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14451   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14452   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14453   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14454   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14455   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14468   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14469   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14470   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14471   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14472   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14473   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14474   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14475   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14476   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14477   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14478   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14479   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14480   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14481   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14482   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14483   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14484   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14485   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14495   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14496   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14497   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14498   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14499   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14500   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14501   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14502   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14503   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14504   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14505   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14506   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14507   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14508   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14509   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14510   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14511   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14512   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14522   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14523   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14524   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14525   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14526   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14527   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14528   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14529   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14530   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14531   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14532   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14533   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14534   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14535   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14536   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14537   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14538   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14539   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14560   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14561   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14562   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14563   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14564   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14565   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14566   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14567   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14568   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14569   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14570   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14571   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14572   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14573   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14574   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14575   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14576   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14577   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14578   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14579   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14580   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14581   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14582   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14583   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14584   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14585   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14586   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14587   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14588   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14589   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14610   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14611   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14612   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14613   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14614   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14615   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14616   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14617   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14618   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14619   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14620   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14621   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14622   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14623   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14624   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14625   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14626   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14627   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14628   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14629   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14630   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14631   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14632   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14633   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14634   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14635   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14636   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14637   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14638   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14639   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14640   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14641   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14642   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14643   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14644   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14665   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14666   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14667   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14668   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14669   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14670   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14671   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14672   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14673   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14674   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14675   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14676   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14677   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14678   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14679   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14680   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14681   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14682   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14683   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14684   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14685   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14686   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14687   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14688   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14689   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14690   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14691   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14692   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14693   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14694   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14695   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14696   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14697   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14698   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14699   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14720   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14721   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14722   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14723   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14724   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14725   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14726   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14727   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14728   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14729   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14730   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14731   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14732   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14733   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14734   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14735   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14736   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14737   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14738   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14739   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14740   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14741   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14742   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14743   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14744   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14745   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14746   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14747   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14748   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14749   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14750   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14751   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14752   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14753   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14754   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14775   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14776   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14777   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14778   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14779   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14780   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14781   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14782   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14783   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14784   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14785   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14786   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14787   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14788   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14789   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14790   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14791   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14792   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14793   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14794   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14795   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14796   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14797   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14798   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14799   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14800   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14801   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14802   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14803   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14804   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14805   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14806   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14807   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14808   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14809   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14830   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14831   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14832   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14833   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14834   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14835   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14836   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14837   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14838   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14839   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14840   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14841   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14842   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14843   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14844   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14845   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14846   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14847   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14848   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14849   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14850   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14851   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14852   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14853   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14854   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14855   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14856   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14857   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14858   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14859   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14860   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14861   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14862   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14863   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14864   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14885   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14886   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14887   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14888   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14889   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14890   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14891   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14892   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14893   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14894   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14895   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14896   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14897   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14898   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14899   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14900   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14901   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14902   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14903   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14904   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14905   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14906   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14907   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14908   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14909   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14910   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14911   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14912   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14913   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14914   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14915   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14916   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14917   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14918   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14919   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14940   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14941   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14942   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14943   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14944   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14945   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14946   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14947   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14948   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14949   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14950   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14951   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14952   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14953   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14954   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14955   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14956   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14957   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14958   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14959   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14960   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14961   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14962   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14963   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14964   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14965   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14966   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14967   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14968   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14969   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14970   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14971   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14972   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14973   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14974   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14995   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14996   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14997   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14998   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14999   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15000   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15001   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15002   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15003   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15004   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15005   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15006   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15007   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15008   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15009   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15010   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15011   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15012   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15013   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15014   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15015   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15016   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15017   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15018   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15019   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15020   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15021   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15022   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15023   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15024   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15040   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15041   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15042   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15043   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15044   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15045   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15046   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15047   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15048   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15049   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15050   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15051   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15052   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15053   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15054   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15055   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15056   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15057   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15058   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15059   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15060   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15061   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15062   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15063   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15064   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15065   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15066   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15067   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15068   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15069   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15090   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15091   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15092   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15093   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15094   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15095   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15096   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15097   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15098   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15099   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15100   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15101   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15102   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15103   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15104   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15105   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15106   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15107   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15108   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15109   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15110   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15111   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15112   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15113   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15114   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15115   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15116   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15117   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15118   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15119   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15120   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15121   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15122   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15123   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15124   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15125   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15126   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15127   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15128   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15129   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15145   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15146   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15147   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15148   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15149   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15150   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15151   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15152   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15153   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15154   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15155   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15156   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15157   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15158   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15159   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15160   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15161   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15162   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15163   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15164   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15165   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15166   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15167   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15168   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15169   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15170   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15171   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15172   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15173   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15174   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15175   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15176   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15177   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15178   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15179   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15195   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15196   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15197   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15198   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15199   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15200   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15201   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15202   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15203   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15204   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15205   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15206   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15207   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15208   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15209   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15210   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15211   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15212   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15213   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15214   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15215   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15216   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15217   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15218   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15219   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15220   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15221   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15222   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15223   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15224   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15240   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15241   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15242   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15243   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15244   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15245   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15246   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15247   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15248   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15249   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15250   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15251   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15252   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15253   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15254   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15255   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15256   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15257   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15258   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15259   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15260   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15261   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15262   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15263   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15264   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15265   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15266   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15267   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15268   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15269   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15285   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15286   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15287   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15288   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15289   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15290   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15291   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15292   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15293   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15294   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15295   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15296   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15297   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15298   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15299   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15300   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15301   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15302   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15303   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15304   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15305   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15306   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15307   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15308   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15309   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15310   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15311   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15312   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15313   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15314   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15330   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15331   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15332   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15333   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15334   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15335   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15336   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15337   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15338   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15339   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15340   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15341   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15342   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15343   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15344   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15345   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15346   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15347   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15348   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15349   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15350   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15351   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15352   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15353   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15354   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15355   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15356   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15357   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15358   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15359   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15360   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15361   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15362   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15363   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15364   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15375   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15376   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15377   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15378   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15379   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15380   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15381   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15382   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15383   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15384   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15385   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15386   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15387   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15388   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15389   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15390   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15391   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15392   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15393   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15394   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15395   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15396   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15397   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15398   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15399   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15400   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15401   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15402   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15403   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15404   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15415   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15416   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15417   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15418   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15419   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15420   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15421   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15422   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15423   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15424   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15425   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15426   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15427   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15428   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15429   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15430   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15431   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15432   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15433   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15434   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15435   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15436   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15437   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15438   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15439   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15460   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15461   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15462   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15463   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15464   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15465   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15466   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15467   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15468   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15469   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15470   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15471   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15472   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15473   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15474   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15475   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15476   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15477   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15478   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15479   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15480   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15481   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15482   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15483   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15484   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15485   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15486   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15487   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15488   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15489   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15490   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15491   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15492   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15493   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15494   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15495   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15496   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15497   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15498   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15499   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15500   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15501   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15502   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15503   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15504   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15505   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15506   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15507   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15508   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15509   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15510   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15511   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15512   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15513   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15514   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15535   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15536   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15537   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15538   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15539   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15540   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15541   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15542   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15543   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15544   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15545   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15546   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15547   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15548   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15549   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15550   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15551   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15552   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15553   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15554   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15555   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15556   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15557   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15558   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15559   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15560   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15561   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15562   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15563   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15564   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15565   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15566   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15567   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15568   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15569   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15570   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15571   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15572   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15573   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15574   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15575   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15576   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15577   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15578   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15579   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15580   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15581   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15582   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15583   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15584   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15585   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15586   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15587   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15588   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15589   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15605   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15606   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15607   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15608   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15609   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15610   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15611   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15612   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15613   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15614   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15615   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15616   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15617   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15618   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15619   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15620   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15621   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15622   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15623   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15624   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15625   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15626   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15627   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15628   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15629   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15630   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15631   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15632   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15633   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15634   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15635   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15636   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15637   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15638   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15639   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15640   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15641   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15642   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15643   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15644   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15645   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15646   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15647   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15648   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15649   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15650   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15651   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15652   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15653   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15654   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15670   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15671   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15672   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15673   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15674   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15675   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15676   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15677   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15678   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15679   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15680   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15681   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15682   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15683   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15684   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15685   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15686   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15687   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15688   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15689   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15690   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15691   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15692   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15693   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15694   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15695   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15696   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15697   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15698   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15699   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15700   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15701   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15702   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15703   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15704   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15705   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15706   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15707   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15708   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15709   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15710   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15711   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15712   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15713   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15714   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15715   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15716   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15717   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15718   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15719   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15740   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15741   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15742   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15743   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15744   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15745   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15746   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15747   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15748   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15749   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15750   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15751   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15752   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15753   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15754   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15755   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15756   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15757   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15758   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15759   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15760   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15761   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15762   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15763   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15764   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15765   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15766   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15767   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15768   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15769   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15770   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15771   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15772   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15773   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15774   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15775   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15776   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15777   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15778   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15779   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15795   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15796   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15797   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15798   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15799   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15800   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15801   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15802   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15803   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15804   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15805   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15806   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15807   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15808   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15809   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15810   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15811   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15812   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15813   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15814   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15815   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15816   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15817   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15818   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15819   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15820   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15821   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15822   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15823   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15824   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15825   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15826   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15827   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15828   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15829   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15850   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15851   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15852   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15853   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15854   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15855   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15856   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15857   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15858   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15859   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15860   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15861   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15862   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15863   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15864   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15865   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15866   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15867   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15868   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15869   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15870   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15871   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15872   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15873   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15874   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15875   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15876   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15877   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15878   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15879   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15880   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15881   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15882   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15883   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15884   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15885   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15886   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15887   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15888   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15889   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15890   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15891   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15892   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15893   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15894   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15895   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15896   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15897   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15898   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15899   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15900   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15901   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15902   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15903   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15904   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15925   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15926   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15927   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15928   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15929   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15930   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15931   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15932   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15933   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15934   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15935   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15936   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15937   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15938   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15939   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15940   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15941   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15942   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15943   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15944   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15945   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15946   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15947   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15948   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15949   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15950   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15951   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15952   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15953   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15954   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15955   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15956   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15957   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15958   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15959   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15960   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15961   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15962   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15963   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15964   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15965   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15966   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15967   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15968   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15969   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15970   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15971   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15972   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15973   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15974   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15975   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15976   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15977   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15978   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15979   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15995   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15996   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15997   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15998   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15999   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16000   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16001   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16002   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16003   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16004   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16005   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16006   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16007   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16008   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16009   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16010   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16011   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16012   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16013   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16014   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16015   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16016   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16017   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16018   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16019   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16020   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16021   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16022   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16023   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16024   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16025   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16026   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16027   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16028   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16029   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16030   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16031   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16032   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16033   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16034   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16035   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16036   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16037   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16038   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16039   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16040   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16041   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16042   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16043   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16044   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16060   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16061   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16062   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16063   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16064   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16065   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16066   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16067   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16068   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16069   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16070   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16071   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16072   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16073   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16074   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16075   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16076   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16077   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16078   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16079   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16080   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16081   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16082   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16083   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16084   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16085   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16086   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16087   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16088   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16089   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16090   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16091   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16092   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16093   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16094   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16095   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16096   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16097   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16098   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16099   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16100   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16101   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16102   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16103   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16104   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16105   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16106   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16107   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16108   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16109   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16130   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16131   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16132   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16133   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16134   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16135   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16136   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16137   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16138   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16139   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16140   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16141   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16142   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16143   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16144   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16145   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16146   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16147   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16148   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16149   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16150   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16151   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16152   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16153   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16154   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16155   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16156   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16157   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16158   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16159   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16160   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16161   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16162   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16163   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16164   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16165   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16166   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16167   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16168   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16169   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16185   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16186   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16187   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16188   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16189   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16190   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16191   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16192   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16193   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16194   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16195   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16196   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16197   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16198   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16199   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16200   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16201   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16202   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16203   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16204   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16205   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16206   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16207   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16208   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16209   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16210   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16211   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16212   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16213   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16214   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16215   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16216   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16217   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16218   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16219   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16235   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16236   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16237   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16238   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16239   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16240   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16241   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16242   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16243   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16244   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16245   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16246   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16247   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16248   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16249   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16250   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16251   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16252   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16253   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16254   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16255   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16256   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16257   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16258   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16259   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16260   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16261   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16262   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16263   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16264   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16280   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16281   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16282   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16283   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16284   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16285   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16286   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16287   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16288   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16289   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16290   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16291   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16292   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16293   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16294   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16295   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16296   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16297   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16298   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16299   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16300   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16301   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16302   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16303   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16304   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16305   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16306   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16307   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16308   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16309   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16325   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16326   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16327   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16328   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16329   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16330   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16331   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16332   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16333   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16334   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16335   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16336   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16337   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16338   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16339   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16340   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16341   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16342   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16343   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16344   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16345   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16346   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16347   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16348   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16349   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16350   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16351   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16352   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16353   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16354   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16380   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16381   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16382   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16383   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16384   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16385   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16386   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16387   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16388   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16389   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16390   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16391   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16392   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16393   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16394   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16395   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16396   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16397   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16398   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16399   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16400   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16401   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16402   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16403   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16404   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16405   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16406   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16407   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16408   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16409   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16410   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16411   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16412   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16413   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16414   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16415   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16416   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16417   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16418   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16419   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16420   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16421   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16422   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16423   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16424   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16425   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16426   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16427   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16428   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16429   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16430   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16431   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16432   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16433   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16434   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16435   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16436   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16437   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16438   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16439   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16465   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16466   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16467   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16468   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16469   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16470   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16471   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16472   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16473   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16474   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16475   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16476   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16477   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16478   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16479   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16480   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16481   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16482   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16483   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16484   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16485   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16486   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16487   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16488   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16489   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16490   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16491   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16492   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16493   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16494   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16495   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16496   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16497   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16498   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16499   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16500   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16501   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16502   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16503   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16504   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16505   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16506   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16507   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16508   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16509   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16510   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16511   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16512   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16513   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16514   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16515   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16516   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16517   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16518   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16519   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16520   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16521   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16522   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16523   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16524   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16545   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16546   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16547   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16548   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16549   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16550   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16551   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16552   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16553   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16554   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16555   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16556   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16557   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16558   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16559   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16560   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16561   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16562   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16563   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16564   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16565   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16566   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16567   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16568   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16569   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16570   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16571   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16572   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16573   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16574   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16575   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16576   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16577   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16578   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16579   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16580   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16581   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16582   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16583   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16584   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16585   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16586   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16587   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16588   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16589   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16590   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16591   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16592   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16593   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16594   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16595   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16596   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16597   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16598   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16599   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16620   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16621   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16622   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16623   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16624   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16625   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16626   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16627   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16628   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16629   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16630   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16631   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16632   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16633   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16634   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16635   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16636   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16637   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16638   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16639   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16640   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16641   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16642   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16643   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16644   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16645   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16646   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16647   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16648   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16649   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16650   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16651   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16652   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16653   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16654   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16655   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16656   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16657   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16658   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16659   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16660   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16661   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16662   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16663   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16664   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16665   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16666   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16667   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16668   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16669   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16670   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16671   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16672   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16673   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16674   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16695   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16696   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16697   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16698   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16699   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16700   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16701   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16702   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16703   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16704   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16705   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16706   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16707   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16708   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16709   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16710   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16711   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16712   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16713   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16714   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16715   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16716   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16717   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16718   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16719   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16720   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16721   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16722   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16723   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16724   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16725   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16726   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16727   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16728   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16729   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16750   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16751   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16752   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16753   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16754   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16755   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16756   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16757   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16758   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16759   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16760   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16761   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16762   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16763   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16764   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16765   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16766   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16767   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16768   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16769   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16770   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16771   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16772   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16773   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16774   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16775   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16776   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16777   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16778   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16779   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16780   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16781   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16782   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16783   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16784   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16785   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16786   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16787   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16788   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16789   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16815   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16816   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16817   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16818   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16819   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16820   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16821   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16822   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16823   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16824   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16825   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16826   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16827   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16828   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16829   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16830   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16831   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16832   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16833   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16834   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16835   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16836   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16837   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16838   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16839   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16840   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16841   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16842   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16843   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16844   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16845   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16846   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16847   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16848   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16849   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16850   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16851   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16852   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16853   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16854   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16855   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16856   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16857   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16858   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16859   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16860   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16861   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16862   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16863   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16864   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16865   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16866   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16867   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16868   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16869   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16870   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16871   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16872   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16873   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16874   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16900   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16901   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16902   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16903   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16904   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16905   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16906   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16907   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16908   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16909   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16910   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16911   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16912   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16913   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16914   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16915   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16916   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16917   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16918   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16919   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16920   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16921   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16922   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16923   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16924   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16925   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16926   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16927   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16928   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16929   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16930   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16931   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16932   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16933   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16934   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16935   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16936   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16937   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16938   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16939   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16940   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16941   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16942   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16943   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16944   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16945   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16946   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16947   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16948   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16949   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16950   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16951   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16952   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16953   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16954   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16955   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16956   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16957   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16958   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16959   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16980   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16981   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16982   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16983   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16984   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16985   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16986   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16987   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16988   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16989   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16990   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16991   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16992   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16993   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16994   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16995   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16996   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16997   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16998   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16999   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17000   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17001   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17002   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17003   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17004   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17005   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17006   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17007   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17008   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17009   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17010   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17011   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17012   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17013   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17014   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17015   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17016   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17017   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17018   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17019   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17020   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17021   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17022   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17023   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17024   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17025   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17026   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17027   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17028   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17029   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17030   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17031   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17032   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17033   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17034   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17055   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17056   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17057   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17058   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17059   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17060   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17061   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17062   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17063   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17064   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17065   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17066   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17067   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17068   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17069   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17070   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17071   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17072   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17073   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17074   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17075   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17076   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17077   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17078   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17079   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17080   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17081   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17082   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17083   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17084   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17085   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17086   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17087   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17088   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17089   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17090   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17091   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17092   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17093   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17094   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17095   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17096   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17097   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17098   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17099   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17100   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17101   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17102   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17103   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17104   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17105   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17106   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17107   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17108   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17109   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17130   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17131   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17132   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17133   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17134   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17135   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17136   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17137   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17138   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17139   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17140   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17141   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17142   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17143   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17144   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17145   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17146   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17147   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17148   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17149   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17150   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17151   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17152   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17153   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17154   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17155   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17156   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17157   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17158   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17159   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17160   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17161   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17162   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17163   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17164   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17185   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17186   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17187   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17188   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17189   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17190   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17191   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17192   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17193   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17194   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17195   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17196   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17197   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17198   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17199   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17200   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17201   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17202   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17203   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17204   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17205   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17206   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17207   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17208   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17209   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17210   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17211   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17212   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17213   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17214   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17215   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17216   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17217   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17218   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17219   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17220   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17221   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17222   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17223   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17224   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17245   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17246   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17247   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17248   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17249   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17250   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17251   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17252   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17253   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17254   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17255   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17256   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17257   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17258   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17259   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17260   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17261   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17262   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17263   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17264   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17265   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17266   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17267   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17268   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17269   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17270   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17271   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17272   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17273   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17274   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17290   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17291   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17292   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17293   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17294   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17295   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17296   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17297   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17298   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17299   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17300   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17301   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17302   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17303   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17304   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17305   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17306   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17307   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17308   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17309   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17310   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17311   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17312   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17313   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17314   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17315   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17316   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17317   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17318   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17319   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17335   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17336   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17337   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17338   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17339   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17340   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17341   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17342   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17343   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17344   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17345   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17346   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17347   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17348   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17349   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17350   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17351   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17352   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17353   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17354   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17355   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17356   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17357   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17358   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17359   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17360   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17361   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17362   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17363   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17364   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17381   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17382   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17383   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17384   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17385   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17386   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17387   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17388   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17389   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17390   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17391   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17392   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17393   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17394   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17395   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17396   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17397   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17398   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17399   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17400   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17401   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17402   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17403   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17404   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17405   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17406   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17407   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17408   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17425   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17426   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17427   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17428   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17429   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17430   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17431   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17432   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17433   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17434   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17435   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17436   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17437   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17438   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17439   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17440   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17441   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17442   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17443   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17444   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17445   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17446   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17447   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17448   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17449   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17450   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17451   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17452   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17469   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17470   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17471   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17472   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17473   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17474   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17475   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17476   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17477   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17478   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17479   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17480   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17481   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17482   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17483   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17484   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17485   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17486   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17487   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17488   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17489   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17490   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17491   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17492   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17493   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17494   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17495   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17496   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17513   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17514   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17515   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17516   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17517   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17518   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17519   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17520   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17521   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17522   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17523   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17524   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17525   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17526   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17527   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17528   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17529   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17530   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17531   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17532   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17533   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17534   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17535   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17536   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17537   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17538   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17539   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17540   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
31394   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31403   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31412   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31421   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31430   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31439   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31448   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31457   { 6156 /* image_atomic_add */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31466   { 6156 /* image_atomic_add */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31475   { 6156 /* image_atomic_add */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31484   { 6156 /* image_atomic_add */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31493   { 6156 /* image_atomic_add */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31502   { 6156 /* image_atomic_add */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31511   { 6156 /* image_atomic_add */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31648   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31657   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31666   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31675   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31684   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31693   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31702   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31711   { 6173 /* image_atomic_and */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31720   { 6173 /* image_atomic_and */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31729   { 6173 /* image_atomic_and */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31738   { 6173 /* image_atomic_and */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31747   { 6173 /* image_atomic_and */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31756   { 6173 /* image_atomic_and */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31765   { 6173 /* image_atomic_and */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31902   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31911   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31920   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31929   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31938   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31947   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31956   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31965   { 6190 /* image_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31974   { 6190 /* image_atomic_cmpswap */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31983   { 6190 /* image_atomic_cmpswap */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
31992   { 6190 /* image_atomic_cmpswap */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32001   { 6190 /* image_atomic_cmpswap */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32010   { 6190 /* image_atomic_cmpswap */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32019   { 6190 /* image_atomic_cmpswap */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32156   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32165   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32174   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32183   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32192   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32201   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32210   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32219   { 6211 /* image_atomic_dec */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32228   { 6211 /* image_atomic_dec */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32237   { 6211 /* image_atomic_dec */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32246   { 6211 /* image_atomic_dec */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32255   { 6211 /* image_atomic_dec */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32264   { 6211 /* image_atomic_dec */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32273   { 6211 /* image_atomic_dec */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32410   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32419   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32428   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32437   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32446   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32455   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32464   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32473   { 6228 /* image_atomic_inc */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32482   { 6228 /* image_atomic_inc */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32491   { 6228 /* image_atomic_inc */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32500   { 6228 /* image_atomic_inc */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32509   { 6228 /* image_atomic_inc */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32518   { 6228 /* image_atomic_inc */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32527   { 6228 /* image_atomic_inc */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32664   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32673   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32682   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32691   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32700   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32709   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32718   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32727   { 6245 /* image_atomic_or */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32736   { 6245 /* image_atomic_or */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32745   { 6245 /* image_atomic_or */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32754   { 6245 /* image_atomic_or */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32763   { 6245 /* image_atomic_or */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32772   { 6245 /* image_atomic_or */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32781   { 6245 /* image_atomic_or */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32918   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32927   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32936   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32945   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32954   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32963   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32972   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32981   { 6261 /* image_atomic_smax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32990   { 6261 /* image_atomic_smax */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
32999   { 6261 /* image_atomic_smax */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33008   { 6261 /* image_atomic_smax */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33017   { 6261 /* image_atomic_smax */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33026   { 6261 /* image_atomic_smax */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33035   { 6261 /* image_atomic_smax */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33172   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33181   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33190   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33199   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33208   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33217   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33226   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33235   { 6279 /* image_atomic_smin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33244   { 6279 /* image_atomic_smin */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33253   { 6279 /* image_atomic_smin */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33262   { 6279 /* image_atomic_smin */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33271   { 6279 /* image_atomic_smin */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33280   { 6279 /* image_atomic_smin */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33289   { 6279 /* image_atomic_smin */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33426   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33435   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33444   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33453   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33462   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33471   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33480   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33489   { 6297 /* image_atomic_sub */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33498   { 6297 /* image_atomic_sub */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33507   { 6297 /* image_atomic_sub */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33516   { 6297 /* image_atomic_sub */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33525   { 6297 /* image_atomic_sub */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33534   { 6297 /* image_atomic_sub */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33543   { 6297 /* image_atomic_sub */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33680   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33689   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33698   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33707   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33716   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33725   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33734   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33743   { 6314 /* image_atomic_swap */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33752   { 6314 /* image_atomic_swap */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33761   { 6314 /* image_atomic_swap */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33770   { 6314 /* image_atomic_swap */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33779   { 6314 /* image_atomic_swap */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33788   { 6314 /* image_atomic_swap */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33797   { 6314 /* image_atomic_swap */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33934   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33943   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33952   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33961   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33970   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33979   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33988   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
33997   { 6332 /* image_atomic_umax */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34006   { 6332 /* image_atomic_umax */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34015   { 6332 /* image_atomic_umax */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34024   { 6332 /* image_atomic_umax */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34033   { 6332 /* image_atomic_umax */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34042   { 6332 /* image_atomic_umax */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34051   { 6332 /* image_atomic_umax */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34188   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34197   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34206   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34215   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34224   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34233   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34242   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34251   { 6350 /* image_atomic_umin */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34260   { 6350 /* image_atomic_umin */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34269   { 6350 /* image_atomic_umin */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34278   { 6350 /* image_atomic_umin */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34287   { 6350 /* image_atomic_umin */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34296   { 6350 /* image_atomic_umin */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34305   { 6350 /* image_atomic_umin */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34442   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34451   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34460   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34469   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34478   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34487   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34496   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34505   { 6368 /* image_atomic_xor */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34514   { 6368 /* image_atomic_xor */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34523   { 6368 /* image_atomic_xor */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34532   { 6368 /* image_atomic_xor */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34541   { 6368 /* image_atomic_xor */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34550   { 6368 /* image_atomic_xor */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34559   { 6368 /* image_atomic_xor */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34677   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34687   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34697   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34707   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34717   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34727   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34737   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34747   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34757   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34767   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34777   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34787   { 6385 /* image_gather4 */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34797   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34807   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34817   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34827   { 6385 /* image_gather4 */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34837   { 6385 /* image_gather4 */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34847   { 6385 /* image_gather4 */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34938   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34948   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34958   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34968   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34978   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34988   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
34998   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35008   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35018   { 6399 /* image_gather4_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35028   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35038   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35048   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35058   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35068   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35078   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35088   { 6399 /* image_gather4_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35098   { 6399 /* image_gather4_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35108   { 6399 /* image_gather4_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35226   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35236   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35246   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35256   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35266   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35276   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35286   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35296   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35306   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35316   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35326   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35336   { 6415 /* image_gather4_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35346   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35356   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35366   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35376   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35386   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35396   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35406   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35416   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35426   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35436   { 6415 /* image_gather4_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35446   { 6415 /* image_gather4_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35456   { 6415 /* image_gather4_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35547   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35557   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35567   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35577   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35587   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35597   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35607   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35617   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35627   { 6434 /* image_gather4_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35637   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35647   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35657   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35667   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35677   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35687   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35697   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35707   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35717   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35727   { 6434 /* image_gather4_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35737   { 6434 /* image_gather4_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35747   { 6434 /* image_gather4_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35838   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35848   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35858   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35868   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35878   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35888   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35898   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35908   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35918   { 6455 /* image_gather4_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35928   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35938   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35948   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35958   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35968   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35978   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35988   { 6455 /* image_gather4_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
35998   { 6455 /* image_gather4_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36008   { 6455 /* image_gather4_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36099   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36109   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36119   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36129   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36139   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36149   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36159   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36169   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36179   { 6473 /* image_gather4_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36189   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36199   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36209   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36219   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36229   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36239   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36249   { 6473 /* image_gather4_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36259   { 6473 /* image_gather4_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36269   { 6473 /* image_gather4_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36360   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36370   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36380   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36390   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36400   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36410   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36420   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36430   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36440   { 6489 /* image_gather4_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36450   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36460   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36470   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36480   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36490   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36500   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36510   { 6489 /* image_gather4_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36520   { 6489 /* image_gather4_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36530   { 6489 /* image_gather4_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36621   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36631   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36641   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36651   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36661   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36671   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36681   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36691   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36701   { 6507 /* image_gather4_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36711   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36721   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36731   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36741   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36751   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36761   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36771   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36781   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36791   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36801   { 6507 /* image_gather4_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36811   { 6507 /* image_gather4_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36821   { 6507 /* image_gather4_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36885   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36895   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36905   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36915   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36925   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36935   { 6528 /* image_gather4_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36945   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36955   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36965   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36975   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36985   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
36995   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37005   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37015   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37025   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37035   { 6528 /* image_gather4_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37045   { 6528 /* image_gather4_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37055   { 6528 /* image_gather4_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37119   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37129   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37139   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37149   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37159   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37169   { 6551 /* image_gather4_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37179   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37189   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37199   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37209   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37219   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37229   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37239   { 6551 /* image_gather4_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37249   { 6551 /* image_gather4_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37259   { 6551 /* image_gather4_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37377   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37387   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37397   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37407   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37417   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37427   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37437   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37447   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37457   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37467   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37477   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37487   { 6571 /* image_gather4_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37497   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37507   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37517   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37527   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37537   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37547   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37557   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37567   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37577   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37587   { 6571 /* image_gather4_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37597   { 6571 /* image_gather4_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37607   { 6571 /* image_gather4_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37698   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37708   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37718   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37728   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37738   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37748   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37758   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37768   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37778   { 6590 /* image_gather4_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37788   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37798   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37808   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37818   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37828   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37838   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37848   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37858   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37868   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37878   { 6590 /* image_gather4_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37888   { 6590 /* image_gather4_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
37898   { 6590 /* image_gather4_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38016   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38026   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38036   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38046   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38056   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38066   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38076   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38086   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38096   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38106   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38116   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38126   { 6611 /* image_gather4_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38136   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38146   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38156   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38166   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38176   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38186   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38196   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38206   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38216   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38226   { 6611 /* image_gather4_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38236   { 6611 /* image_gather4_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38246   { 6611 /* image_gather4_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38337   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38347   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38357   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38367   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38377   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38387   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38397   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38407   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38417   { 6629 /* image_gather4_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38427   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38437   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38447   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38457   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38467   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38477   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38487   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38497   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38507   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38517   { 6629 /* image_gather4_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38527   { 6629 /* image_gather4_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38537   { 6629 /* image_gather4_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38628   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38638   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38648   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38658   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38668   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38678   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38688   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38698   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38708   { 6649 /* image_gather4_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38718   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38728   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38738   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38748   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38758   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38768   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38778   { 6649 /* image_gather4_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38788   { 6649 /* image_gather4_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38798   { 6649 /* image_gather4_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38889   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38899   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38909   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38919   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38929   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38939   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38949   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38959   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38969   { 6668 /* image_gather4_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38979   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38989   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
38999   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39009   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39019   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39029   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39039   { 6668 /* image_gather4_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39049   { 6668 /* image_gather4_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39059   { 6668 /* image_gather4_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39150   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39160   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39170   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39180   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39190   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39200   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39210   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39220   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39230   { 6689 /* image_gather4_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39240   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39250   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39260   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39270   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39280   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39290   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39300   { 6689 /* image_gather4_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39310   { 6689 /* image_gather4_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39320   { 6689 /* image_gather4_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39438   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39448   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39458   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39468   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39478   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39488   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39498   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39508   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39518   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39528   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39538   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39548   { 6707 /* image_gather4_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39558   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39568   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39578   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39588   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39598   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39608   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39618   { 6707 /* image_gather4_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39628   { 6707 /* image_gather4_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39638   { 6707 /* image_gather4_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39756   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39766   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39776   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39786   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39796   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39806   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39816   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39826   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39836   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39846   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39856   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39866   { 6724 /* image_gather4_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39876   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39886   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39896   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39906   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39916   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39926   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39936   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39946   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39956   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39966   { 6724 /* image_gather4_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39976   { 6724 /* image_gather4_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
39986   { 6724 /* image_gather4_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40104   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40114   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40124   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40134   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40144   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40154   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40164   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40174   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40184   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40194   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40204   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40214   { 6743 /* image_gather4_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40224   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40234   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40244   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40254   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40264   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40274   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40284   { 6743 /* image_gather4_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40294   { 6743 /* image_gather4_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40304   { 6743 /* image_gather4_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40422   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40432   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40442   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40452   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40462   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40472   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40482   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40492   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40502   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40512   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40522   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40532   { 6759 /* image_gather4_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40542   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40552   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40562   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40572   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40582   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40592   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40602   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40612   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40622   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40632   { 6759 /* image_gather4_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40642   { 6759 /* image_gather4_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40652   { 6759 /* image_gather4_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40770   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40780   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40790   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40800   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40810   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40820   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40830   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40840   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40850   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40860   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40870   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40880   { 6777 /* image_gather4_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40890   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40900   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40910   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40920   { 6777 /* image_gather4_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40930   { 6777 /* image_gather4_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
40940   { 6777 /* image_gather4_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41031   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41041   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41051   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41061   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41071   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41081   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41091   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41101   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41111   { 6794 /* image_gather4_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41121   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41131   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41141   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41151   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41161   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41171   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41181   { 6794 /* image_gather4_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41191   { 6794 /* image_gather4_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41201   { 6794 /* image_gather4_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41292   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41302   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41312   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41322   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41332   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41342   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41352   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41362   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41372   { 6813 /* image_gather4_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41382   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41392   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41402   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41412   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41422   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41432   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41442   { 6813 /* image_gather4_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41452   { 6813 /* image_gather4_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41462   { 6813 /* image_gather4_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41631   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41640   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41649   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41658   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41667   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41676   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41685   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41694   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41703   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41712   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41721   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41730   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41739   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41748   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41757   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41766   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41775   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41784   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41793   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41802   { 6829 /* image_get_lod */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41811   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41820   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41829   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41838   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41847   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41856   { 6829 /* image_get_lod */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41865   { 6829 /* image_get_lod */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41874   { 6829 /* image_get_lod */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41883   { 6829 /* image_get_lod */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
41892   { 6829 /* image_get_lod */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42061   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42070   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42079   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42088   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42097   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42106   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42115   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42124   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42133   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42142   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42151   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42160   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42169   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42178   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42187   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42196   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42205   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42214   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42223   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42232   { 6843 /* image_get_resinfo */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42241   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42250   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42259   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42268   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42277   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42286   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42295   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42304   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42313   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42322   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42331   { 6843 /* image_get_resinfo */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42340   { 6843 /* image_get_resinfo */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42349   { 6843 /* image_get_resinfo */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42358   { 6843 /* image_get_resinfo */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42367   { 6843 /* image_get_resinfo */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42557   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42567   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42577   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42587   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42597   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42607   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42617   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42627   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42637   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42647   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42657   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42667   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42677   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42687   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42697   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42707   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42717   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42727   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42737   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42747   { 6861 /* image_load */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42757   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42767   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42777   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42787   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42797   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42807   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42817   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42827   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42837   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42847   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42857   { 6861 /* image_load */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42867   { 6861 /* image_load */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42877   { 6861 /* image_load */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42887   { 6861 /* image_load */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
42897   { 6861 /* image_load */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43087   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43097   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43107   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43117   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43127   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43137   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43147   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43157   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43167   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43177   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43187   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43197   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43207   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43217   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43227   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43237   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43247   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43257   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43267   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43277   { 6872 /* image_load_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43287   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43297   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43307   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43317   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43327   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43337   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43347   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43357   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43367   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43377   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43387   { 6872 /* image_load_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43397   { 6872 /* image_load_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43407   { 6872 /* image_load_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43417   { 6872 /* image_load_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43427   { 6872 /* image_load_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43596   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43605   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43614   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43623   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43632   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43641   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43650   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43659   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43668   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43677   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43686   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43695   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43704   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43713   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43722   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43731   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43740   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43749   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43758   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43767   { 6887 /* image_load_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43776   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43785   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43794   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43803   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43812   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43821   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43830   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43839   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43848   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43857   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43866   { 6887 /* image_load_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43875   { 6887 /* image_load_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43884   { 6887 /* image_load_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43893   { 6887 /* image_load_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
43902   { 6887 /* image_load_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44071   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44080   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44089   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44098   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44107   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44116   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44125   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44134   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44143   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44152   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44161   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44170   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44179   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44188   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44197   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44206   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44215   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44224   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44233   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44242   { 6906 /* image_load_mip_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44251   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44260   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44269   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44278   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44287   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44296   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44305   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44314   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44323   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44332   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44341   { 6906 /* image_load_mip_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44350   { 6906 /* image_load_mip_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44359   { 6906 /* image_load_mip_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44368   { 6906 /* image_load_mip_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44377   { 6906 /* image_load_mip_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44546   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44555   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44564   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44573   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44582   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44591   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44600   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44609   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44618   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44627   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44636   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44645   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44654   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44663   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44672   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44681   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44690   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44699   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44708   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44717   { 6929 /* image_load_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44726   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44735   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44744   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44753   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44762   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44771   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44780   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44789   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44798   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44807   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44816   { 6929 /* image_load_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44825   { 6929 /* image_load_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44834   { 6929 /* image_load_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44843   { 6929 /* image_load_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
44852   { 6929 /* image_load_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45021   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45030   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45039   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45048   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45057   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45066   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45075   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45084   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45093   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45102   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45111   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45120   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45129   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45138   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45147   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45156   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45165   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45174   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45183   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45192   { 6944 /* image_load_pck_sgn */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45201   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45210   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45219   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45228   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45237   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45246   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45255   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45264   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45273   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45282   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45291   { 6944 /* image_load_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45300   { 6944 /* image_load_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45309   { 6944 /* image_load_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45318   { 6944 /* image_load_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45327   { 6944 /* image_load_pck_sgn */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45517   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45527   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45537   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45547   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45557   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45567   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45577   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45587   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45597   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45607   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45617   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45627   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45637   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45647   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45657   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45667   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45677   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45687   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45697   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45707   { 6963 /* image_sample */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45717   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45727   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45737   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45747   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45757   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45767   { 6963 /* image_sample */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45777   { 6963 /* image_sample */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45787   { 6963 /* image_sample */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45797   { 6963 /* image_sample */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45807   { 6963 /* image_sample */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45952   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45962   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45972   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45982   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
45992   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46002   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46012   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46022   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46032   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46042   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46052   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46062   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46072   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46082   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46092   { 6976 /* image_sample_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46102   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46112   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46122   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46132   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46142   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46152   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46162   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46172   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46182   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46192   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46202   { 6976 /* image_sample_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46212   { 6976 /* image_sample_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46222   { 6976 /* image_sample_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46232   { 6976 /* image_sample_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46242   { 6976 /* image_sample_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46432   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46442   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46452   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46462   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46472   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46482   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46492   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46502   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46512   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46522   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46532   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46542   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46552   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46562   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46572   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46582   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46592   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46602   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46612   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46622   { 6991 /* image_sample_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46632   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46642   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46652   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46662   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46672   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46682   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46692   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46702   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46712   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46722   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46732   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46742   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46752   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46762   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46772   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46782   { 6991 /* image_sample_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46792   { 6991 /* image_sample_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46802   { 6991 /* image_sample_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46812   { 6991 /* image_sample_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46822   { 6991 /* image_sample_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46967   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46977   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46987   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
46997   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47007   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47017   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47027   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47037   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47047   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47057   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47067   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47077   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47087   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47097   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47107   { 7009 /* image_sample_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47117   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47127   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47137   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47147   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47157   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47167   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47177   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47187   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47197   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47207   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47217   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47227   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47237   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47247   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47257   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47267   { 7009 /* image_sample_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47277   { 7009 /* image_sample_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47287   { 7009 /* image_sample_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47297   { 7009 /* image_sample_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47307   { 7009 /* image_sample_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47452   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47462   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47472   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47482   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47492   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47502   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47512   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47522   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47532   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47542   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47552   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47562   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47572   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47582   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47592   { 7029 /* image_sample_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47602   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47612   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47622   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47632   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47642   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47652   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47662   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47672   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47682   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47692   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47702   { 7029 /* image_sample_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47712   { 7029 /* image_sample_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47722   { 7029 /* image_sample_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47732   { 7029 /* image_sample_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47742   { 7029 /* image_sample_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47887   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47897   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47907   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47917   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47927   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47937   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47947   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47957   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47967   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47977   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47987   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
47997   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48007   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48017   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48027   { 7046 /* image_sample_c */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48037   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48047   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48057   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48067   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48077   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48087   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48097   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48107   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48117   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48127   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48137   { 7046 /* image_sample_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48147   { 7046 /* image_sample_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48157   { 7046 /* image_sample_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48167   { 7046 /* image_sample_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48177   { 7046 /* image_sample_c */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48322   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48332   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48342   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48352   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48362   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48372   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48382   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48392   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48402   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48412   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48422   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48432   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48442   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48452   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48462   { 7061 /* image_sample_c_b */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48472   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48482   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48492   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48502   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48512   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48522   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48532   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48542   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48552   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48562   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48572   { 7061 /* image_sample_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48582   { 7061 /* image_sample_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48592   { 7061 /* image_sample_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48602   { 7061 /* image_sample_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48612   { 7061 /* image_sample_c_b */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48757   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48767   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48777   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48787   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48797   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48807   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48817   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48827   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48837   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48847   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48857   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48867   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48877   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48887   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48897   { 7078 /* image_sample_c_b_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48907   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48917   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48927   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48937   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48947   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48957   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48967   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48977   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48987   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
48997   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49007   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49017   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49027   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49037   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49047   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49057   { 7078 /* image_sample_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49067   { 7078 /* image_sample_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49077   { 7078 /* image_sample_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49087   { 7078 /* image_sample_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49097   { 7078 /* image_sample_c_b_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49197   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49207   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49217   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49227   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49237   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49247   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49257   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49267   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49277   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49287   { 7098 /* image_sample_c_b_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49297   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49307   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49317   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49327   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49337   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49347   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49357   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49367   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49377   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49387   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49397   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49407   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49417   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49427   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49437   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49447   { 7098 /* image_sample_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49457   { 7098 /* image_sample_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49467   { 7098 /* image_sample_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49477   { 7098 /* image_sample_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49487   { 7098 /* image_sample_c_b_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49587   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49597   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49607   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49617   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49627   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49637   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49647   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49657   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49667   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49677   { 7120 /* image_sample_c_b_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49687   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49697   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49707   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49717   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49727   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49737   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49747   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49757   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49767   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49777   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49787   { 7120 /* image_sample_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49797   { 7120 /* image_sample_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49807   { 7120 /* image_sample_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49817   { 7120 /* image_sample_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
49827   { 7120 /* image_sample_c_b_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50017   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50027   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50037   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50047   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50057   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50067   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50077   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50087   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50097   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50107   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50117   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50127   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50137   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50147   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50157   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50167   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50177   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50187   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50197   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50207   { 7139 /* image_sample_c_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50217   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50227   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50237   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50247   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50257   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50267   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50277   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50287   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50297   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50307   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50317   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50327   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50337   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50347   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50357   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50367   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50377   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50387   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50397   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50407   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50417   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50427   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50437   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50447   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50457   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50467   { 7139 /* image_sample_c_cd */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50477   { 7139 /* image_sample_c_cd */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50487   { 7139 /* image_sample_c_cd */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50497   { 7139 /* image_sample_c_cd */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50507   { 7139 /* image_sample_c_cd */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50517   { 7139 /* image_sample_c_cd */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50527   { 7139 /* image_sample_c_cd */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50537   { 7139 /* image_sample_c_cd */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50547   { 7139 /* image_sample_c_cd */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50557   { 7139 /* image_sample_c_cd */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50747   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50757   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50767   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50777   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50787   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50797   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50807   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50817   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50827   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50837   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50847   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50857   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50867   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50877   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50887   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50897   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50907   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50917   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50927   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50937   { 7157 /* image_sample_c_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50947   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50957   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50967   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50977   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50987   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
50997   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51007   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51017   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51027   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51037   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51047   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51057   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51067   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51077   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51087   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51097   { 7157 /* image_sample_c_cd_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51107   { 7157 /* image_sample_c_cd_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51117   { 7157 /* image_sample_c_cd_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51127   { 7157 /* image_sample_c_cd_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51137   { 7157 /* image_sample_c_cd_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51147   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51157   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51167   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51177   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51187   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51197   { 7157 /* image_sample_c_cd_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51207   { 7157 /* image_sample_c_cd_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51217   { 7157 /* image_sample_c_cd_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51227   { 7157 /* image_sample_c_cd_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51237   { 7157 /* image_sample_c_cd_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51247   { 7157 /* image_sample_c_cd_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51257   { 7157 /* image_sample_c_cd_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51267   { 7157 /* image_sample_c_cd_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51277   { 7157 /* image_sample_c_cd_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51287   { 7157 /* image_sample_c_cd_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51432   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51442   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51452   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51462   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51472   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51482   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51492   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51502   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51512   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51522   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51532   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51542   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51552   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51562   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51572   { 7178 /* image_sample_c_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51582   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51592   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51602   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51612   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51622   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51632   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51642   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51652   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51662   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51672   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51682   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51692   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51702   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51712   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51722   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51732   { 7178 /* image_sample_c_cd_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51742   { 7178 /* image_sample_c_cd_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51752   { 7178 /* image_sample_c_cd_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51762   { 7178 /* image_sample_c_cd_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51772   { 7178 /* image_sample_c_cd_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51782   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51792   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51802   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51812   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51822   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51832   { 7178 /* image_sample_c_cd_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51842   { 7178 /* image_sample_c_cd_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51852   { 7178 /* image_sample_c_cd_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51862   { 7178 /* image_sample_c_cd_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51872   { 7178 /* image_sample_c_cd_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51882   { 7178 /* image_sample_c_cd_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51892   { 7178 /* image_sample_c_cd_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51902   { 7178 /* image_sample_c_cd_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51912   { 7178 /* image_sample_c_cd_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
51922   { 7178 /* image_sample_c_cd_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52067   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52077   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52087   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52097   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52107   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52117   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52127   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52137   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52147   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52157   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52167   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52177   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52187   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52197   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52207   { 7201 /* image_sample_c_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52217   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52227   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52237   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52247   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52257   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52267   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52277   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52287   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52297   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52307   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52317   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52327   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52337   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52347   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52357   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52367   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52377   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52387   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52397   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52407   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52417   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52427   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52437   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52447   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52457   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52467   { 7201 /* image_sample_c_cd_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52477   { 7201 /* image_sample_c_cd_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52487   { 7201 /* image_sample_c_cd_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52497   { 7201 /* image_sample_c_cd_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52507   { 7201 /* image_sample_c_cd_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52517   { 7201 /* image_sample_c_cd_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52527   { 7201 /* image_sample_c_cd_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52537   { 7201 /* image_sample_c_cd_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52547   { 7201 /* image_sample_c_cd_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52557   { 7201 /* image_sample_c_cd_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52747   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52757   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52767   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52777   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52787   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52797   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52807   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52817   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52827   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52837   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52847   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52857   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52867   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52877   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52887   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52897   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52907   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52917   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52927   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52937   { 7221 /* image_sample_c_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52947   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52957   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52967   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52977   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52987   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
52997   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53007   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53017   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53027   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53037   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53047   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53057   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53067   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53077   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53087   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53097   { 7221 /* image_sample_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53107   { 7221 /* image_sample_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53117   { 7221 /* image_sample_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53127   { 7221 /* image_sample_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53137   { 7221 /* image_sample_c_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53282   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53292   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53302   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53312   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53322   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53332   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53342   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53352   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53362   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53372   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53382   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53392   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53402   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53412   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53422   { 7239 /* image_sample_c_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53432   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53442   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53452   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53462   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53472   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53482   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53492   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53502   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53512   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53522   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53532   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53542   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53552   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53562   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53572   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53582   { 7239 /* image_sample_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53592   { 7239 /* image_sample_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53602   { 7239 /* image_sample_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53612   { 7239 /* image_sample_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53622   { 7239 /* image_sample_c_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53812   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53822   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53832   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53842   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53852   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53862   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53872   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53882   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53892   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53902   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53912   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53922   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53932   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53942   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53952   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53962   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53972   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53982   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
53992   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54002   { 7259 /* image_sample_c_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54012   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54022   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54032   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54042   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54052   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54062   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54072   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54082   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54092   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54102   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54112   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54122   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54132   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54142   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54152   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54162   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54172   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54182   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54192   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54202   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54212   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54222   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54232   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54242   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54252   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54262   { 7259 /* image_sample_c_d */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54272   { 7259 /* image_sample_c_d */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54282   { 7259 /* image_sample_c_d */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54292   { 7259 /* image_sample_c_d */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54302   { 7259 /* image_sample_c_d */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54312   { 7259 /* image_sample_c_d */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54322   { 7259 /* image_sample_c_d */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54332   { 7259 /* image_sample_c_d */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54342   { 7259 /* image_sample_c_d */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54352   { 7259 /* image_sample_c_d */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54542   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54552   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54562   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54572   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54582   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54592   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54602   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54612   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54622   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54632   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54642   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54652   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54662   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54672   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54682   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54692   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54702   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54712   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54722   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54732   { 7276 /* image_sample_c_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54742   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54752   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54762   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54772   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54782   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54792   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54802   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54812   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54822   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54832   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54842   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54852   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54862   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54872   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54882   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54892   { 7276 /* image_sample_c_d_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54902   { 7276 /* image_sample_c_d_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54912   { 7276 /* image_sample_c_d_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54922   { 7276 /* image_sample_c_d_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54932   { 7276 /* image_sample_c_d_cl */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54942   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54952   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54962   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54972   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54982   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
54992   { 7276 /* image_sample_c_d_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55002   { 7276 /* image_sample_c_d_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55012   { 7276 /* image_sample_c_d_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55022   { 7276 /* image_sample_c_d_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55032   { 7276 /* image_sample_c_d_cl */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55042   { 7276 /* image_sample_c_d_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55052   { 7276 /* image_sample_c_d_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55062   { 7276 /* image_sample_c_d_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55072   { 7276 /* image_sample_c_d_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55082   { 7276 /* image_sample_c_d_cl */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55227   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55237   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55247   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55257   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55267   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55277   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55287   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55297   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55307   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55317   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55327   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55337   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55347   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55357   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55367   { 7296 /* image_sample_c_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55377   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55387   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55397   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55407   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55417   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55427   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55437   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55447   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55457   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55467   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55477   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55487   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55497   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55507   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55517   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55527   { 7296 /* image_sample_c_d_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55537   { 7296 /* image_sample_c_d_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55547   { 7296 /* image_sample_c_d_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55557   { 7296 /* image_sample_c_d_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55567   { 7296 /* image_sample_c_d_cl_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55577   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55587   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55597   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55607   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55617   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55627   { 7296 /* image_sample_c_d_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55637   { 7296 /* image_sample_c_d_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55647   { 7296 /* image_sample_c_d_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55657   { 7296 /* image_sample_c_d_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55667   { 7296 /* image_sample_c_d_cl_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55677   { 7296 /* image_sample_c_d_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55687   { 7296 /* image_sample_c_d_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55697   { 7296 /* image_sample_c_d_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55707   { 7296 /* image_sample_c_d_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55717   { 7296 /* image_sample_c_d_cl_o */, 262144 /* 18 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55862   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55872   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55882   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55892   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55902   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55912   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55922   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55932   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55942   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55952   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55962   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55972   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55982   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
55992   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56002   { 7318 /* image_sample_c_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56012   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56022   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56032   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56042   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56052   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56062   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56072   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56082   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56092   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56102   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56112   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56122   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56132   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56142   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56152   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56162   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56172   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56182   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56192   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56202   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56212   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56222   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56232   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56242   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56252   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56262   { 7318 /* image_sample_c_d_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56272   { 7318 /* image_sample_c_d_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56282   { 7318 /* image_sample_c_d_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56292   { 7318 /* image_sample_c_d_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56302   { 7318 /* image_sample_c_d_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56312   { 7318 /* image_sample_c_d_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56322   { 7318 /* image_sample_c_d_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56332   { 7318 /* image_sample_c_d_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56342   { 7318 /* image_sample_c_d_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56352   { 7318 /* image_sample_c_d_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56542   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56552   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56562   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56572   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56582   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56592   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56602   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56612   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56622   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56632   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56642   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56652   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56662   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56672   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56682   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56692   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56702   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56712   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56722   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56732   { 7337 /* image_sample_c_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56742   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56752   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56762   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56772   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56782   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56792   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56802   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56812   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56822   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56832   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56842   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56852   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56862   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56872   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56882   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56892   { 7337 /* image_sample_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56902   { 7337 /* image_sample_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56912   { 7337 /* image_sample_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56922   { 7337 /* image_sample_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
56932   { 7337 /* image_sample_c_l */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57077   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57087   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57097   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57107   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57117   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57127   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57137   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57147   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57157   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57167   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57177   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57187   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57197   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57207   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57217   { 7354 /* image_sample_c_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57227   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57237   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57247   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57257   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57267   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57277   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57287   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57297   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57307   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57317   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57327   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57337   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57347   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57357   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57367   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57377   { 7354 /* image_sample_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57387   { 7354 /* image_sample_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57397   { 7354 /* image_sample_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57407   { 7354 /* image_sample_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57417   { 7354 /* image_sample_c_l_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57562   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57572   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57582   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57592   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57602   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57612   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57622   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57632   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57642   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57652   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57662   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57672   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57682   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57692   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57702   { 7373 /* image_sample_c_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57712   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57722   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57732   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57742   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57752   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57762   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57772   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57782   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57792   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57802   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57812   { 7373 /* image_sample_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57822   { 7373 /* image_sample_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57832   { 7373 /* image_sample_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57842   { 7373 /* image_sample_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57852   { 7373 /* image_sample_c_lz */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
57997   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58007   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58017   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58027   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58037   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58047   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58057   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58067   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58077   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58087   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58097   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58107   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58117   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58127   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58137   { 7391 /* image_sample_c_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58147   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58157   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58167   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58177   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58187   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58197   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58207   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58217   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58227   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58237   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58247   { 7391 /* image_sample_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58257   { 7391 /* image_sample_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58267   { 7391 /* image_sample_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58277   { 7391 /* image_sample_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58287   { 7391 /* image_sample_c_lz_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58432   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58442   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58452   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58462   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58472   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58482   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58492   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58502   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58512   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58522   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58532   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58542   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58552   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58562   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58572   { 7411 /* image_sample_c_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58582   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58592   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58602   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58612   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58622   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58632   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58642   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58652   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58662   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58672   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58682   { 7411 /* image_sample_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58692   { 7411 /* image_sample_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58702   { 7411 /* image_sample_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58712   { 7411 /* image_sample_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58722   { 7411 /* image_sample_c_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58957   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58967   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58977   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58987   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
58997   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59007   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59017   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59027   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59037   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59047   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59057   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59067   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59077   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59087   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59097   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59107   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59117   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59127   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59137   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59147   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59157   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59167   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59177   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59187   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59197   { 7428 /* image_sample_cd */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59207   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59217   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59227   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59237   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59247   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59257   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59267   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59277   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59287   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59297   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59307   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59317   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59327   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59337   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59347   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59357   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59367   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59377   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59387   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59397   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59407   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59417   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59427   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59437   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59447   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59457   { 7428 /* image_sample_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59467   { 7428 /* image_sample_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59477   { 7428 /* image_sample_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59487   { 7428 /* image_sample_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59497   { 7428 /* image_sample_cd */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59507   { 7428 /* image_sample_cd */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59517   { 7428 /* image_sample_cd */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59527   { 7428 /* image_sample_cd */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59537   { 7428 /* image_sample_cd */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59547   { 7428 /* image_sample_cd */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59782   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59792   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59802   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59812   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59822   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59832   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59842   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59852   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59862   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59872   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59882   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59892   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59902   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59912   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59922   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59932   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59942   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59952   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59962   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59972   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59982   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
59992   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60002   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60012   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60022   { 7444 /* image_sample_cd_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60032   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60042   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60052   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60062   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60072   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60082   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60092   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60102   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60112   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60122   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60132   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60142   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60152   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60162   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60172   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60182   { 7444 /* image_sample_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60192   { 7444 /* image_sample_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60202   { 7444 /* image_sample_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60212   { 7444 /* image_sample_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60222   { 7444 /* image_sample_cd_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60232   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60242   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60252   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60262   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60272   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60282   { 7444 /* image_sample_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60292   { 7444 /* image_sample_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60302   { 7444 /* image_sample_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60312   { 7444 /* image_sample_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60322   { 7444 /* image_sample_cd_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60332   { 7444 /* image_sample_cd_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60342   { 7444 /* image_sample_cd_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60352   { 7444 /* image_sample_cd_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60362   { 7444 /* image_sample_cd_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60372   { 7444 /* image_sample_cd_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60562   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60572   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60582   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60592   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60602   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60612   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60622   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60632   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60642   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60652   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60662   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60672   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60682   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60692   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60702   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60712   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60722   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60732   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60742   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60752   { 7463 /* image_sample_cd_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60762   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60772   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60782   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60792   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60802   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60812   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60822   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60832   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60842   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60852   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60862   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60872   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60882   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60892   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60902   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60912   { 7463 /* image_sample_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60922   { 7463 /* image_sample_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60932   { 7463 /* image_sample_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60942   { 7463 /* image_sample_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60952   { 7463 /* image_sample_cd_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60962   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60972   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60982   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
60992   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61002   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61012   { 7463 /* image_sample_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61022   { 7463 /* image_sample_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61032   { 7463 /* image_sample_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61042   { 7463 /* image_sample_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61052   { 7463 /* image_sample_cd_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61062   { 7463 /* image_sample_cd_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61072   { 7463 /* image_sample_cd_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61082   { 7463 /* image_sample_cd_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61092   { 7463 /* image_sample_cd_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61102   { 7463 /* image_sample_cd_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61292   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61302   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61312   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61322   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61332   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61342   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61352   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61362   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61372   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61382   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61392   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61402   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61412   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61422   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61432   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61442   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61452   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61462   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61472   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61482   { 7484 /* image_sample_cd_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61492   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61502   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61512   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61522   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61532   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61542   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61552   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61562   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61572   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61582   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61592   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61602   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61612   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61622   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61632   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61642   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61652   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61662   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61672   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61682   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61692   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61702   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61712   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61722   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61732   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61742   { 7484 /* image_sample_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61752   { 7484 /* image_sample_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61762   { 7484 /* image_sample_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61772   { 7484 /* image_sample_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61782   { 7484 /* image_sample_cd_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61792   { 7484 /* image_sample_cd_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61802   { 7484 /* image_sample_cd_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61812   { 7484 /* image_sample_cd_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61822   { 7484 /* image_sample_cd_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
61832   { 7484 /* image_sample_cd_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62022   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62032   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62042   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62052   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62062   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62072   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62082   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62092   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62102   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62112   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62122   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62132   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62142   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62152   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62162   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62172   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62182   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62192   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62202   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62212   { 7502 /* image_sample_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62222   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62232   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62242   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62252   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62262   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62272   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62282   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62292   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62302   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62312   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62322   { 7502 /* image_sample_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62332   { 7502 /* image_sample_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62342   { 7502 /* image_sample_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62352   { 7502 /* image_sample_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62362   { 7502 /* image_sample_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62552   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62562   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62572   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62582   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62592   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62602   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62612   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62622   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62632   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62642   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62652   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62662   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62672   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62682   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62692   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62702   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62712   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62722   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62732   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62742   { 7518 /* image_sample_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62752   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62762   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62772   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62782   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62792   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62802   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62812   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62822   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62832   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62842   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62852   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62862   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62872   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62882   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62892   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62902   { 7518 /* image_sample_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62912   { 7518 /* image_sample_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62922   { 7518 /* image_sample_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62932   { 7518 /* image_sample_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
62942   { 7518 /* image_sample_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63177   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63187   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63197   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63207   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63217   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63227   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63237   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63247   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63257   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63267   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63277   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63287   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63297   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63307   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63317   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63327   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63337   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63347   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63357   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63367   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63377   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63387   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63397   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63407   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63417   { 7536 /* image_sample_d */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63427   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63437   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63447   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63457   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63467   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63477   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63487   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63497   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63507   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63517   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63527   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63537   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63547   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63557   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63567   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63577   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63587   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63597   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63607   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63617   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63627   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63637   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63647   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63657   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63667   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63677   { 7536 /* image_sample_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63687   { 7536 /* image_sample_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63697   { 7536 /* image_sample_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63707   { 7536 /* image_sample_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63717   { 7536 /* image_sample_d */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63727   { 7536 /* image_sample_d */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63737   { 7536 /* image_sample_d */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63747   { 7536 /* image_sample_d */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63757   { 7536 /* image_sample_d */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
63767   { 7536 /* image_sample_d */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64002   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64012   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64022   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64032   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64042   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64052   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64062   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64072   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64082   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64092   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64102   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64112   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64122   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64132   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64142   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64152   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64162   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64172   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64182   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64192   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64202   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64212   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64222   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64232   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64242   { 7551 /* image_sample_d_cl */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64252   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64262   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64272   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64282   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64292   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64302   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64312   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64322   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64332   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64342   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64352   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64362   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64372   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64382   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64392   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64402   { 7551 /* image_sample_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64412   { 7551 /* image_sample_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64422   { 7551 /* image_sample_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64432   { 7551 /* image_sample_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64442   { 7551 /* image_sample_d_cl */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64452   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64462   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64472   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64482   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64492   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64502   { 7551 /* image_sample_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64512   { 7551 /* image_sample_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64522   { 7551 /* image_sample_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64532   { 7551 /* image_sample_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64542   { 7551 /* image_sample_d_cl */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64552   { 7551 /* image_sample_d_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64562   { 7551 /* image_sample_d_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64572   { 7551 /* image_sample_d_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64582   { 7551 /* image_sample_d_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64592   { 7551 /* image_sample_d_cl */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64782   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64792   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64802   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64812   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64822   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64832   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64842   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64852   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64862   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64872   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64882   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64892   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64902   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64912   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64922   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64932   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64942   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64952   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64962   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64972   { 7569 /* image_sample_d_cl_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64982   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
64992   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65002   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65012   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65022   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65032   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65042   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65052   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65062   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65072   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65082   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65092   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65102   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65112   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65122   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65132   { 7569 /* image_sample_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65142   { 7569 /* image_sample_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65152   { 7569 /* image_sample_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65162   { 7569 /* image_sample_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65172   { 7569 /* image_sample_d_cl_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65182   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65192   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65202   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65212   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65222   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65232   { 7569 /* image_sample_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65242   { 7569 /* image_sample_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65252   { 7569 /* image_sample_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65262   { 7569 /* image_sample_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65272   { 7569 /* image_sample_d_cl_o */, 32768 /* 15 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65282   { 7569 /* image_sample_d_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65292   { 7569 /* image_sample_d_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65302   { 7569 /* image_sample_d_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65312   { 7569 /* image_sample_d_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65322   { 7569 /* image_sample_d_cl_o */, 131072 /* 17 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65512   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65522   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65532   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65542   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65552   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65562   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65572   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65582   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65592   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65602   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65612   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65622   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65632   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65642   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65652   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65662   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65672   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65682   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65692   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65702   { 7589 /* image_sample_d_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65712   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65722   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65732   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65742   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65752   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65762   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65772   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65782   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65792   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65802   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65812   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65822   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65832   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65842   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65852   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65862   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65872   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65882   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65892   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65902   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65912   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65922   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65932   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65942   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65952   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65962   { 7589 /* image_sample_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65972   { 7589 /* image_sample_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65982   { 7589 /* image_sample_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
65992   { 7589 /* image_sample_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66002   { 7589 /* image_sample_d_o */, 16384 /* 14 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66012   { 7589 /* image_sample_d_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66022   { 7589 /* image_sample_d_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66032   { 7589 /* image_sample_d_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66042   { 7589 /* image_sample_d_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66052   { 7589 /* image_sample_d_o */, 65536 /* 16 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66242   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66252   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66262   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66272   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66282   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66292   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66302   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66312   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66322   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66332   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66342   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66352   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66362   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66372   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66382   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66392   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66402   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66412   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66422   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66432   { 7606 /* image_sample_l */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66442   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66452   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66462   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66472   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66482   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66492   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66502   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66512   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66522   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66532   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66542   { 7606 /* image_sample_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66552   { 7606 /* image_sample_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66562   { 7606 /* image_sample_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66572   { 7606 /* image_sample_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66582   { 7606 /* image_sample_l */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66772   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66782   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66792   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66802   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66812   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66822   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66832   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66842   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66852   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66862   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66872   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66882   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66892   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66902   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66912   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66922   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66932   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66942   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66952   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66962   { 7621 /* image_sample_l_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66972   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66982   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
66992   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67002   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67012   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67022   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67032   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67042   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67052   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67062   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67072   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67082   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67092   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67102   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67112   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67122   { 7621 /* image_sample_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67132   { 7621 /* image_sample_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67142   { 7621 /* image_sample_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67152   { 7621 /* image_sample_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67162   { 7621 /* image_sample_l_o */, 2048 /* 11 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67352   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67362   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67372   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67382   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67392   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67402   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67412   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67422   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67432   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67442   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67452   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67462   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67472   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67482   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67492   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67502   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67512   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67522   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67532   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67542   { 7638 /* image_sample_lz */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67552   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67562   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67572   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67582   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67592   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67602   { 7638 /* image_sample_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67612   { 7638 /* image_sample_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67622   { 7638 /* image_sample_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67632   { 7638 /* image_sample_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67642   { 7638 /* image_sample_lz */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67787   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67797   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67807   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67817   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67827   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67837   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67847   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67857   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67867   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67877   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67887   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67897   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67907   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67917   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67927   { 7654 /* image_sample_lz_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67937   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67947   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67957   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67967   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67977   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67987   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
67997   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68007   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68017   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68027   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68037   { 7654 /* image_sample_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68047   { 7654 /* image_sample_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68057   { 7654 /* image_sample_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68067   { 7654 /* image_sample_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68077   { 7654 /* image_sample_lz_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68222   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68232   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68242   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68252   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68262   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68272   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68282   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68292   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68302   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68312   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68322   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68332   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68342   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68352   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68362   { 7672 /* image_sample_o */, 32 /* 5 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68372   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68382   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68392   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68402   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68412   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68422   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68432   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68442   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68452   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68462   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68472   { 7672 /* image_sample_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68482   { 7672 /* image_sample_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68492   { 7672 /* image_sample_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68502   { 7672 /* image_sample_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68512   { 7672 /* image_sample_o */, 1024 /* 10 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68666   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68676   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68686   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68696   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68706   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68716   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68726   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68736   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68746   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68756   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68766   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68776   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68786   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68796   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68806   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68816   { 7687 /* image_store */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68826   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68836   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68846   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68856   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68866   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68876   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68886   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68896   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68906   { 7687 /* image_store */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68916   { 7687 /* image_store */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68926   { 7687 /* image_store */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
68936   { 7687 /* image_store */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69090   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69100   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69110   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69120   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69130   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69140   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69150   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69160   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69170   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69180   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69190   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69200   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69210   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69220   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69230   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69240   { 7699 /* image_store_mip */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69250   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69260   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69270   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69280   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69290   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69300   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69310   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69320   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69330   { 7699 /* image_store_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69340   { 7699 /* image_store_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69350   { 7699 /* image_store_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69360   { 7699 /* image_store_mip */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69497   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69506   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69515   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69524   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69533   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69542   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69551   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69560   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69569   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69578   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69587   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69596   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69605   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69614   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69623   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69632   { 7715 /* image_store_mip_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69641   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69650   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69659   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69668   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69677   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69686   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69695   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69704   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69713   { 7715 /* image_store_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69722   { 7715 /* image_store_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69731   { 7715 /* image_store_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69740   { 7715 /* image_store_mip_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69877   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69886   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69895   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69904   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69913   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69922   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69931   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69940   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69949   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69958   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69967   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69976   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69985   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
69994   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70003   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70012   { 7735 /* image_store_pck */, 16 /* 4 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70021   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70030   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70039   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70048   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70057   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70066   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70075   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70084   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70093   { 7735 /* image_store_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70102   { 7735 /* image_store_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70111   { 7735 /* image_store_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
70120   { 7735 /* image_store_pck */, 512 /* 9 */, MCK_ImmDim, AMFBS_isGFX10Plus_isGFX10Plus },
80359   case MCK_ImmDim: