reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 5252   case MCK_ImmDMask:
 6148   case MCK_ImmDMask: {
10163   case MCK_ImmDMask: return "MCK_ImmDMask";
13436   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13437   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13438   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13439   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13440   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13441   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13442   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13443   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13444   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13445   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13446   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13447   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13448   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13449   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13450   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13451   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13452   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13453   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13454   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13455   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13456   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13457   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13458   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13459   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13460   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13461   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13462   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13463   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13464   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13465   { 6156 /* image_atomic_add */, AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13466   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13467   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13468   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13469   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13470   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13471   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13472   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13473   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13474   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13475   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13476   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13477   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13478   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13479   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13480   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13481   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13482   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13483   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13484   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13485   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13486   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13487   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13488   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13489   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13490   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13491   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13492   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13493   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13494   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13495   { 6173 /* image_atomic_and */, AMDGPU::IMAGE_ATOMIC_AND_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13496   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13497   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13498   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13499   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13500   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13501   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13502   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13503   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13504   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13505   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13506   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13507   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13508   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13509   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13510   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13511   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13512   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13513   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13514   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13515   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13516   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13517   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13518   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13519   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13520   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13521   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13522   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13523   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13524   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13525   { 6190 /* image_atomic_cmpswap */, AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13526   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13527   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13528   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13529   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13530   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13531   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13532   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13533   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13534   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13535   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13536   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13537   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13538   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13539   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13540   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13541   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13542   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13543   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13544   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13545   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13546   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13547   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13548   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13549   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13550   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13551   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13552   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13553   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13554   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13555   { 6211 /* image_atomic_dec */, AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13556   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13557   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13558   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13559   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13560   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13561   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13562   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13563   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13564   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13565   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13566   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13567   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13568   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13569   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13570   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13571   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13572   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13573   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13574   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13575   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13576   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13577   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13578   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13579   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13580   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13581   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13582   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13583   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13584   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13585   { 6228 /* image_atomic_inc */, AMDGPU::IMAGE_ATOMIC_INC_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13586   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13587   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13588   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13589   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13590   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13591   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13592   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13593   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13594   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13595   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13596   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13597   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13598   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13599   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13600   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13601   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13602   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13603   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13604   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13605   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13606   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13607   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13608   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13609   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13610   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13611   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13612   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13613   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13614   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13615   { 6245 /* image_atomic_or */, AMDGPU::IMAGE_ATOMIC_OR_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13616   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13617   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13618   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13619   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13620   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13621   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13622   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13623   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13624   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13625   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13626   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13627   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13628   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13629   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13630   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13631   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13632   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13633   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13634   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13635   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13636   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13637   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13638   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13639   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13640   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13641   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13642   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13643   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13644   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13645   { 6261 /* image_atomic_smax */, AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13646   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13647   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13648   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13649   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13650   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13651   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13652   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13653   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13654   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13655   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13656   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13657   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13658   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13659   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13660   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13661   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13662   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13663   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13664   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13665   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13666   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13667   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13668   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13669   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13670   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13671   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13672   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13673   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13674   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13675   { 6279 /* image_atomic_smin */, AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13676   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13677   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13678   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13679   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13680   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13681   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13682   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13683   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13684   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13685   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13686   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13687   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13688   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13689   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13690   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13691   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13692   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13693   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13694   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13695   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13696   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13697   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13698   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13699   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13700   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13701   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13702   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13703   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13704   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13705   { 6297 /* image_atomic_sub */, AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13706   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13707   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13708   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13709   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13710   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13711   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13712   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13713   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13714   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13715   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13716   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13717   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13718   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13719   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13720   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13721   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13722   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13723   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13724   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13725   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13726   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13727   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13728   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13729   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13730   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13731   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13732   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13733   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13734   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13735   { 6314 /* image_atomic_swap */, AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13736   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13737   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13738   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13739   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13740   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13741   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13742   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13743   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13744   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13745   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13746   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13747   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13748   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13749   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13750   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13751   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13752   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13753   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13754   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13755   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13756   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13757   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13758   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13759   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13760   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13761   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13762   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13763   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13764   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13765   { 6332 /* image_atomic_umax */, AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13766   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13767   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13768   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13769   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13770   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13771   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13772   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13773   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13774   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13775   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13776   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13777   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13778   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13779   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13780   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13781   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13782   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13783   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13784   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13785   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13786   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13787   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13788   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13789   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13790   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13791   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13792   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13793   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13794   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13795   { 6350 /* image_atomic_umin */, AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13796   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13797   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13798   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13799   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13800   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13801   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13802   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13803   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13804   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13805   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13806   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13807   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13808   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13809   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13810   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_si, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13811   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_vi, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
13812   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13813   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13814   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13815   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13816   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13817   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13818   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13819   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13820   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13821   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13822   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13823   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13824   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13825   { 6368 /* image_atomic_xor */, AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMGAtomic, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
13826   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13827   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13828   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13829   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13830   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13831   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13832   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13833   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13834   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13835   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13836   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13837   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13838   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13839   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13840   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13841   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13842   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13843   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13844   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13845   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13846   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13847   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13848   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13849   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13850   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13851   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13852   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13853   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13854   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13855   { 6385 /* image_gather4 */, AMDGPU::IMAGE_GATHER4_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13856   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13857   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13858   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13859   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13860   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13861   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13862   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13863   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13864   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13865   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13866   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13867   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13868   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13869   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13870   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13871   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13872   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13873   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13874   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13875   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13876   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13877   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13878   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13879   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13880   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13881   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13882   { 6399 /* image_gather4_b */, AMDGPU::IMAGE_GATHER4_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13883   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13884   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13885   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13886   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13887   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13888   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13889   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13890   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13891   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13892   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13893   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13894   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13895   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13896   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13897   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13898   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13899   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13900   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13901   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13902   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13903   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13904   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13905   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13906   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13907   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13908   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13909   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13910   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13911   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13912   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13913   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13914   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13915   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13916   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13917   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13918   { 6415 /* image_gather4_b_cl */, AMDGPU::IMAGE_GATHER4_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13919   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13920   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13921   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13922   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13923   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13924   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13925   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13926   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13927   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13928   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13929   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13930   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13931   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13932   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13933   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13934   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13935   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13936   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13937   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13938   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13939   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13940   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13941   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13942   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13943   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13944   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13945   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13946   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13947   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13948   { 6434 /* image_gather4_b_cl_o */, AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13949   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13950   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13951   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13952   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13953   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13954   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13955   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13956   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13957   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13958   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13959   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13960   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13961   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13962   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13963   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13964   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13965   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13966   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13967   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13968   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13969   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13970   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13971   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13972   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13973   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13974   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13975   { 6455 /* image_gather4_b_o */, AMDGPU::IMAGE_GATHER4_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13976   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13977   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13978   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13979   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13980   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13981   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13982   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13983   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13984   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
13985   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13986   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13987   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13988   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13989   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13990   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13991   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13992   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13993   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13994   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13995   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13996   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13997   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13998   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
13999   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14000   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14001   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14002   { 6473 /* image_gather4_c */, AMDGPU::IMAGE_GATHER4_C_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14003   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14004   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14005   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14006   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14007   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14008   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14009   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14010   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14011   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14012   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14013   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14014   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14015   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14016   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14017   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14018   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14019   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14020   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14021   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14022   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14023   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14024   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14025   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14026   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14027   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14028   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14029   { 6489 /* image_gather4_c_b */, AMDGPU::IMAGE_GATHER4_C_B_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14030   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14031   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14032   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14033   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14034   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14035   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14036   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14037   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14038   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14039   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14040   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14041   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14042   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14043   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14044   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14045   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14046   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14047   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14048   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14049   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14050   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14051   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14052   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14053   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14054   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14055   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14056   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14057   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14058   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14059   { 6507 /* image_gather4_c_b_cl */, AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14060   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14061   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14062   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14063   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14064   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14065   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14066   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14067   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14068   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14069   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14070   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14071   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14072   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14073   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14074   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14075   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14076   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14077   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14078   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14079   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14080   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14081   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14082   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14083   { 6528 /* image_gather4_c_b_cl_o */, AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14084   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14085   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14086   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14087   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14088   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14089   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14090   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14091   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14092   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14093   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14094   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14095   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14096   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14097   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14098   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14099   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14100   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14101   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14102   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14103   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14104   { 6551 /* image_gather4_c_b_o */, AMDGPU::IMAGE_GATHER4_C_B_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14105   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14106   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14107   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14108   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14109   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14110   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14111   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14112   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14113   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14114   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14115   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14116   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14117   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14118   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14119   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14120   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14121   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14122   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14123   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14124   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14125   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14126   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14127   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14128   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14129   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14130   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14131   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14132   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14133   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14134   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14135   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14136   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14137   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14138   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14139   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14140   { 6571 /* image_gather4_c_cl */, AMDGPU::IMAGE_GATHER4_C_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14141   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14142   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14143   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14144   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14145   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14146   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14147   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14148   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14149   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14150   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14151   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14152   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14153   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14154   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14155   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14156   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14157   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14158   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14159   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14160   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14161   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14162   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14163   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14164   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14165   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14166   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14167   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14168   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14169   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14170   { 6590 /* image_gather4_c_cl_o */, AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14171   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14172   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14173   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14174   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14175   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14176   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14177   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14178   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14179   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14180   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14181   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14182   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14183   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14184   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14185   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14186   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14187   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14188   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14189   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14190   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14191   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14192   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14193   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14194   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14195   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14196   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14197   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14198   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14199   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14200   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14201   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14202   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14203   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14204   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14205   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14206   { 6611 /* image_gather4_c_l */, AMDGPU::IMAGE_GATHER4_C_L_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14207   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14208   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14209   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14210   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14211   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14212   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14213   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14214   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14215   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14216   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14217   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14218   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14219   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14220   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14221   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14222   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14223   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14224   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14225   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14226   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14227   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14228   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14229   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14230   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14231   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14232   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14233   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14234   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14235   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14236   { 6629 /* image_gather4_c_l_o */, AMDGPU::IMAGE_GATHER4_C_L_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14237   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14238   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14239   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14240   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14241   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14242   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14243   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14244   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14245   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14246   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14247   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14248   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14249   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14250   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14251   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14252   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14253   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14254   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14255   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14256   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14257   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14258   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14259   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14260   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14261   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14262   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14263   { 6649 /* image_gather4_c_lz */, AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14264   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14265   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14266   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14267   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14268   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14269   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14270   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14271   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14272   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14273   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14274   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14275   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14276   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14277   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14278   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14279   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14280   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14281   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14282   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14283   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14284   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14285   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14286   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14287   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14288   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14289   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14290   { 6668 /* image_gather4_c_lz_o */, AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14291   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14292   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14293   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14294   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14295   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14296   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14297   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14298   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14299   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14300   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14301   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14302   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14303   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14304   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14305   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14306   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14307   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14308   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14309   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14310   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14311   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14312   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14313   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14314   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14315   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14316   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14317   { 6689 /* image_gather4_c_o */, AMDGPU::IMAGE_GATHER4_C_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14318   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14319   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14320   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14321   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14322   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14323   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14324   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14325   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14326   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14327   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14328   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14329   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14330   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14331   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14332   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14333   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14334   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14335   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14336   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14337   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14338   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14339   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14340   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14341   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14342   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14343   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14344   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14345   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14346   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14347   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14348   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14349   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14350   { 6707 /* image_gather4_cl */, AMDGPU::IMAGE_GATHER4_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14351   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14352   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14353   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14354   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14355   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14356   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14357   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14358   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14359   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14360   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14361   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14362   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14363   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14364   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14365   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14366   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14367   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14368   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14369   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14370   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14371   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14372   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14373   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14374   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14375   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14376   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14377   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14378   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14379   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14380   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14381   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14382   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14383   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14384   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14385   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14386   { 6724 /* image_gather4_cl_o */, AMDGPU::IMAGE_GATHER4_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14387   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14388   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14389   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14390   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14391   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14392   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14393   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14394   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14395   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14396   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14397   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14398   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14399   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14400   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14401   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14402   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14403   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14404   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14405   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14406   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14407   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14408   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14409   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14410   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14411   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14412   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14413   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14414   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14415   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14416   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14417   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14418   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14419   { 6743 /* image_gather4_l */, AMDGPU::IMAGE_GATHER4_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14420   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14421   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14422   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14423   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14424   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14425   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14426   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14427   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14428   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14429   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14430   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14431   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14432   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14433   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14434   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14435   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14436   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14437   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14438   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14439   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14440   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14441   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14442   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14443   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14444   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14445   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14446   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14447   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14448   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14449   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14450   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14451   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14452   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14453   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14454   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14455   { 6759 /* image_gather4_l_o */, AMDGPU::IMAGE_GATHER4_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14456   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14457   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14458   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14459   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14460   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14461   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14462   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14463   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14464   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14465   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14466   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14467   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14468   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14469   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14470   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14471   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14472   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14473   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14474   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14475   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14476   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14477   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14478   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14479   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14480   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14481   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14482   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14483   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14484   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14485   { 6777 /* image_gather4_lz */, AMDGPU::IMAGE_GATHER4_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14486   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14487   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14488   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14489   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14490   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14491   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14492   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14493   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14494   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14495   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14496   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14497   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14498   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14499   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14500   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14501   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14502   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14503   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14504   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14505   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14506   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14507   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14508   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14509   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14510   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14511   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14512   { 6794 /* image_gather4_lz_o */, AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14513   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14514   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14515   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14516   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14517   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14518   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14519   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14520   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14521   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14522   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14523   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14524   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14525   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14526   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14527   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14528   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14529   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14530   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14531   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14532   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14533   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14534   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14535   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14536   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14537   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14538   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14539   { 6813 /* image_gather4_o */, AMDGPU::IMAGE_GATHER4_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14540   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14541   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14542   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14543   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14544   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14545   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14546   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14547   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14548   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14549   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14550   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14551   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14552   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14553   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14554   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14555   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14556   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14557   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14558   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14559   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14560   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14561   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14562   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14563   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14564   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14565   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14566   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14567   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14568   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14569   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14570   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14571   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14572   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14573   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14574   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14575   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14576   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14577   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14578   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14579   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14580   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14581   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14582   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14583   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14584   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14585   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14586   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14587   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14588   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14589   { 6829 /* image_get_lod */, AMDGPU::IMAGE_GET_LOD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14590   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14591   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14592   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14593   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14594   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14595   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14596   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14597   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14598   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14599   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14600   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14601   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14602   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14603   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14604   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14605   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14606   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14607   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14608   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14609   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14610   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14611   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14612   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14613   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14614   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14615   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14616   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14617   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14618   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14619   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14620   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14621   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14622   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14623   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14624   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14625   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14626   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14627   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14628   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14629   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14630   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14631   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14632   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14633   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14634   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14635   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14636   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14637   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14638   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14639   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14640   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14641   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14642   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14643   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14644   { 6843 /* image_get_resinfo */, AMDGPU::IMAGE_GET_RESINFO_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14645   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14646   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14647   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14648   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14649   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14650   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14651   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14652   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14653   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14654   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14655   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14656   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14657   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14658   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14659   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14660   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14661   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14662   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14663   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14664   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14665   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14666   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14667   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14668   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14669   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14670   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14671   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14672   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14673   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14674   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14675   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14676   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14677   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14678   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14679   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14680   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14681   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14682   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14683   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14684   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14685   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14686   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14687   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14688   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14689   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14690   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14691   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14692   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14693   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14694   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14695   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14696   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14697   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14698   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14699   { 6861 /* image_load */, AMDGPU::IMAGE_LOAD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14700   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14701   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14702   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14703   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14704   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14705   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14706   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14707   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14708   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14709   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14710   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14711   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14712   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14713   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14714   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14715   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14716   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14717   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14718   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14719   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14720   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14721   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14722   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14723   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14724   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14725   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14726   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14727   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14728   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14729   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14730   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14731   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14732   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14733   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14734   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14735   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14736   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14737   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14738   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14739   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14740   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14741   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14742   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14743   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14744   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14745   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14746   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14747   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14748   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14749   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14750   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14751   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14752   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14753   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14754   { 6872 /* image_load_mip */, AMDGPU::IMAGE_LOAD_MIP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14755   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14756   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14757   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14758   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14759   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14760   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14761   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14762   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14763   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14764   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14765   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14766   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14767   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14768   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14769   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14770   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14771   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14772   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14773   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14774   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14775   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14776   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14777   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14778   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14779   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14780   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14781   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14782   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14783   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14784   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14785   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14786   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14787   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14788   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14789   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14790   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14791   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14792   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14793   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14794   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14795   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14796   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14797   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14798   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14799   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14800   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14801   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14802   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14803   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14804   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14805   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14806   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14807   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14808   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14809   { 6887 /* image_load_mip_pck */, AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14810   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14811   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14812   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14813   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14814   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14815   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14816   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14817   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14818   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14819   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14820   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14821   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14822   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14823   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14824   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14825   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14826   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14827   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14828   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14829   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14830   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14831   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14832   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14833   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14834   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14835   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14836   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14837   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14838   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14839   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14840   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14841   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14842   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14843   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14844   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14845   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14846   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14847   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14848   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14849   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14850   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14851   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14852   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14853   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14854   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14855   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14856   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14857   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14858   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14859   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14860   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14861   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14862   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14863   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14864   { 6906 /* image_load_mip_pck_sgn */, AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14865   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14866   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14867   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14868   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14869   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14870   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14871   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14872   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14873   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14874   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14875   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14876   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14877   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14878   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14879   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14880   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14881   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14882   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14883   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14884   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14885   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14886   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14887   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14888   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14889   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14890   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14891   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14892   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14893   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14894   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14895   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14896   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14897   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14898   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14899   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14900   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14901   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14902   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14903   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14904   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14905   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14906   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14907   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14908   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14909   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14910   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14911   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14912   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14913   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14914   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14915   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14916   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14917   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14918   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14919   { 6929 /* image_load_pck */, AMDGPU::IMAGE_LOAD_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14920   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14921   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14922   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14923   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14924   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14925   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14926   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14927   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14928   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14929   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14930   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14931   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14932   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14933   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14934   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14935   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14936   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14937   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14938   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14939   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
14940   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14941   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14942   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14943   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14944   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14945   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14946   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14947   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14948   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14949   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14950   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14951   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14952   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14953   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14954   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14955   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14956   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14957   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14958   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14959   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14960   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14961   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14962   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14963   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14964   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14965   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14966   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14967   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14968   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14969   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14970   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14971   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14972   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14973   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14974   { 6944 /* image_load_pck_sgn */, AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
14975   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14976   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14977   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14978   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14979   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14980   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14981   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14982   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14983   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14984   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14985   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14986   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14987   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14988   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14989   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14990   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14991   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14992   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14993   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14994   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
14995   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14996   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14997   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14998   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
14999   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15000   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15001   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15002   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15003   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15004   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15005   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15006   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15007   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15008   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15009   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15010   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15011   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15012   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15013   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15014   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15015   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15016   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15017   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15018   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15019   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15020   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15021   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15022   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15023   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15024   { 6963 /* image_sample */, AMDGPU::IMAGE_SAMPLE_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15025   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15026   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15027   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15028   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15029   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15030   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15031   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15032   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15033   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15034   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15035   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15036   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15037   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15038   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15039   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15040   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15041   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15042   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15043   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15044   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15045   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15046   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15047   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15048   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15049   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15050   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15051   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15052   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15053   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15054   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15055   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15056   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15057   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15058   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15059   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15060   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15061   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15062   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15063   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15064   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15065   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15066   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15067   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15068   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15069   { 6976 /* image_sample_b */, AMDGPU::IMAGE_SAMPLE_B_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15070   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15071   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15072   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15073   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15074   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15075   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15076   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15077   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15078   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15079   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15080   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15081   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15082   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15083   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15084   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15085   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15086   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15087   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15088   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15089   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15090   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15091   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15092   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15093   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15094   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15095   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15096   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15097   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15098   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15099   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15100   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15101   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15102   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15103   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15104   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15105   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15106   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15107   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15108   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15109   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15110   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15111   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15112   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15113   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15114   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15115   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15116   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15117   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15118   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15119   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15120   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15121   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15122   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15123   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15124   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15125   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15126   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15127   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15128   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15129   { 6991 /* image_sample_b_cl */, AMDGPU::IMAGE_SAMPLE_B_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15130   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15131   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15132   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15133   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15134   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15135   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15136   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15137   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15138   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15139   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15140   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15141   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15142   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15143   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15144   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15145   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15146   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15147   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15148   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15149   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15150   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15151   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15152   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15153   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15154   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15155   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15156   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15157   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15158   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15159   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15160   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15161   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15162   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15163   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15164   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15165   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15166   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15167   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15168   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15169   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15170   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15171   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15172   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15173   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15174   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15175   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15176   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15177   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15178   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15179   { 7009 /* image_sample_b_cl_o */, AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15180   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15181   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15182   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15183   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15184   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15185   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15186   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15187   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15188   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15189   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15190   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15191   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15192   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15193   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15194   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15195   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15196   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15197   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15198   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15199   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15200   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15201   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15202   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15203   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15204   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15205   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15206   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15207   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15208   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15209   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15210   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15211   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15212   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15213   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15214   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15215   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15216   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15217   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15218   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15219   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15220   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15221   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15222   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15223   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15224   { 7029 /* image_sample_b_o */, AMDGPU::IMAGE_SAMPLE_B_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15225   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15226   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15227   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15228   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15229   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15230   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15231   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15232   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15233   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15234   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15235   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15236   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15237   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15238   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15239   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15240   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15241   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15242   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15243   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15244   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15245   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15246   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15247   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15248   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15249   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15250   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15251   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15252   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15253   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15254   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15255   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15256   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15257   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15258   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15259   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15260   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15261   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15262   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15263   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15264   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15265   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15266   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15267   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15268   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15269   { 7046 /* image_sample_c */, AMDGPU::IMAGE_SAMPLE_C_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15270   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15271   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15272   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15273   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15274   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15275   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15276   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15277   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15278   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15279   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15280   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15281   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15282   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15283   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15284   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15285   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15286   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15287   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15288   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15289   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15290   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15291   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15292   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15293   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15294   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15295   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15296   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15297   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15298   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15299   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15300   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15301   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15302   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15303   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15304   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15305   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15306   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15307   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15308   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15309   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15310   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15311   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15312   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15313   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15314   { 7061 /* image_sample_c_b */, AMDGPU::IMAGE_SAMPLE_C_B_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15315   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15316   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15317   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15318   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15319   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15320   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15321   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15322   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15323   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15324   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15325   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15326   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15327   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15328   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15329   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15330   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15331   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15332   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15333   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15334   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15335   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15336   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15337   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15338   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15339   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15340   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15341   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15342   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15343   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15344   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15345   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15346   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15347   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15348   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15349   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15350   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15351   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15352   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15353   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15354   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15355   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15356   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15357   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15358   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15359   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15360   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15361   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15362   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15363   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15364   { 7078 /* image_sample_c_b_cl */, AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15365   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15366   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15367   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15368   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15369   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15370   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15371   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15372   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15373   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15374   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15375   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15376   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15377   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15378   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15379   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15380   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15381   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15382   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15383   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15384   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15385   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15386   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15387   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15388   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15389   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15390   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15391   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15392   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15393   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15394   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15395   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15396   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15397   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15398   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15399   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15400   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15401   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15402   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15403   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15404   { 7098 /* image_sample_c_b_cl_o */, AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15405   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15406   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15407   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15408   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15409   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15410   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15411   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15412   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15413   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15414   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15415   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15416   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15417   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15418   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15419   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15420   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15421   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15422   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15423   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15424   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15425   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15426   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15427   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15428   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15429   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15430   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15431   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15432   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15433   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15434   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15435   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15436   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15437   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15438   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15439   { 7120 /* image_sample_c_b_o */, AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15440   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15441   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15442   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15443   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15444   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15445   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15446   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15447   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15448   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15449   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15450   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15451   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15452   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15453   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15454   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15455   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15456   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15457   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15458   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15459   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15460   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15461   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15462   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15463   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15464   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15465   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15466   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15467   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15468   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15469   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15470   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15471   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15472   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15473   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15474   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15475   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15476   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15477   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15478   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15479   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15480   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15481   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15482   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15483   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15484   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15485   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15486   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15487   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15488   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15489   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15490   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15491   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15492   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15493   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15494   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15495   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15496   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15497   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15498   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15499   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15500   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15501   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15502   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15503   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15504   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15505   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15506   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15507   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15508   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15509   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15510   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15511   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15512   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15513   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15514   { 7139 /* image_sample_c_cd */, AMDGPU::IMAGE_SAMPLE_C_CD_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15515   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15516   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15517   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15518   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15519   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15520   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15521   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15522   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15523   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15524   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15525   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15526   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15527   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15528   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15529   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15530   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15531   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15532   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15533   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15534   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15535   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15536   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15537   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15538   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15539   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15540   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15541   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15542   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15543   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15544   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15545   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15546   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15547   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15548   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15549   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15550   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15551   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15552   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15553   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15554   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15555   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15556   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15557   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15558   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15559   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15560   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15561   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15562   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15563   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15564   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15565   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15566   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15567   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15568   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15569   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15570   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15571   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15572   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15573   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15574   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15575   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15576   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15577   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15578   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15579   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15580   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15581   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15582   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15583   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15584   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15585   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15586   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15587   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15588   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15589   { 7157 /* image_sample_c_cd_cl */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15590   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15591   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15592   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15593   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15594   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15595   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15596   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15597   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15598   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15599   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15600   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15601   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15602   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15603   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15604   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15605   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15606   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15607   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15608   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15609   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15610   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15611   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15612   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15613   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15614   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15615   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15616   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15617   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15618   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15619   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15620   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15621   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15622   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15623   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15624   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15625   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15626   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15627   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15628   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15629   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15630   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15631   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15632   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15633   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15634   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15635   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15636   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15637   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15638   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15639   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15640   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15641   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15642   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15643   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15644   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15645   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15646   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15647   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15648   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15649   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15650   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V5_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15651   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15652   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15653   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15654   { 7178 /* image_sample_c_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15655   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15656   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15657   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15658   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15659   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15660   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15661   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15662   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15663   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15664   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15665   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15666   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15667   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15668   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15669   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15670   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15671   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15672   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15673   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15674   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15675   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15676   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15677   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15678   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15679   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15680   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15681   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15682   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15683   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15684   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15685   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15686   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15687   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15688   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15689   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15690   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15691   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15692   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15693   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15694   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15695   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15696   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15697   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15698   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15699   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15700   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15701   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15702   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15703   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15704   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15705   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15706   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15707   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15708   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15709   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15710   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15711   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15712   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15713   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15714   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15715   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15716   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15717   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15718   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15719   { 7201 /* image_sample_c_cd_o */, AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15720   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15721   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15722   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15723   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15724   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15725   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15726   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15727   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15728   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15729   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15730   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15731   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15732   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15733   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15734   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15735   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15736   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15737   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15738   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15739   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15740   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15741   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15742   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15743   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15744   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15745   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15746   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15747   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15748   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15749   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15750   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15751   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15752   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15753   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15754   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15755   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15756   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15757   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15758   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15759   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15760   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15761   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15762   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15763   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15764   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15765   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15766   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15767   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15768   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15769   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15770   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15771   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15772   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15773   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15774   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15775   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15776   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15777   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15778   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15779   { 7221 /* image_sample_c_cl */, AMDGPU::IMAGE_SAMPLE_C_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15780   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15781   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15782   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15783   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15784   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15785   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15786   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15787   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15788   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15789   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15790   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15791   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15792   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15793   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15794   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15795   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15796   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15797   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15798   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15799   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15800   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15801   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15802   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15803   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15804   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15805   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15806   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15807   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15808   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15809   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15810   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15811   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15812   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15813   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15814   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15815   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15816   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15817   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15818   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15819   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15820   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15821   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15822   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15823   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15824   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15825   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15826   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15827   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15828   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15829   { 7239 /* image_sample_c_cl_o */, AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15830   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15831   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15832   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15833   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15834   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15835   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15836   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15837   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15838   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15839   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15840   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15841   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15842   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15843   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15844   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15845   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15846   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15847   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15848   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15849   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15850   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15851   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15852   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15853   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15854   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15855   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15856   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15857   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15858   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15859   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15860   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15861   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15862   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15863   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15864   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15865   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15866   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15867   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15868   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15869   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15870   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15871   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15872   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15873   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15874   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15875   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15876   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15877   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15878   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15879   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15880   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15881   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15882   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15883   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15884   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15885   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15886   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15887   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15888   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15889   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15890   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15891   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15892   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15893   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15894   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15895   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15896   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15897   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15898   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15899   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15900   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15901   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15902   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15903   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15904   { 7259 /* image_sample_c_d */, AMDGPU::IMAGE_SAMPLE_C_D_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15905   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15906   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15907   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15908   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15909   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15910   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15911   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15912   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15913   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15914   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15915   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15916   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15917   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15918   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15919   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15920   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15921   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15922   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15923   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15924   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15925   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15926   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15927   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15928   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15929   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15930   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15931   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15932   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15933   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15934   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15935   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15936   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15937   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15938   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15939   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15940   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15941   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15942   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15943   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15944   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15945   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15946   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15947   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15948   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15949   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15950   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15951   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15952   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15953   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15954   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15955   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15956   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15957   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15958   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15959   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15960   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15961   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15962   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15963   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15964   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15965   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15966   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15967   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15968   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15969   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15970   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15971   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15972   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15973   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15974   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15975   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15976   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15977   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15978   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15979   { 7276 /* image_sample_c_d_cl */, AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15980   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15981   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15982   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15983   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15984   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15985   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15986   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15987   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15988   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15989   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15990   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15991   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15992   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15993   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15994   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
15995   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15996   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15997   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15998   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
15999   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16000   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16001   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16002   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16003   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16004   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16005   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16006   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16007   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16008   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16009   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16010   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16011   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16012   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16013   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16014   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16015   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16016   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16017   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16018   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16019   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16020   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16021   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16022   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16023   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16024   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16025   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16026   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16027   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16028   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16029   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16030   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16031   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16032   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16033   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16034   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16035   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16036   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16037   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16038   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16039   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16040   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V5_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16041   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16042   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16043   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16044   { 7296 /* image_sample_c_d_cl_o */, AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V12_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16045   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16046   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16047   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16048   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16049   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16050   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16051   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16052   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16053   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16054   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16055   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16056   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16057   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16058   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16059   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16060   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16061   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16062   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16063   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16064   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16065   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16066   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16067   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16068   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16069   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16070   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16071   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16072   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16073   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16074   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16075   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16076   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16077   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16078   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16079   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16080   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16081   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16082   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16083   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16084   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16085   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16086   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16087   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16088   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16089   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16090   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16091   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16092   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16093   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16094   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16095   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16096   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16097   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16098   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16099   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16100   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16101   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16102   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16103   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16104   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16105   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16106   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16107   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16108   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16109   { 7318 /* image_sample_c_d_o */, AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16110   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16111   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16112   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16113   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16114   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16115   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16116   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16117   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16118   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16119   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16120   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16121   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16122   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16123   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16124   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16125   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16126   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16127   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16128   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16129   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16130   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16131   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16132   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16133   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16134   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16135   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16136   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16137   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16138   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16139   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16140   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16141   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16142   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16143   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16144   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16145   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16146   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16147   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16148   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16149   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16150   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16151   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16152   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16153   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16154   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16155   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16156   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16157   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16158   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16159   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16160   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16161   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16162   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16163   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16164   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16165   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16166   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16167   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16168   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16169   { 7337 /* image_sample_c_l */, AMDGPU::IMAGE_SAMPLE_C_L_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16170   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16171   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16172   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16173   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16174   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16175   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16176   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16177   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16178   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16179   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16180   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16181   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16182   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16183   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16184   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16185   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16186   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16187   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16188   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16189   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16190   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16191   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16192   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16193   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16194   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16195   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16196   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16197   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16198   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16199   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16200   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16201   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16202   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16203   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16204   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16205   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16206   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16207   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16208   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16209   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16210   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16211   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16212   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16213   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16214   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16215   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16216   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16217   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16218   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16219   { 7354 /* image_sample_c_l_o */, AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16220   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16221   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16222   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16223   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16224   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16225   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16226   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16227   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16228   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16229   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16230   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16231   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16232   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16233   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16234   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16235   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16236   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16237   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16238   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16239   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16240   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16241   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16242   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16243   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16244   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16245   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16246   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16247   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16248   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16249   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16250   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16251   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16252   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16253   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16254   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16255   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16256   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16257   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16258   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16259   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16260   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16261   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16262   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16263   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16264   { 7373 /* image_sample_c_lz */, AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16265   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16266   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16267   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16268   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16269   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16270   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16271   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16272   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16273   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16274   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16275   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16276   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16277   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16278   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16279   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16280   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16281   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16282   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16283   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16284   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16285   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16286   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16287   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16288   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16289   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16290   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16291   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16292   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16293   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16294   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16295   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16296   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16297   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16298   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16299   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16300   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16301   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16302   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16303   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16304   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16305   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16306   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16307   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16308   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16309   { 7391 /* image_sample_c_lz_o */, AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16310   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16311   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16312   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16313   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16314   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16315   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16316   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16317   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16318   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16319   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16320   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16321   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16322   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16323   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16324   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16325   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16326   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16327   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16328   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16329   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16330   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16331   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16332   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16333   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16334   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16335   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16336   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16337   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16338   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16339   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16340   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16341   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16342   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16343   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16344   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16345   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16346   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16347   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16348   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16349   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16350   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16351   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16352   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16353   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16354   { 7411 /* image_sample_c_o */, AMDGPU::IMAGE_SAMPLE_C_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16355   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16356   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16357   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16358   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16359   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16360   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16361   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16362   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16363   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16364   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16365   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16366   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16367   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16368   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16369   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16370   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16371   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16372   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16373   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16374   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16375   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16376   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16377   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16378   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16379   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16380   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16381   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16382   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16383   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16384   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16385   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16386   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16387   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16388   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16389   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16390   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16391   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16392   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16393   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16394   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16395   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16396   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16397   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16398   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16399   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16400   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16401   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16402   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16403   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16404   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16405   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16406   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16407   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16408   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16409   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16410   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16411   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16412   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16413   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16414   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16415   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16416   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16417   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16418   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16419   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16420   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16421   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16422   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16423   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16424   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16425   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16426   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16427   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16428   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16429   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16430   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16431   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16432   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16433   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16434   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16435   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16436   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16437   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16438   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16439   { 7428 /* image_sample_cd */, AMDGPU::IMAGE_SAMPLE_CD_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16440   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16441   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16442   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16443   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16444   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16445   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16446   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16447   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16448   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16449   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16450   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16451   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16452   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16453   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16454   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16455   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16456   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16457   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16458   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16459   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16460   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16461   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16462   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16463   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16464   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16465   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16466   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16467   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16468   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16469   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16470   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16471   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16472   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16473   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16474   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16475   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16476   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16477   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16478   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16479   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16480   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16481   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16482   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16483   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16484   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16485   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16486   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16487   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16488   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16489   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16490   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16491   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16492   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16493   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16494   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16495   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16496   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16497   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16498   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16499   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16500   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16501   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16502   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16503   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16504   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16505   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16506   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16507   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16508   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16509   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16510   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16511   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16512   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16513   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16514   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16515   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16516   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16517   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16518   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16519   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16520   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16521   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16522   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16523   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16524   { 7444 /* image_sample_cd_cl */, AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16525   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16526   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16527   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16528   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16529   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16530   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16531   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16532   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16533   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16534   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16535   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16536   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16537   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16538   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16539   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16540   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16541   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16542   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16543   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16544   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16545   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16546   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16547   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16548   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16549   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16550   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16551   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16552   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16553   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16554   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16555   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16556   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16557   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16558   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16559   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16560   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16561   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16562   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16563   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16564   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16565   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16566   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16567   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16568   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16569   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16570   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16571   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16572   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16573   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16574   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16575   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16576   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16577   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16578   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16579   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16580   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16581   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16582   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16583   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16584   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16585   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16586   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16587   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16588   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16589   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16590   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16591   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16592   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16593   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16594   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16595   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16596   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16597   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16598   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16599   { 7463 /* image_sample_cd_cl_o */, AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16600   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16601   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16602   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16603   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16604   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16605   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16606   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16607   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16608   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16609   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16610   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16611   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16612   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16613   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16614   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16615   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16616   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16617   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16618   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16619   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16620   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16621   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16622   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16623   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16624   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16625   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16626   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16627   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16628   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16629   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16630   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16631   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16632   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16633   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16634   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16635   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16636   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16637   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16638   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16639   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16640   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16641   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16642   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16643   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16644   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16645   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16646   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16647   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16648   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16649   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16650   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16651   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16652   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16653   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16654   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16655   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16656   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16657   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16658   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16659   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16660   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16661   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16662   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16663   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16664   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16665   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16666   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16667   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16668   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16669   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16670   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16671   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16672   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16673   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16674   { 7484 /* image_sample_cd_o */, AMDGPU::IMAGE_SAMPLE_CD_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16675   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16676   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16677   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16678   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16679   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16680   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16681   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16682   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16683   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16684   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16685   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16686   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16687   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16688   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16689   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16690   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16691   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16692   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16693   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16694   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16695   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16696   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16697   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16698   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16699   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16700   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16701   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16702   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16703   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16704   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16705   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16706   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16707   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16708   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16709   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16710   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16711   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16712   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16713   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16714   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16715   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16716   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16717   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16718   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16719   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16720   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16721   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16722   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16723   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16724   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16725   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16726   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16727   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16728   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16729   { 7502 /* image_sample_cl */, AMDGPU::IMAGE_SAMPLE_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16730   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16731   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16732   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16733   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16734   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16735   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16736   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16737   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16738   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16739   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16740   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16741   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16742   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16743   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16744   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16745   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16746   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16747   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16748   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16749   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16750   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16751   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16752   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16753   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16754   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16755   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16756   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16757   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16758   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16759   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16760   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16761   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16762   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16763   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16764   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16765   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16766   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16767   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16768   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16769   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16770   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16771   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16772   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16773   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16774   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16775   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16776   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16777   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16778   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16779   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16780   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16781   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16782   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16783   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16784   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16785   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16786   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16787   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16788   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16789   { 7518 /* image_sample_cl_o */, AMDGPU::IMAGE_SAMPLE_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16790   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16791   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16792   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16793   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16794   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16795   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16796   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16797   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16798   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16799   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16800   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16801   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16802   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16803   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16804   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16805   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16806   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16807   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16808   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16809   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16810   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16811   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16812   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16813   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16814   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16815   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16816   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16817   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16818   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16819   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16820   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16821   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16822   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16823   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16824   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16825   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16826   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16827   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16828   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16829   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16830   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16831   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16832   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16833   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16834   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16835   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16836   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16837   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16838   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16839   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16840   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16841   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16842   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16843   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16844   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16845   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16846   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16847   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16848   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16849   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16850   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16851   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16852   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16853   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16854   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16855   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16856   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16857   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16858   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16859   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16860   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16861   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16862   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16863   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16864   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16865   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16866   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16867   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16868   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16869   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16870   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16871   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16872   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16873   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16874   { 7536 /* image_sample_d */, AMDGPU::IMAGE_SAMPLE_D_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16875   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16876   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16877   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16878   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16879   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16880   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16881   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16882   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16883   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16884   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16885   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16886   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16887   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16888   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16889   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16890   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16891   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16892   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16893   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16894   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16895   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16896   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16897   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16898   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16899   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16900   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16901   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16902   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16903   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16904   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16905   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16906   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16907   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16908   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16909   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16910   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16911   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16912   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16913   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16914   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16915   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16916   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16917   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16918   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16919   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16920   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16921   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16922   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16923   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16924   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16925   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16926   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16927   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16928   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16929   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16930   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16931   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16932   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16933   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16934   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16935   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16936   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16937   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16938   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16939   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16940   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16941   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16942   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16943   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16944   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16945   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16946   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16947   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16948   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16949   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16950   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16951   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16952   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16953   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16954   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16955   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16956   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16957   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16958   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16959   { 7551 /* image_sample_d_cl */, AMDGPU::IMAGE_SAMPLE_D_CL_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16960   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16961   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16962   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16963   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16964   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16965   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16966   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16967   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16968   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16969   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16970   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16971   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16972   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16973   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16974   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16975   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16976   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16977   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16978   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16979   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
16980   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16981   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16982   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16983   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16984   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16985   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16986   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16987   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16988   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16989   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16990   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16991   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16992   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16993   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16994   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16995   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16996   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16997   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16998   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
16999   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17000   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17001   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17002   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17003   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17004   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17005   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17006   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17007   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17008   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17009   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17010   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17011   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17012   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17013   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17014   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17015   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17016   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17017   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17018   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17019   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17020   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17021   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17022   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17023   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17024   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17025   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17026   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17027   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17028   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17029   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V9_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17030   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V5_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17031   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17032   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17033   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17034   { 7569 /* image_sample_d_cl_o */, AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V11_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17035   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17036   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17037   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17038   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17039   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17040   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17041   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17042   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17043   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17044   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17045   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17046   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17047   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17048   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17049   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17050   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17051   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V16, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17052   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17053   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17054   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17055   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17056   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17057   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17058   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17059   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17060   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17061   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17062   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17063   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17064   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17065   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17066   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17067   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17068   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17069   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17070   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17071   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V16_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_512, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17072   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17073   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17074   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17075   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17076   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17077   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17078   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17079   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17080   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17081   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17082   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17083   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17084   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17085   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17086   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17087   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17088   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17089   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17090   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17091   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17092   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17093   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17094   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V6_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17095   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17096   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17097   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17098   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17099   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V7_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17100   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17101   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17102   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17103   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17104   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V8_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17105   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V5_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17106   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V4_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17107   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V3_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17108   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V2_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17109   { 7589 /* image_sample_d_o */, AMDGPU::IMAGE_SAMPLE_D_O_V1_V10_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17110   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17111   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17112   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17113   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17114   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17115   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17116   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17117   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17118   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17119   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17120   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17121   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17122   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17123   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17124   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17125   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17126   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17127   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17128   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17129   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17130   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17131   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17132   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17133   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17134   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17135   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17136   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17137   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17138   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17139   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17140   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17141   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17142   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17143   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17144   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17145   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17146   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17147   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17148   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17149   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17150   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17151   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17152   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17153   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17154   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17155   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17156   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17157   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17158   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17159   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17160   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17161   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17162   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17163   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17164   { 7606 /* image_sample_l */, AMDGPU::IMAGE_SAMPLE_L_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17165   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17166   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17167   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17168   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17169   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17170   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17171   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17172   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17173   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17174   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17175   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17176   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17177   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17178   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17179   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17180   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17181   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V8, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17182   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17183   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17184   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17185   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17186   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17187   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17188   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17189   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17190   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17191   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17192   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17193   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17194   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17195   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17196   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17197   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17198   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17199   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17200   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17201   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V8_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_256, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17202   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17203   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17204   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17205   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17206   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17207   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17208   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17209   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17210   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17211   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17212   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17213   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17214   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17215   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17216   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17217   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17218   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17219   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17220   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V5_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17221   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V4_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17222   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V3_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17223   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V2_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17224   { 7621 /* image_sample_l_o */, AMDGPU::IMAGE_SAMPLE_L_O_V1_V5_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17225   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17226   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17227   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17228   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17229   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17230   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17231   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17232   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17233   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17234   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17235   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17236   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17237   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17238   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17239   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17240   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17241   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17242   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17243   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17244   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17245   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17246   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17247   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17248   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17249   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17250   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17251   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17252   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17253   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17254   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17255   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17256   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17257   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17258   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17259   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17260   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17261   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17262   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17263   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17264   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17265   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17266   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17267   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17268   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17269   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17270   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17271   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17272   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17273   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17274   { 7638 /* image_sample_lz */, AMDGPU::IMAGE_SAMPLE_LZ_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17275   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17276   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17277   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17278   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17279   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17280   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17281   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17282   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17283   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17284   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17285   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17286   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17287   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17288   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17289   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17290   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17291   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17292   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17293   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17294   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17295   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17296   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17297   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17298   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17299   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17300   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17301   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17302   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17303   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17304   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17305   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17306   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17307   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17308   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17309   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17310   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17311   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17312   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17313   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17314   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17315   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17316   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17317   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17318   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17319   { 7654 /* image_sample_lz_o */, AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17320   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17321   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17322   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17323   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17324   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17325   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17326   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17327   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17328   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17329   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17330   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17331   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17332   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17333   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17334   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17335   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17336   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17337   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17338   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17339   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17340   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17341   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17342   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17343   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17344   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17345   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17346   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17347   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17348   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17349   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17350   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17351   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17352   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17353   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17354   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17355   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17356   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17357   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17358   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17359   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17360   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V5_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_160, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17361   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17362   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17363   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17364   { 7672 /* image_sample_o */, AMDGPU::IMAGE_SAMPLE_O_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_SReg_128, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17365   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17366   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17367   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17368   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17369   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17370   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17371   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17372   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17373   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17374   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17375   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17376   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17377   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17378   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17379   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17380   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17381   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17382   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17383   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17384   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17385   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17386   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17387   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17388   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17389   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17390   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17391   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17392   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17393   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17394   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17395   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17396   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17397   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17398   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17399   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17400   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17401   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17402   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17403   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17404   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17405   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17406   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17407   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17408   { 7687 /* image_store */, AMDGPU::IMAGE_STORE_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17409   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17410   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17411   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17412   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17413   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17414   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17415   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17416   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17417   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17418   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17419   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17420   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17421   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17422   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17423   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17424   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA, MCK_ImmD16 }, },
17425   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17426   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17427   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17428   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17429   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17430   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17431   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17432   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17433   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17434   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17435   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17436   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17437   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17438   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17439   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17440   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17441   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17442   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17443   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17444   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17445   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17446   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17447   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17448   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17449   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17450   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17451   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17452   { 7699 /* image_store_mip */, AMDGPU::IMAGE_STORE_MIP_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmD16 }, },
17453   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17454   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17455   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17456   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17457   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17458   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17459   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17460   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17461   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17462   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17463   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17464   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17465   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17466   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17467   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17468   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17469   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17470   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17471   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17472   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17473   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17474   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17475   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17476   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17477   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17478   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17479   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17480   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17481   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17482   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17483   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17484   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17485   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17486   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17487   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17488   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17489   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17490   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17491   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17492   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17493   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17494   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17495   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17496   { 7715 /* image_store_mip_pck */, AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17497   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17498   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17499   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17500   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17501   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17502   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17503   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17504   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17505   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17506   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17507   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17508   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17509   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V4, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17510   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V3, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17511   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V2, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17512   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V1, ConvertCustom_cvtMIMG, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmUNorm, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE, MCK_ImmDA }, },
17513   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17514   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17515   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17516   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17517   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17518   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17519   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17520   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17521   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17522   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17523   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17524   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17525   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V4_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17526   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V3_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17527   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V2_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17528   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V1_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17529   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17530   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17531   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17532   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V2_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17533   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17534   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17535   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17536   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V3_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17537   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V4_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_128, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17538   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V3_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_96, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17539   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V2_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VReg_64, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
17540   { 7735 /* image_store_pck */, AMDGPU::IMAGE_STORE_PCK_V1_V4_nsa_gfx10, ConvertCustom_cvtMIMG, AMFBS_isGFX10Plus_isGFX10Plus, { MCK_VGPR_32, MCK__91_, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK__93_, MCK_SReg_256, MCK_ImmDMask, MCK_ImmDim, MCK_ImmUNorm, MCK_ImmDLC, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmR128A16, MCK_ImmTFE, MCK_ImmLWE }, },
31265   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31273   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31281   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31289   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31297   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31305   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31313   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31321   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31329   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31337   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31345   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31353   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31361   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31369   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31377   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31385   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31393   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31402   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31411   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31420   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31429   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31438   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31447   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31456   { 6156 /* image_atomic_add */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31465   { 6156 /* image_atomic_add */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31474   { 6156 /* image_atomic_add */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31483   { 6156 /* image_atomic_add */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31492   { 6156 /* image_atomic_add */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31501   { 6156 /* image_atomic_add */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31510   { 6156 /* image_atomic_add */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31519   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31527   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31535   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31543   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31551   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31559   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31567   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31575   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31583   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31591   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31599   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31607   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31615   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31623   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31631   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31639   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31647   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31656   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31665   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31674   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31683   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31692   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31701   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31710   { 6173 /* image_atomic_and */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31719   { 6173 /* image_atomic_and */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31728   { 6173 /* image_atomic_and */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31737   { 6173 /* image_atomic_and */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31746   { 6173 /* image_atomic_and */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31755   { 6173 /* image_atomic_and */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31764   { 6173 /* image_atomic_and */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31773   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31781   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31789   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31797   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31805   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31813   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31821   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31829   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31837   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31845   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31853   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31861   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31869   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31877   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31885   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
31893   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
31901   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31910   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31919   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31928   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31937   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31946   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31955   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31964   { 6190 /* image_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31973   { 6190 /* image_atomic_cmpswap */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31982   { 6190 /* image_atomic_cmpswap */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
31991   { 6190 /* image_atomic_cmpswap */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32000   { 6190 /* image_atomic_cmpswap */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32009   { 6190 /* image_atomic_cmpswap */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32018   { 6190 /* image_atomic_cmpswap */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32027   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32035   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32043   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32051   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32059   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32067   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32075   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32083   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32091   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32099   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32107   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32115   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32123   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32131   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32139   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32147   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32155   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32164   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32173   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32182   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32191   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32200   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32209   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32218   { 6211 /* image_atomic_dec */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32227   { 6211 /* image_atomic_dec */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32236   { 6211 /* image_atomic_dec */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32245   { 6211 /* image_atomic_dec */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32254   { 6211 /* image_atomic_dec */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32263   { 6211 /* image_atomic_dec */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32272   { 6211 /* image_atomic_dec */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32281   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32289   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32297   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32305   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32313   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32321   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32329   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32337   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32345   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32353   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32361   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32369   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32377   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32385   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32393   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32401   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32409   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32418   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32427   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32436   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32445   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32454   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32463   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32472   { 6228 /* image_atomic_inc */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32481   { 6228 /* image_atomic_inc */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32490   { 6228 /* image_atomic_inc */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32499   { 6228 /* image_atomic_inc */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32508   { 6228 /* image_atomic_inc */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32517   { 6228 /* image_atomic_inc */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32526   { 6228 /* image_atomic_inc */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32535   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32543   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32551   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32559   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32567   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32575   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32583   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32591   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32599   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32607   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32615   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32623   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32631   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32639   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32647   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32655   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32663   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32672   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32681   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32690   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32699   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32708   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32717   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32726   { 6245 /* image_atomic_or */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32735   { 6245 /* image_atomic_or */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32744   { 6245 /* image_atomic_or */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32753   { 6245 /* image_atomic_or */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32762   { 6245 /* image_atomic_or */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32771   { 6245 /* image_atomic_or */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32780   { 6245 /* image_atomic_or */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32789   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32797   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32805   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32813   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32821   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32829   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32837   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32845   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32853   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32861   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32869   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32877   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32885   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32893   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32901   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
32909   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
32917   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32926   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32935   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32944   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32953   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32962   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32971   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32980   { 6261 /* image_atomic_smax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32989   { 6261 /* image_atomic_smax */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
32998   { 6261 /* image_atomic_smax */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33007   { 6261 /* image_atomic_smax */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33016   { 6261 /* image_atomic_smax */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33025   { 6261 /* image_atomic_smax */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33034   { 6261 /* image_atomic_smax */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33043   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33051   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33059   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33067   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33075   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33083   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33091   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33099   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33107   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33115   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33123   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33131   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33139   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33147   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33155   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33163   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33171   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33180   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33189   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33198   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33207   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33216   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33225   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33234   { 6279 /* image_atomic_smin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33243   { 6279 /* image_atomic_smin */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33252   { 6279 /* image_atomic_smin */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33261   { 6279 /* image_atomic_smin */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33270   { 6279 /* image_atomic_smin */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33279   { 6279 /* image_atomic_smin */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33288   { 6279 /* image_atomic_smin */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33297   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33305   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33313   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33321   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33329   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33337   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33345   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33353   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33361   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33369   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33377   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33385   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33393   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33401   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33409   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33417   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33425   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33434   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33443   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33452   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33461   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33470   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33479   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33488   { 6297 /* image_atomic_sub */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33497   { 6297 /* image_atomic_sub */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33506   { 6297 /* image_atomic_sub */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33515   { 6297 /* image_atomic_sub */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33524   { 6297 /* image_atomic_sub */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33533   { 6297 /* image_atomic_sub */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33542   { 6297 /* image_atomic_sub */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33551   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33559   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33567   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33575   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33583   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33591   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33599   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33607   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33615   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33623   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33631   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33639   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33647   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33655   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33663   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33671   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33679   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33688   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33697   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33706   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33715   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33724   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33733   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33742   { 6314 /* image_atomic_swap */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33751   { 6314 /* image_atomic_swap */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33760   { 6314 /* image_atomic_swap */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33769   { 6314 /* image_atomic_swap */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33778   { 6314 /* image_atomic_swap */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33787   { 6314 /* image_atomic_swap */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33796   { 6314 /* image_atomic_swap */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33805   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33813   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33821   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33829   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33837   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33845   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33853   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33861   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33869   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33877   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33885   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33893   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33901   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33909   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33917   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
33925   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
33933   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33942   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33951   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33960   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33969   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33978   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33987   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
33996   { 6332 /* image_atomic_umax */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34005   { 6332 /* image_atomic_umax */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34014   { 6332 /* image_atomic_umax */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34023   { 6332 /* image_atomic_umax */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34032   { 6332 /* image_atomic_umax */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34041   { 6332 /* image_atomic_umax */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34050   { 6332 /* image_atomic_umax */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34059   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34067   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34075   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34083   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34091   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34099   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34107   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34115   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34123   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34131   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34139   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34147   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34155   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34163   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34171   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34179   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34187   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34196   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34205   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34214   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34223   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34232   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34241   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34250   { 6350 /* image_atomic_umin */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34259   { 6350 /* image_atomic_umin */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34268   { 6350 /* image_atomic_umin */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34277   { 6350 /* image_atomic_umin */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34286   { 6350 /* image_atomic_umin */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34295   { 6350 /* image_atomic_umin */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34304   { 6350 /* image_atomic_umin */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34313   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34321   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34329   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34337   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34345   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34353   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34361   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34369   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34377   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34385   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34393   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34401   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34409   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34417   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34425   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7 },
34433   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX8GFX9 },
34441   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34450   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34459   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34468   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34477   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34486   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34495   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34504   { 6368 /* image_atomic_xor */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34513   { 6368 /* image_atomic_xor */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34522   { 6368 /* image_atomic_xor */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34531   { 6368 /* image_atomic_xor */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34540   { 6368 /* image_atomic_xor */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34549   { 6368 /* image_atomic_xor */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34558   { 6368 /* image_atomic_xor */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34568   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34577   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34586   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34595   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34604   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34613   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34622   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34631   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34640   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34649   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34658   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34667   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34676   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34686   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34696   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34706   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34716   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34726   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34736   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34746   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34756   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34766   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34776   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34786   { 6385 /* image_gather4 */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34796   { 6385 /* image_gather4 */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34806   { 6385 /* image_gather4 */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34816   { 6385 /* image_gather4 */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34826   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34836   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34846   { 6385 /* image_gather4 */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34856   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34865   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34874   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34883   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34892   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34901   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34910   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34919   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34928   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
34937   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34947   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34957   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34967   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34977   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34987   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
34997   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35007   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35017   { 6399 /* image_gather4_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35027   { 6399 /* image_gather4_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35037   { 6399 /* image_gather4_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35047   { 6399 /* image_gather4_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35057   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35067   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35077   { 6399 /* image_gather4_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35087   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35097   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35107   { 6399 /* image_gather4_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35117   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35126   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35135   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35144   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35153   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35162   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35171   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35180   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35189   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35198   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35207   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35216   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35225   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35235   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35245   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35255   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35265   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35275   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35285   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35295   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35305   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35315   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35325   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35335   { 6415 /* image_gather4_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35345   { 6415 /* image_gather4_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35355   { 6415 /* image_gather4_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35365   { 6415 /* image_gather4_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35375   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35385   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35395   { 6415 /* image_gather4_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35405   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35415   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35425   { 6415 /* image_gather4_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35435   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35445   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35455   { 6415 /* image_gather4_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35465   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35474   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35483   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35492   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35501   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35510   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35519   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35528   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35537   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35546   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35556   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35566   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35576   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35586   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35596   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35606   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35616   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35626   { 6434 /* image_gather4_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35636   { 6434 /* image_gather4_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35646   { 6434 /* image_gather4_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35656   { 6434 /* image_gather4_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35666   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35676   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35686   { 6434 /* image_gather4_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35696   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35706   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35716   { 6434 /* image_gather4_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35726   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35736   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35746   { 6434 /* image_gather4_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35756   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35765   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35774   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35783   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35792   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35801   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35810   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35819   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35828   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
35837   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35847   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35857   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35867   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35877   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35887   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35897   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35907   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35917   { 6455 /* image_gather4_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35927   { 6455 /* image_gather4_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35937   { 6455 /* image_gather4_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35947   { 6455 /* image_gather4_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35957   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35967   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35977   { 6455 /* image_gather4_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35987   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
35997   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36007   { 6455 /* image_gather4_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36017   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36026   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36035   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36044   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36053   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36062   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36071   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36080   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36089   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36098   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36108   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36118   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36128   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36138   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36148   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36158   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36168   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36178   { 6473 /* image_gather4_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36188   { 6473 /* image_gather4_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36198   { 6473 /* image_gather4_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36208   { 6473 /* image_gather4_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36218   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36228   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36238   { 6473 /* image_gather4_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36248   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36258   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36268   { 6473 /* image_gather4_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36278   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36287   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36296   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36305   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36314   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36323   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36332   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36341   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36350   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36359   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36369   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36379   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36389   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36399   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36409   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36419   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36429   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36439   { 6489 /* image_gather4_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36449   { 6489 /* image_gather4_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36459   { 6489 /* image_gather4_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36469   { 6489 /* image_gather4_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36479   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36489   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36499   { 6489 /* image_gather4_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36509   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36519   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36529   { 6489 /* image_gather4_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36539   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36548   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36557   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36566   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36575   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36584   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36593   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36602   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36611   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36620   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36630   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36640   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36650   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36660   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36670   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36680   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36690   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36700   { 6507 /* image_gather4_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36710   { 6507 /* image_gather4_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36720   { 6507 /* image_gather4_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36730   { 6507 /* image_gather4_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36740   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36750   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36760   { 6507 /* image_gather4_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36770   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36780   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36790   { 6507 /* image_gather4_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36800   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36810   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36820   { 6507 /* image_gather4_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36830   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36839   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36848   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36857   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36866   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36875   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
36884   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36894   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36904   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36914   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36924   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36934   { 6528 /* image_gather4_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36944   { 6528 /* image_gather4_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36954   { 6528 /* image_gather4_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36964   { 6528 /* image_gather4_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36974   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36984   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
36994   { 6528 /* image_gather4_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37004   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37014   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37024   { 6528 /* image_gather4_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37034   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37044   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37054   { 6528 /* image_gather4_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37064   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37073   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37082   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37091   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37100   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37109   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37118   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37128   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37138   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37148   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37158   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37168   { 6551 /* image_gather4_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37178   { 6551 /* image_gather4_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37188   { 6551 /* image_gather4_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37198   { 6551 /* image_gather4_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37208   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37218   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37228   { 6551 /* image_gather4_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37238   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37248   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37258   { 6551 /* image_gather4_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37268   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37277   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37286   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37295   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37304   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37313   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37322   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37331   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37340   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37349   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37358   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37367   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37376   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37386   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37396   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37406   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37416   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37426   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37436   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37446   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37456   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37466   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37476   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37486   { 6571 /* image_gather4_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37496   { 6571 /* image_gather4_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37506   { 6571 /* image_gather4_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37516   { 6571 /* image_gather4_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37526   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37536   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37546   { 6571 /* image_gather4_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37556   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37566   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37576   { 6571 /* image_gather4_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37586   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37596   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37606   { 6571 /* image_gather4_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37616   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37625   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37634   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37643   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37652   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37661   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37670   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37679   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37688   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37697   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37707   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37717   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37727   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37737   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37747   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37757   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37767   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37777   { 6590 /* image_gather4_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37787   { 6590 /* image_gather4_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37797   { 6590 /* image_gather4_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37807   { 6590 /* image_gather4_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37817   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37827   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37837   { 6590 /* image_gather4_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37847   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37857   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37867   { 6590 /* image_gather4_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37877   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37887   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37897   { 6590 /* image_gather4_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
37907   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37916   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37925   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37934   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37943   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37952   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37961   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37970   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37979   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37988   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
37997   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38006   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38015   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38025   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38035   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38045   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38055   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38065   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38075   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38085   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38095   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38105   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38115   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38125   { 6611 /* image_gather4_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38135   { 6611 /* image_gather4_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38145   { 6611 /* image_gather4_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38155   { 6611 /* image_gather4_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38165   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38175   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38185   { 6611 /* image_gather4_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38195   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38205   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38215   { 6611 /* image_gather4_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38225   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38235   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38245   { 6611 /* image_gather4_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38255   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38264   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38273   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38282   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38291   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38300   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38309   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38318   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38327   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38336   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38346   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38356   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38366   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38376   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38386   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38396   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38406   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38416   { 6629 /* image_gather4_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38426   { 6629 /* image_gather4_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38436   { 6629 /* image_gather4_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38446   { 6629 /* image_gather4_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38456   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38466   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38476   { 6629 /* image_gather4_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38486   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38496   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38506   { 6629 /* image_gather4_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38516   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38526   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38536   { 6629 /* image_gather4_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38546   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38555   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38564   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38573   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38582   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38591   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38600   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38609   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38618   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38627   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38637   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38647   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38657   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38667   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38677   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38687   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38697   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38707   { 6649 /* image_gather4_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38717   { 6649 /* image_gather4_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38727   { 6649 /* image_gather4_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38737   { 6649 /* image_gather4_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38747   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38757   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38767   { 6649 /* image_gather4_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38777   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38787   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38797   { 6649 /* image_gather4_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38807   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38816   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38825   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38834   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38843   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38852   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38861   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38870   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38879   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
38888   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38898   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38908   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38918   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38928   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38938   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38948   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38958   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38968   { 6668 /* image_gather4_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38978   { 6668 /* image_gather4_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38988   { 6668 /* image_gather4_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
38998   { 6668 /* image_gather4_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39008   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39018   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39028   { 6668 /* image_gather4_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39038   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39048   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39058   { 6668 /* image_gather4_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39068   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39077   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39086   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39095   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39104   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39113   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39122   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39131   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39140   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39149   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39159   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39169   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39179   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39189   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39199   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39209   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39219   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39229   { 6689 /* image_gather4_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39239   { 6689 /* image_gather4_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39249   { 6689 /* image_gather4_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39259   { 6689 /* image_gather4_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39269   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39279   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39289   { 6689 /* image_gather4_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39299   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39309   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39319   { 6689 /* image_gather4_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39329   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39338   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39347   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39356   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39365   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39374   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39383   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39392   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39401   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39410   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39419   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39428   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39437   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39447   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39457   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39467   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39477   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39487   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39497   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39507   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39517   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39527   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39537   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39547   { 6707 /* image_gather4_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39557   { 6707 /* image_gather4_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39567   { 6707 /* image_gather4_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39577   { 6707 /* image_gather4_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39587   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39597   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39607   { 6707 /* image_gather4_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39617   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39627   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39637   { 6707 /* image_gather4_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39647   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39656   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39665   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39674   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39683   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39692   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39701   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39710   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39719   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39728   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39737   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39746   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
39755   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39765   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39775   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39785   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39795   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39805   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39815   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39825   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39835   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39845   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39855   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39865   { 6724 /* image_gather4_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39875   { 6724 /* image_gather4_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39885   { 6724 /* image_gather4_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39895   { 6724 /* image_gather4_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39905   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39915   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39925   { 6724 /* image_gather4_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39935   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39945   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39955   { 6724 /* image_gather4_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39965   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39975   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39985   { 6724 /* image_gather4_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
39995   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40004   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40013   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40022   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40031   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40040   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40049   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40058   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40067   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40076   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40085   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40094   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40103   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40113   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40123   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40133   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40143   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40153   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40163   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40173   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40183   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40193   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40203   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40213   { 6743 /* image_gather4_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40223   { 6743 /* image_gather4_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40233   { 6743 /* image_gather4_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40243   { 6743 /* image_gather4_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40253   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40263   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40273   { 6743 /* image_gather4_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40283   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40293   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40303   { 6743 /* image_gather4_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40313   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40322   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40331   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40340   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40349   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40358   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40367   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40376   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40385   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40394   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40403   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40412   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40421   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40431   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40441   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40451   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40461   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40471   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40481   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40491   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40501   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40511   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40521   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40531   { 6759 /* image_gather4_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40541   { 6759 /* image_gather4_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40551   { 6759 /* image_gather4_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40561   { 6759 /* image_gather4_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40571   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40581   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40591   { 6759 /* image_gather4_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40601   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40611   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40621   { 6759 /* image_gather4_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40631   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40641   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40651   { 6759 /* image_gather4_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40661   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40670   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40679   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40688   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40697   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40706   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40715   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40724   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40733   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40742   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40751   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40760   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40769   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40779   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40789   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40799   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40809   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40819   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40829   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40839   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40849   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40859   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40869   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40879   { 6777 /* image_gather4_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40889   { 6777 /* image_gather4_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40899   { 6777 /* image_gather4_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40909   { 6777 /* image_gather4_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40919   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40929   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40939   { 6777 /* image_gather4_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
40949   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40958   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40967   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40976   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40985   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
40994   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41003   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41012   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41021   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41030   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41040   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41050   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41060   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41070   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41080   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41090   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41100   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41110   { 6794 /* image_gather4_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41120   { 6794 /* image_gather4_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41130   { 6794 /* image_gather4_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41140   { 6794 /* image_gather4_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41150   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41160   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41170   { 6794 /* image_gather4_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41180   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41190   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41200   { 6794 /* image_gather4_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41210   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41219   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41228   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41237   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41246   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41255   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41264   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41273   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41282   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41291   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41301   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41311   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41321   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41331   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41341   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41351   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41361   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41371   { 6813 /* image_gather4_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41381   { 6813 /* image_gather4_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41391   { 6813 /* image_gather4_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41401   { 6813 /* image_gather4_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41411   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41421   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41431   { 6813 /* image_gather4_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41441   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41451   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41461   { 6813 /* image_gather4_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41470   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41478   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41486   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41494   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41502   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41510   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41518   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41526   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41534   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41542   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41550   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41558   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41566   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41574   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41582   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41590   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41598   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41606   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41614   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41622   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41630   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41639   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41648   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41657   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41666   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41675   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41684   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41693   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41702   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41711   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41720   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41729   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41738   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41747   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41756   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41765   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41774   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41783   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41792   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41801   { 6829 /* image_get_lod */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41810   { 6829 /* image_get_lod */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41819   { 6829 /* image_get_lod */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41828   { 6829 /* image_get_lod */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41837   { 6829 /* image_get_lod */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41846   { 6829 /* image_get_lod */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41855   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41864   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41873   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41882   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41891   { 6829 /* image_get_lod */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
41900   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41908   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41916   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41924   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41932   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41940   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41948   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41956   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41964   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41972   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41980   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41988   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
41996   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42004   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42012   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42020   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42028   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42036   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42044   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42052   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42060   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42069   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42078   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42087   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42096   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42105   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42114   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42123   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42132   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42141   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42150   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42159   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42168   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42177   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42186   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42195   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42204   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42213   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42222   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42231   { 6843 /* image_get_resinfo */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42240   { 6843 /* image_get_resinfo */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42249   { 6843 /* image_get_resinfo */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42258   { 6843 /* image_get_resinfo */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42267   { 6843 /* image_get_resinfo */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42276   { 6843 /* image_get_resinfo */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42285   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42294   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42303   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42312   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42321   { 6843 /* image_get_resinfo */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42330   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42339   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42348   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42357   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42366   { 6843 /* image_get_resinfo */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42376   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42385   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42394   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42403   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42412   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42421   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42430   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42439   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42448   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42457   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42466   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42475   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42484   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42493   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42502   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42511   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42520   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42529   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42538   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42547   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42556   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42566   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42576   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42586   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42596   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42606   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42616   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42626   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42636   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42646   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42656   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42666   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42676   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42686   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42696   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42706   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42716   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42726   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42736   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42746   { 6861 /* image_load */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42756   { 6861 /* image_load */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42766   { 6861 /* image_load */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42776   { 6861 /* image_load */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42786   { 6861 /* image_load */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42796   { 6861 /* image_load */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42806   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42816   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42826   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42836   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42846   { 6861 /* image_load */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42856   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42866   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42876   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42886   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42896   { 6861 /* image_load */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
42906   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42915   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42924   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42933   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42942   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42951   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42960   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42969   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42978   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42987   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
42996   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43005   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43014   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43023   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43032   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43041   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43050   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43059   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43068   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43077   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43086   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43096   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43106   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43116   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43126   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43136   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43146   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43156   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43166   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43176   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43186   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43196   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43206   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43216   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43226   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43236   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43246   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43256   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43266   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43276   { 6872 /* image_load_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43286   { 6872 /* image_load_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43296   { 6872 /* image_load_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43306   { 6872 /* image_load_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43316   { 6872 /* image_load_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43326   { 6872 /* image_load_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43336   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43346   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43356   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43366   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43376   { 6872 /* image_load_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43386   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43396   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43406   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43416   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43426   { 6872 /* image_load_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43435   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43443   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43451   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43459   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43467   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43475   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43483   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43491   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43499   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43507   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43515   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43523   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43531   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43539   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43547   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43555   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43563   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43571   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43579   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43587   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43595   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43604   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43613   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43622   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43631   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43640   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43649   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43658   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43667   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43676   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43685   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43694   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43703   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43712   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43721   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43730   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43739   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43748   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43757   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43766   { 6887 /* image_load_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43775   { 6887 /* image_load_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43784   { 6887 /* image_load_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43793   { 6887 /* image_load_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43802   { 6887 /* image_load_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43811   { 6887 /* image_load_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43820   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43829   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43838   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43847   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43856   { 6887 /* image_load_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43865   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43874   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43883   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43892   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43901   { 6887 /* image_load_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
43910   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43918   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43926   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43934   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43942   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43950   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43958   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43966   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43974   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43982   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43990   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
43998   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44006   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44014   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44022   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44030   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44038   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44046   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44054   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44062   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44070   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44079   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44088   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44097   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44106   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44115   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44124   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44133   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44142   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44151   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44160   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44169   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44178   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44187   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44196   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44205   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44214   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44223   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44232   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44241   { 6906 /* image_load_mip_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44250   { 6906 /* image_load_mip_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44259   { 6906 /* image_load_mip_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44268   { 6906 /* image_load_mip_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44277   { 6906 /* image_load_mip_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44286   { 6906 /* image_load_mip_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44295   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44304   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44313   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44322   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44331   { 6906 /* image_load_mip_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44340   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44349   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44358   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44367   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44376   { 6906 /* image_load_mip_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44385   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44393   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44401   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44409   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44417   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44425   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44433   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44441   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44449   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44457   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44465   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44473   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44481   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44489   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44497   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44505   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44513   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44521   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44529   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44537   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44545   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44554   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44563   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44572   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44581   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44590   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44599   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44608   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44617   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44626   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44635   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44644   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44653   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44662   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44671   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44680   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44689   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44698   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44707   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44716   { 6929 /* image_load_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44725   { 6929 /* image_load_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44734   { 6929 /* image_load_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44743   { 6929 /* image_load_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44752   { 6929 /* image_load_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44761   { 6929 /* image_load_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44770   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44779   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44788   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44797   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44806   { 6929 /* image_load_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44815   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44824   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44833   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44842   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44851   { 6929 /* image_load_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
44860   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44868   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44876   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44884   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44892   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44900   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44908   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44916   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44924   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44932   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44940   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44948   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44956   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44964   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44972   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44980   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44988   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
44996   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45004   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45012   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45020   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45029   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45038   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45047   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45056   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45065   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45074   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45083   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45092   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45101   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45110   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45119   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45128   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45137   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45146   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45155   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45164   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45173   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45182   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45191   { 6944 /* image_load_pck_sgn */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45200   { 6944 /* image_load_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45209   { 6944 /* image_load_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45218   { 6944 /* image_load_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45227   { 6944 /* image_load_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45236   { 6944 /* image_load_pck_sgn */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45245   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45254   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45263   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45272   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45281   { 6944 /* image_load_pck_sgn */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45290   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45299   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45308   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45317   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45326   { 6944 /* image_load_pck_sgn */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45336   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45345   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45354   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45363   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45372   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45381   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45390   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45399   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45408   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45417   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45426   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45435   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45444   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45453   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45462   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45471   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45480   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45489   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45498   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45507   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45516   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45526   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45536   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45546   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45556   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45566   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45576   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45586   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45596   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45606   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45616   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45626   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45636   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45646   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45656   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45666   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45676   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45686   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45696   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45706   { 6963 /* image_sample */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45716   { 6963 /* image_sample */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45726   { 6963 /* image_sample */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45736   { 6963 /* image_sample */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45746   { 6963 /* image_sample */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45756   { 6963 /* image_sample */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45766   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45776   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45786   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45796   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45806   { 6963 /* image_sample */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45816   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45825   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45834   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45843   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45852   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45861   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45870   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45879   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45888   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45897   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45906   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45915   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45924   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45933   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45942   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
45951   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45961   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45971   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45981   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
45991   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46001   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46011   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46021   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46031   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46041   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46051   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46061   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46071   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46081   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46091   { 6976 /* image_sample_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46101   { 6976 /* image_sample_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46111   { 6976 /* image_sample_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46121   { 6976 /* image_sample_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46131   { 6976 /* image_sample_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46141   { 6976 /* image_sample_b */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46151   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46161   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46171   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46181   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46191   { 6976 /* image_sample_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46201   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46211   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46221   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46231   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46241   { 6976 /* image_sample_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46251   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46260   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46269   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46278   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46287   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46296   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46305   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46314   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46323   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46332   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46341   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46350   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46359   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46368   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46377   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46386   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46395   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46404   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46413   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46422   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46431   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46441   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46451   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46461   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46471   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46481   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46491   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46501   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46511   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46521   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46531   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46541   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46551   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46561   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46571   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46581   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46591   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46601   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46611   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46621   { 6991 /* image_sample_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46631   { 6991 /* image_sample_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46641   { 6991 /* image_sample_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46651   { 6991 /* image_sample_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46661   { 6991 /* image_sample_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46671   { 6991 /* image_sample_b_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46681   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46691   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46701   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46711   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46721   { 6991 /* image_sample_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46731   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46741   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46751   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46761   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46771   { 6991 /* image_sample_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46781   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46791   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46801   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46811   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46821   { 6991 /* image_sample_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46831   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46840   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46849   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46858   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46867   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46876   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46885   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46894   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46903   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46912   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46921   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46930   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46939   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46948   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46957   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
46966   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46976   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46986   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
46996   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47006   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47016   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47026   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47036   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47046   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47056   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47066   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47076   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47086   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47096   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47106   { 7009 /* image_sample_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47116   { 7009 /* image_sample_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47126   { 7009 /* image_sample_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47136   { 7009 /* image_sample_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47146   { 7009 /* image_sample_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47156   { 7009 /* image_sample_b_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47166   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47176   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47186   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47196   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47206   { 7009 /* image_sample_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47216   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47226   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47236   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47246   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47256   { 7009 /* image_sample_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47266   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47276   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47286   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47296   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47306   { 7009 /* image_sample_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47316   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47325   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47334   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47343   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47352   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47361   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47370   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47379   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47388   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47397   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47406   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47415   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47424   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47433   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47442   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47451   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47461   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47471   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47481   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47491   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47501   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47511   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47521   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47531   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47541   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47551   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47561   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47571   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47581   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47591   { 7029 /* image_sample_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47601   { 7029 /* image_sample_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47611   { 7029 /* image_sample_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47621   { 7029 /* image_sample_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47631   { 7029 /* image_sample_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47641   { 7029 /* image_sample_b_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47651   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47661   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47671   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47681   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47691   { 7029 /* image_sample_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47701   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47711   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47721   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47731   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47741   { 7029 /* image_sample_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47751   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47760   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47769   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47778   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47787   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47796   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47805   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47814   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47823   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47832   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47841   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47850   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47859   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47868   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47877   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
47886   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47896   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47906   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47916   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47926   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47936   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47946   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47956   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47966   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47976   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47986   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
47996   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48006   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48016   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48026   { 7046 /* image_sample_c */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48036   { 7046 /* image_sample_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48046   { 7046 /* image_sample_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48056   { 7046 /* image_sample_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48066   { 7046 /* image_sample_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48076   { 7046 /* image_sample_c */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48086   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48096   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48106   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48116   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48126   { 7046 /* image_sample_c */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48136   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48146   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48156   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48166   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48176   { 7046 /* image_sample_c */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48186   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48195   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48204   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48213   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48222   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48231   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48240   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48249   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48258   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48267   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48276   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48285   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48294   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48303   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48312   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48321   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48331   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48341   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48351   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48361   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48371   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48381   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48391   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48401   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48411   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48421   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48431   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48441   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48451   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48461   { 7061 /* image_sample_c_b */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48471   { 7061 /* image_sample_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48481   { 7061 /* image_sample_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48491   { 7061 /* image_sample_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48501   { 7061 /* image_sample_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48511   { 7061 /* image_sample_c_b */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48521   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48531   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48541   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48551   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48561   { 7061 /* image_sample_c_b */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48571   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48581   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48591   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48601   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48611   { 7061 /* image_sample_c_b */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48621   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48630   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48639   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48648   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48657   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48666   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48675   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48684   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48693   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48702   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48711   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48720   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48729   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48738   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48747   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
48756   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48766   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48776   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48786   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48796   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48806   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48816   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48826   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48836   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48846   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48856   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48866   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48876   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48886   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48896   { 7078 /* image_sample_c_b_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48906   { 7078 /* image_sample_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48916   { 7078 /* image_sample_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48926   { 7078 /* image_sample_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48936   { 7078 /* image_sample_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48946   { 7078 /* image_sample_c_b_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48956   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48966   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48976   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48986   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
48996   { 7078 /* image_sample_c_b_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49006   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49016   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49026   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49036   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49046   { 7078 /* image_sample_c_b_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49056   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49066   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49076   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49086   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49096   { 7078 /* image_sample_c_b_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49106   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49115   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49124   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49133   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49142   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49151   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49160   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49169   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49178   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49187   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49196   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49206   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49216   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49226   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49236   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49246   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49256   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49266   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49276   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49286   { 7098 /* image_sample_c_b_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49296   { 7098 /* image_sample_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49306   { 7098 /* image_sample_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49316   { 7098 /* image_sample_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49326   { 7098 /* image_sample_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49336   { 7098 /* image_sample_c_b_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49346   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49356   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49366   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49376   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49386   { 7098 /* image_sample_c_b_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49396   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49406   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49416   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49426   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49436   { 7098 /* image_sample_c_b_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49446   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49456   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49466   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49476   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49486   { 7098 /* image_sample_c_b_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49496   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49505   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49514   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49523   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49532   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49541   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49550   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49559   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49568   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49577   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49586   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49596   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49606   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49616   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49626   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49636   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49646   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49656   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49666   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49676   { 7120 /* image_sample_c_b_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49686   { 7120 /* image_sample_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49696   { 7120 /* image_sample_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49706   { 7120 /* image_sample_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49716   { 7120 /* image_sample_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49726   { 7120 /* image_sample_c_b_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49736   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49746   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49756   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49766   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49776   { 7120 /* image_sample_c_b_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49786   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49796   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49806   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49816   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49826   { 7120 /* image_sample_c_b_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
49836   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49845   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49854   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49863   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49872   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49881   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49890   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49899   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49908   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49917   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49926   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49935   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49944   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49953   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49962   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49971   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49980   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49989   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
49998   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50007   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50016   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50026   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50036   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50046   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50056   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50066   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50076   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50086   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50096   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50106   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50116   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50126   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50136   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50146   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50156   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50166   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50176   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50186   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50196   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50206   { 7139 /* image_sample_c_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50216   { 7139 /* image_sample_c_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50226   { 7139 /* image_sample_c_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50236   { 7139 /* image_sample_c_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50246   { 7139 /* image_sample_c_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50256   { 7139 /* image_sample_c_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50266   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50276   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50286   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50296   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50306   { 7139 /* image_sample_c_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50316   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50326   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50336   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50346   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50356   { 7139 /* image_sample_c_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50366   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50376   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50386   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50396   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50406   { 7139 /* image_sample_c_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50416   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50426   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50436   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50446   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50456   { 7139 /* image_sample_c_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50466   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50476   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50486   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50496   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50506   { 7139 /* image_sample_c_cd */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50516   { 7139 /* image_sample_c_cd */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50526   { 7139 /* image_sample_c_cd */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50536   { 7139 /* image_sample_c_cd */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50546   { 7139 /* image_sample_c_cd */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50556   { 7139 /* image_sample_c_cd */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50566   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50575   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50584   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50593   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50602   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50611   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50620   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50629   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50638   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50647   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50656   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50665   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50674   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50683   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50692   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50701   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50710   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50719   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50728   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50737   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
50746   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50756   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50766   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50776   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50786   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50796   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50806   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50816   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50826   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50836   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50846   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50856   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50866   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50876   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50886   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50896   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50906   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50916   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50926   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50936   { 7157 /* image_sample_c_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50946   { 7157 /* image_sample_c_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50956   { 7157 /* image_sample_c_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50966   { 7157 /* image_sample_c_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50976   { 7157 /* image_sample_c_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50986   { 7157 /* image_sample_c_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
50996   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51006   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51016   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51026   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51036   { 7157 /* image_sample_c_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51046   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51056   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51066   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51076   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51086   { 7157 /* image_sample_c_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51096   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51106   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51116   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51126   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51136   { 7157 /* image_sample_c_cd_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51146   { 7157 /* image_sample_c_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51156   { 7157 /* image_sample_c_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51166   { 7157 /* image_sample_c_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51176   { 7157 /* image_sample_c_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51186   { 7157 /* image_sample_c_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51196   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51206   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51216   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51226   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51236   { 7157 /* image_sample_c_cd_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51246   { 7157 /* image_sample_c_cd_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51256   { 7157 /* image_sample_c_cd_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51266   { 7157 /* image_sample_c_cd_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51276   { 7157 /* image_sample_c_cd_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51286   { 7157 /* image_sample_c_cd_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51296   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51305   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51314   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51323   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51332   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51341   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51350   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51359   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51368   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51377   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51386   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51395   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51404   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51413   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51422   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51431   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51441   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51451   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51461   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51471   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51481   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51491   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51501   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51511   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51521   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51531   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51541   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51551   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51561   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51571   { 7178 /* image_sample_c_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51581   { 7178 /* image_sample_c_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51591   { 7178 /* image_sample_c_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51601   { 7178 /* image_sample_c_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51611   { 7178 /* image_sample_c_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51621   { 7178 /* image_sample_c_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51631   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51641   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51651   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51661   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51671   { 7178 /* image_sample_c_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51681   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51691   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51701   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51711   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51721   { 7178 /* image_sample_c_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51731   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51741   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51751   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51761   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51771   { 7178 /* image_sample_c_cd_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51781   { 7178 /* image_sample_c_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51791   { 7178 /* image_sample_c_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51801   { 7178 /* image_sample_c_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51811   { 7178 /* image_sample_c_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51821   { 7178 /* image_sample_c_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51831   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51841   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51851   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51861   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51871   { 7178 /* image_sample_c_cd_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51881   { 7178 /* image_sample_c_cd_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51891   { 7178 /* image_sample_c_cd_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51901   { 7178 /* image_sample_c_cd_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51911   { 7178 /* image_sample_c_cd_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51921   { 7178 /* image_sample_c_cd_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
51931   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51940   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51949   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51958   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51967   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51976   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51985   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
51994   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52003   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52012   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52021   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52030   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52039   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52048   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52057   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52066   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52076   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52086   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52096   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52106   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52116   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52126   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52136   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52146   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52156   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52166   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52176   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52186   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52196   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52206   { 7201 /* image_sample_c_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52216   { 7201 /* image_sample_c_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52226   { 7201 /* image_sample_c_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52236   { 7201 /* image_sample_c_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52246   { 7201 /* image_sample_c_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52256   { 7201 /* image_sample_c_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52266   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52276   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52286   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52296   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52306   { 7201 /* image_sample_c_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52316   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52326   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52336   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52346   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52356   { 7201 /* image_sample_c_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52366   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52376   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52386   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52396   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52406   { 7201 /* image_sample_c_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52416   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52426   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52436   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52446   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52456   { 7201 /* image_sample_c_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52466   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52476   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52486   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52496   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52506   { 7201 /* image_sample_c_cd_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52516   { 7201 /* image_sample_c_cd_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52526   { 7201 /* image_sample_c_cd_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52536   { 7201 /* image_sample_c_cd_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52546   { 7201 /* image_sample_c_cd_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52556   { 7201 /* image_sample_c_cd_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52566   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52575   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52584   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52593   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52602   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52611   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52620   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52629   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52638   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52647   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52656   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52665   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52674   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52683   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52692   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52701   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52710   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52719   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52728   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52737   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
52746   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52756   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52766   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52776   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52786   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52796   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52806   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52816   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52826   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52836   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52846   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52856   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52866   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52876   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52886   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52896   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52906   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52916   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52926   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52936   { 7221 /* image_sample_c_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52946   { 7221 /* image_sample_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52956   { 7221 /* image_sample_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52966   { 7221 /* image_sample_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52976   { 7221 /* image_sample_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52986   { 7221 /* image_sample_c_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
52996   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53006   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53016   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53026   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53036   { 7221 /* image_sample_c_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53046   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53056   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53066   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53076   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53086   { 7221 /* image_sample_c_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53096   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53106   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53116   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53126   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53136   { 7221 /* image_sample_c_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53146   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53155   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53164   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53173   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53182   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53191   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53200   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53209   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53218   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53227   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53236   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53245   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53254   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53263   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53272   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53281   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53291   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53301   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53311   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53321   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53331   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53341   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53351   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53361   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53371   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53381   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53391   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53401   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53411   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53421   { 7239 /* image_sample_c_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53431   { 7239 /* image_sample_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53441   { 7239 /* image_sample_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53451   { 7239 /* image_sample_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53461   { 7239 /* image_sample_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53471   { 7239 /* image_sample_c_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53481   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53491   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53501   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53511   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53521   { 7239 /* image_sample_c_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53531   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53541   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53551   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53561   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53571   { 7239 /* image_sample_c_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53581   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53591   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53601   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53611   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53621   { 7239 /* image_sample_c_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53631   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53640   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53649   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53658   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53667   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53676   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53685   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53694   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53703   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53712   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53721   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53730   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53739   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53748   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53757   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53766   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53775   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53784   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53793   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53802   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
53811   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53821   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53831   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53841   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53851   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53861   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53871   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53881   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53891   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53901   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53911   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53921   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53931   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53941   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53951   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53961   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53971   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53981   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
53991   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54001   { 7259 /* image_sample_c_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54011   { 7259 /* image_sample_c_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54021   { 7259 /* image_sample_c_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54031   { 7259 /* image_sample_c_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54041   { 7259 /* image_sample_c_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54051   { 7259 /* image_sample_c_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54061   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54071   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54081   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54091   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54101   { 7259 /* image_sample_c_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54111   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54121   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54131   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54141   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54151   { 7259 /* image_sample_c_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54161   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54171   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54181   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54191   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54201   { 7259 /* image_sample_c_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54211   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54221   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54231   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54241   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54251   { 7259 /* image_sample_c_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54261   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54271   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54281   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54291   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54301   { 7259 /* image_sample_c_d */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54311   { 7259 /* image_sample_c_d */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54321   { 7259 /* image_sample_c_d */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54331   { 7259 /* image_sample_c_d */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54341   { 7259 /* image_sample_c_d */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54351   { 7259 /* image_sample_c_d */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54361   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54370   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54379   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54388   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54397   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54406   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54415   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54424   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54433   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54442   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54451   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54460   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54469   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54478   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54487   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54496   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54505   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54514   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54523   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54532   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
54541   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54551   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54561   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54571   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54581   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54591   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54601   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54611   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54621   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54631   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54641   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54651   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54661   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54671   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54681   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54691   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54701   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54711   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54721   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54731   { 7276 /* image_sample_c_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54741   { 7276 /* image_sample_c_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54751   { 7276 /* image_sample_c_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54761   { 7276 /* image_sample_c_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54771   { 7276 /* image_sample_c_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54781   { 7276 /* image_sample_c_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54791   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54801   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54811   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54821   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54831   { 7276 /* image_sample_c_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54841   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54851   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54861   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54871   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54881   { 7276 /* image_sample_c_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54891   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54901   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54911   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54921   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54931   { 7276 /* image_sample_c_d_cl */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54941   { 7276 /* image_sample_c_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54951   { 7276 /* image_sample_c_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54961   { 7276 /* image_sample_c_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54971   { 7276 /* image_sample_c_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54981   { 7276 /* image_sample_c_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
54991   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55001   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55011   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55021   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55031   { 7276 /* image_sample_c_d_cl */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55041   { 7276 /* image_sample_c_d_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55051   { 7276 /* image_sample_c_d_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55061   { 7276 /* image_sample_c_d_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55071   { 7276 /* image_sample_c_d_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55081   { 7276 /* image_sample_c_d_cl */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55091   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55100   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55109   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55118   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55127   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55136   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55145   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55154   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55163   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55172   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55181   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55190   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55199   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55208   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55217   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55226   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55236   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55246   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55256   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55266   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55276   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55286   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55296   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55306   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55316   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55326   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55336   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55346   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55356   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55366   { 7296 /* image_sample_c_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55376   { 7296 /* image_sample_c_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55386   { 7296 /* image_sample_c_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55396   { 7296 /* image_sample_c_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55406   { 7296 /* image_sample_c_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55416   { 7296 /* image_sample_c_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55426   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55436   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55446   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55456   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55466   { 7296 /* image_sample_c_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55476   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55486   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55496   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55506   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55516   { 7296 /* image_sample_c_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55526   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55536   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55546   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55556   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55566   { 7296 /* image_sample_c_d_cl_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55576   { 7296 /* image_sample_c_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55586   { 7296 /* image_sample_c_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55596   { 7296 /* image_sample_c_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55606   { 7296 /* image_sample_c_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55616   { 7296 /* image_sample_c_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55626   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55636   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55646   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55656   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55666   { 7296 /* image_sample_c_d_cl_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55676   { 7296 /* image_sample_c_d_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55686   { 7296 /* image_sample_c_d_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55696   { 7296 /* image_sample_c_d_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55706   { 7296 /* image_sample_c_d_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55716   { 7296 /* image_sample_c_d_cl_o */, 131072 /* 17 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55726   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55735   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55744   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55753   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55762   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55771   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55780   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55789   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55798   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55807   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55816   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55825   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55834   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55843   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55852   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
55861   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55871   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55881   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55891   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55901   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55911   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55921   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55931   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55941   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55951   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55961   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55971   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55981   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
55991   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56001   { 7318 /* image_sample_c_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56011   { 7318 /* image_sample_c_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56021   { 7318 /* image_sample_c_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56031   { 7318 /* image_sample_c_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56041   { 7318 /* image_sample_c_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56051   { 7318 /* image_sample_c_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56061   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56071   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56081   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56091   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56101   { 7318 /* image_sample_c_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56111   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56121   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56131   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56141   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56151   { 7318 /* image_sample_c_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56161   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56171   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56181   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56191   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56201   { 7318 /* image_sample_c_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56211   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56221   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56231   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56241   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56251   { 7318 /* image_sample_c_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56261   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56271   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56281   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56291   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56301   { 7318 /* image_sample_c_d_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56311   { 7318 /* image_sample_c_d_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56321   { 7318 /* image_sample_c_d_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56331   { 7318 /* image_sample_c_d_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56341   { 7318 /* image_sample_c_d_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56351   { 7318 /* image_sample_c_d_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56361   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56370   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56379   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56388   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56397   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56406   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56415   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56424   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56433   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56442   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56451   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56460   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56469   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56478   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56487   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56496   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56505   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56514   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56523   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56532   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56541   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56551   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56561   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56571   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56581   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56591   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56601   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56611   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56621   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56631   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56641   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56651   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56661   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56671   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56681   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56691   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56701   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56711   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56721   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56731   { 7337 /* image_sample_c_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56741   { 7337 /* image_sample_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56751   { 7337 /* image_sample_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56761   { 7337 /* image_sample_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56771   { 7337 /* image_sample_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56781   { 7337 /* image_sample_c_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56791   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56801   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56811   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56821   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56831   { 7337 /* image_sample_c_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56841   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56851   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56861   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56871   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56881   { 7337 /* image_sample_c_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56891   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56901   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56911   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56921   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56931   { 7337 /* image_sample_c_l */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
56941   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56950   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56959   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56968   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56977   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56986   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
56995   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57004   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57013   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57022   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57031   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57040   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57049   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57058   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57067   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57076   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57086   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57096   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57106   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57116   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57126   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57136   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57146   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57156   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57166   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57176   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57186   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57196   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57206   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57216   { 7354 /* image_sample_c_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57226   { 7354 /* image_sample_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57236   { 7354 /* image_sample_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57246   { 7354 /* image_sample_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57256   { 7354 /* image_sample_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57266   { 7354 /* image_sample_c_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57276   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57286   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57296   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57306   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57316   { 7354 /* image_sample_c_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57326   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57336   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57346   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57356   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57366   { 7354 /* image_sample_c_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57376   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57386   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57396   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57406   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57416   { 7354 /* image_sample_c_l_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57426   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57435   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57444   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57453   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57462   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57471   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57480   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57489   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57498   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57507   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57516   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57525   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57534   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57543   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57552   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57561   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57571   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57581   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57591   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57601   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57611   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57621   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57631   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57641   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57651   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57661   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57671   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57681   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57691   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57701   { 7373 /* image_sample_c_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57711   { 7373 /* image_sample_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57721   { 7373 /* image_sample_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57731   { 7373 /* image_sample_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57741   { 7373 /* image_sample_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57751   { 7373 /* image_sample_c_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57761   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57771   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57781   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57791   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57801   { 7373 /* image_sample_c_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57811   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57821   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57831   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57841   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57851   { 7373 /* image_sample_c_lz */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
57861   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57870   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57879   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57888   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57897   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57906   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57915   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57924   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57933   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57942   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57951   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57960   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57969   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57978   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57987   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
57996   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58006   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58016   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58026   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58036   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58046   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58056   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58066   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58076   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58086   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58096   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58106   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58116   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58126   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58136   { 7391 /* image_sample_c_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58146   { 7391 /* image_sample_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58156   { 7391 /* image_sample_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58166   { 7391 /* image_sample_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58176   { 7391 /* image_sample_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58186   { 7391 /* image_sample_c_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58196   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58206   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58216   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58226   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58236   { 7391 /* image_sample_c_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58246   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58256   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58266   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58276   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58286   { 7391 /* image_sample_c_lz_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58296   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58305   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58314   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58323   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58332   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58341   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58350   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58359   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58368   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58377   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58386   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58395   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58404   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58413   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58422   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58431   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58441   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58451   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58461   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58471   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58481   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58491   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58501   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58511   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58521   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58531   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58541   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58551   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58561   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58571   { 7411 /* image_sample_c_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58581   { 7411 /* image_sample_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58591   { 7411 /* image_sample_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58601   { 7411 /* image_sample_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58611   { 7411 /* image_sample_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58621   { 7411 /* image_sample_c_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58631   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58641   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58651   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58661   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58671   { 7411 /* image_sample_c_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58681   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58691   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58701   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58711   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58721   { 7411 /* image_sample_c_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58731   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58740   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58749   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58758   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58767   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58776   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58785   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58794   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58803   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58812   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58821   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58830   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58839   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58848   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58857   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58866   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58875   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58884   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58893   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58902   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58911   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58920   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58929   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58938   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58947   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
58956   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58966   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58976   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58986   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
58996   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59006   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59016   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59026   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59036   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59046   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59056   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59066   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59076   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59086   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59096   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59106   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59116   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59126   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59136   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59146   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59156   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59166   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59176   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59186   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59196   { 7428 /* image_sample_cd */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59206   { 7428 /* image_sample_cd */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59216   { 7428 /* image_sample_cd */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59226   { 7428 /* image_sample_cd */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59236   { 7428 /* image_sample_cd */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59246   { 7428 /* image_sample_cd */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59256   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59266   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59276   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59286   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59296   { 7428 /* image_sample_cd */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59306   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59316   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59326   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59336   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59346   { 7428 /* image_sample_cd */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59356   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59366   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59376   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59386   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59396   { 7428 /* image_sample_cd */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59406   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59416   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59426   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59436   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59446   { 7428 /* image_sample_cd */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59456   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59466   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59476   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59486   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59496   { 7428 /* image_sample_cd */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59506   { 7428 /* image_sample_cd */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59516   { 7428 /* image_sample_cd */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59526   { 7428 /* image_sample_cd */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59536   { 7428 /* image_sample_cd */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59546   { 7428 /* image_sample_cd */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59556   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59565   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59574   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59583   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59592   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59601   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59610   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59619   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59628   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59637   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59646   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59655   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59664   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59673   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59682   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59691   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59700   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59709   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59718   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59727   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59736   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59745   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59754   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59763   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59772   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
59781   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59791   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59801   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59811   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59821   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59831   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59841   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59851   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59861   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59871   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59881   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59891   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59901   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59911   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59921   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59931   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59941   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59951   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59961   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59971   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59981   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
59991   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60001   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60011   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60021   { 7444 /* image_sample_cd_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60031   { 7444 /* image_sample_cd_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60041   { 7444 /* image_sample_cd_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60051   { 7444 /* image_sample_cd_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60061   { 7444 /* image_sample_cd_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60071   { 7444 /* image_sample_cd_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60081   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60091   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60101   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60111   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60121   { 7444 /* image_sample_cd_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60131   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60141   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60151   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60161   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60171   { 7444 /* image_sample_cd_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60181   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60191   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60201   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60211   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60221   { 7444 /* image_sample_cd_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60231   { 7444 /* image_sample_cd_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60241   { 7444 /* image_sample_cd_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60251   { 7444 /* image_sample_cd_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60261   { 7444 /* image_sample_cd_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60271   { 7444 /* image_sample_cd_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60281   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60291   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60301   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60311   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60321   { 7444 /* image_sample_cd_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60331   { 7444 /* image_sample_cd_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60341   { 7444 /* image_sample_cd_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60351   { 7444 /* image_sample_cd_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60361   { 7444 /* image_sample_cd_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60371   { 7444 /* image_sample_cd_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60381   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60390   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60399   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60408   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60417   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60426   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60435   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60444   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60453   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60462   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60471   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60480   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60489   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60498   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60507   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60516   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60525   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60534   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60543   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60552   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
60561   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60571   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60581   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60591   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60601   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60611   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60621   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60631   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60641   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60651   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60661   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60671   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60681   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60691   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60701   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60711   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60721   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60731   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60741   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60751   { 7463 /* image_sample_cd_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60761   { 7463 /* image_sample_cd_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60771   { 7463 /* image_sample_cd_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60781   { 7463 /* image_sample_cd_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60791   { 7463 /* image_sample_cd_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60801   { 7463 /* image_sample_cd_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60811   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60821   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60831   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60841   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60851   { 7463 /* image_sample_cd_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60861   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60871   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60881   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60891   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60901   { 7463 /* image_sample_cd_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60911   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60921   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60931   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60941   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60951   { 7463 /* image_sample_cd_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60961   { 7463 /* image_sample_cd_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60971   { 7463 /* image_sample_cd_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60981   { 7463 /* image_sample_cd_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
60991   { 7463 /* image_sample_cd_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61001   { 7463 /* image_sample_cd_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61011   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61021   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61031   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61041   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61051   { 7463 /* image_sample_cd_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61061   { 7463 /* image_sample_cd_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61071   { 7463 /* image_sample_cd_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61081   { 7463 /* image_sample_cd_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61091   { 7463 /* image_sample_cd_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61101   { 7463 /* image_sample_cd_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61111   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61120   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61129   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61138   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61147   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61156   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61165   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61174   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61183   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61192   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61201   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61210   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61219   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61228   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61237   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61246   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61255   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61264   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61273   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61282   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61291   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61301   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61311   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61321   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61331   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61341   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61351   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61361   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61371   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61381   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61391   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61401   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61411   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61421   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61431   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61441   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61451   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61461   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61471   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61481   { 7484 /* image_sample_cd_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61491   { 7484 /* image_sample_cd_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61501   { 7484 /* image_sample_cd_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61511   { 7484 /* image_sample_cd_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61521   { 7484 /* image_sample_cd_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61531   { 7484 /* image_sample_cd_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61541   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61551   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61561   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61571   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61581   { 7484 /* image_sample_cd_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61591   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61601   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61611   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61621   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61631   { 7484 /* image_sample_cd_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61641   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61651   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61661   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61671   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61681   { 7484 /* image_sample_cd_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61691   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61701   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61711   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61721   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61731   { 7484 /* image_sample_cd_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61741   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61751   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61761   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61771   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61781   { 7484 /* image_sample_cd_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61791   { 7484 /* image_sample_cd_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61801   { 7484 /* image_sample_cd_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61811   { 7484 /* image_sample_cd_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61821   { 7484 /* image_sample_cd_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61831   { 7484 /* image_sample_cd_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
61841   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61850   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61859   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61868   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61877   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61886   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61895   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61904   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61913   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61922   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61931   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61940   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61949   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61958   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61967   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61976   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61985   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
61994   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62003   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62012   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62021   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62031   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62041   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62051   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62061   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62071   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62081   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62091   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62101   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62111   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62121   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62131   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62141   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62151   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62161   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62171   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62181   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62191   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62201   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62211   { 7502 /* image_sample_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62221   { 7502 /* image_sample_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62231   { 7502 /* image_sample_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62241   { 7502 /* image_sample_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62251   { 7502 /* image_sample_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62261   { 7502 /* image_sample_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62271   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62281   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62291   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62301   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62311   { 7502 /* image_sample_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62321   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62331   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62341   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62351   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62361   { 7502 /* image_sample_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62371   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62380   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62389   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62398   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62407   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62416   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62425   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62434   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62443   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62452   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62461   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62470   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62479   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62488   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62497   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62506   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62515   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62524   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62533   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62542   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62551   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62561   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62571   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62581   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62591   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62601   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62611   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62621   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62631   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62641   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62651   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62661   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62671   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62681   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62691   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62701   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62711   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62721   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62731   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62741   { 7518 /* image_sample_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62751   { 7518 /* image_sample_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62761   { 7518 /* image_sample_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62771   { 7518 /* image_sample_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62781   { 7518 /* image_sample_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62791   { 7518 /* image_sample_cl_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62801   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62811   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62821   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62831   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62841   { 7518 /* image_sample_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62851   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62861   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62871   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62881   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62891   { 7518 /* image_sample_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62901   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62911   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62921   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62931   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62941   { 7518 /* image_sample_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
62951   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62960   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62969   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62978   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62987   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
62996   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63005   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63014   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63023   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63032   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63041   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63050   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63059   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63068   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63077   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63086   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63095   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63104   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63113   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63122   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63131   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63140   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63149   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63158   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63167   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63176   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63186   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63196   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63206   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63216   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63226   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63236   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63246   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63256   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63266   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63276   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63286   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63296   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63306   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63316   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63326   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63336   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63346   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63356   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63366   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63376   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63386   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63396   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63406   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63416   { 7536 /* image_sample_d */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63426   { 7536 /* image_sample_d */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63436   { 7536 /* image_sample_d */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63446   { 7536 /* image_sample_d */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63456   { 7536 /* image_sample_d */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63466   { 7536 /* image_sample_d */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63476   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63486   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63496   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63506   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63516   { 7536 /* image_sample_d */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63526   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63536   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63546   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63556   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63566   { 7536 /* image_sample_d */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63576   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63586   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63596   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63606   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63616   { 7536 /* image_sample_d */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63626   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63636   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63646   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63656   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63666   { 7536 /* image_sample_d */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63676   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63686   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63696   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63706   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63716   { 7536 /* image_sample_d */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63726   { 7536 /* image_sample_d */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63736   { 7536 /* image_sample_d */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63746   { 7536 /* image_sample_d */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63756   { 7536 /* image_sample_d */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63766   { 7536 /* image_sample_d */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
63776   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63785   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63794   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63803   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63812   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63821   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63830   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63839   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63848   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63857   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63866   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63875   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63884   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63893   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63902   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63911   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63920   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63929   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63938   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63947   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63956   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63965   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63974   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63983   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
63992   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64001   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64011   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64021   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64031   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64041   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64051   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64061   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64071   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64081   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64091   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64101   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64111   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64121   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64131   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64141   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64151   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64161   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64171   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64181   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64191   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64201   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64211   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64221   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64231   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64241   { 7551 /* image_sample_d_cl */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64251   { 7551 /* image_sample_d_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64261   { 7551 /* image_sample_d_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64271   { 7551 /* image_sample_d_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64281   { 7551 /* image_sample_d_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64291   { 7551 /* image_sample_d_cl */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64301   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64311   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64321   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64331   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64341   { 7551 /* image_sample_d_cl */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64351   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64361   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64371   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64381   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64391   { 7551 /* image_sample_d_cl */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64401   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64411   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64421   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64431   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64441   { 7551 /* image_sample_d_cl */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64451   { 7551 /* image_sample_d_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64461   { 7551 /* image_sample_d_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64471   { 7551 /* image_sample_d_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64481   { 7551 /* image_sample_d_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64491   { 7551 /* image_sample_d_cl */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64501   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64511   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64521   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64531   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64541   { 7551 /* image_sample_d_cl */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64551   { 7551 /* image_sample_d_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64561   { 7551 /* image_sample_d_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64571   { 7551 /* image_sample_d_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64581   { 7551 /* image_sample_d_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64591   { 7551 /* image_sample_d_cl */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64601   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64610   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64619   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64628   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64637   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64646   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64655   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64664   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64673   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64682   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64691   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64700   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64709   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64718   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64727   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64736   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64745   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64754   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64763   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64772   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
64781   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64791   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64801   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64811   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64821   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64831   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64841   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64851   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64861   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64871   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64881   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64891   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64901   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64911   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64921   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64931   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64941   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64951   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64961   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64971   { 7569 /* image_sample_d_cl_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64981   { 7569 /* image_sample_d_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
64991   { 7569 /* image_sample_d_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65001   { 7569 /* image_sample_d_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65011   { 7569 /* image_sample_d_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65021   { 7569 /* image_sample_d_cl_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65031   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65041   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65051   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65061   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65071   { 7569 /* image_sample_d_cl_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65081   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65091   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65101   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65111   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65121   { 7569 /* image_sample_d_cl_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65131   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65141   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65151   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65161   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65171   { 7569 /* image_sample_d_cl_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65181   { 7569 /* image_sample_d_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65191   { 7569 /* image_sample_d_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65201   { 7569 /* image_sample_d_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65211   { 7569 /* image_sample_d_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65221   { 7569 /* image_sample_d_cl_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65231   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65241   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65251   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65261   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65271   { 7569 /* image_sample_d_cl_o */, 16384 /* 14 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65281   { 7569 /* image_sample_d_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65291   { 7569 /* image_sample_d_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65301   { 7569 /* image_sample_d_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65311   { 7569 /* image_sample_d_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65321   { 7569 /* image_sample_d_cl_o */, 65536 /* 16 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65331   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65340   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65349   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65358   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65367   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65376   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65385   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65394   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65403   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65412   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65421   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65430   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65439   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65448   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65457   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65466   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65475   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65484   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65493   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65502   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
65511   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65521   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65531   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65541   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65551   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65561   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65571   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65581   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65591   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65601   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65611   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65621   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65631   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65641   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65651   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65661   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65671   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65681   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65691   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65701   { 7589 /* image_sample_d_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65711   { 7589 /* image_sample_d_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65721   { 7589 /* image_sample_d_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65731   { 7589 /* image_sample_d_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65741   { 7589 /* image_sample_d_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65751   { 7589 /* image_sample_d_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65761   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65771   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65781   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65791   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65801   { 7589 /* image_sample_d_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65811   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65821   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65831   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65841   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65851   { 7589 /* image_sample_d_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65861   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65871   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65881   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65891   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65901   { 7589 /* image_sample_d_o */, 2048 /* 11 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65911   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65921   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65931   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65941   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65951   { 7589 /* image_sample_d_o */, 4096 /* 12 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65961   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65971   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65981   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
65991   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66001   { 7589 /* image_sample_d_o */, 8192 /* 13 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66011   { 7589 /* image_sample_d_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66021   { 7589 /* image_sample_d_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66031   { 7589 /* image_sample_d_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66041   { 7589 /* image_sample_d_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66051   { 7589 /* image_sample_d_o */, 32768 /* 15 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66061   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66070   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66079   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66088   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66097   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66106   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66115   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66124   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66133   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66142   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66151   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66160   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66169   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66178   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66187   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66196   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66205   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66214   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66223   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66232   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66241   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66251   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66261   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66271   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66281   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66291   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66301   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66311   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66321   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66331   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66341   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66351   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66361   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66371   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66381   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66391   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66401   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66411   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66421   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66431   { 7606 /* image_sample_l */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66441   { 7606 /* image_sample_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66451   { 7606 /* image_sample_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66461   { 7606 /* image_sample_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66471   { 7606 /* image_sample_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66481   { 7606 /* image_sample_l */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66491   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66501   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66511   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66521   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66531   { 7606 /* image_sample_l */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66541   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66551   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66561   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66571   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66581   { 7606 /* image_sample_l */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66591   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66600   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66609   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66618   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66627   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66636   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66645   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66654   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66663   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66672   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66681   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66690   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66699   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66708   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66717   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66726   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66735   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66744   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66753   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66762   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
66771   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66781   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66791   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66801   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66811   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66821   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66831   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66841   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66851   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66861   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66871   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66881   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66891   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66901   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66911   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66921   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66931   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66941   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66951   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66961   { 7621 /* image_sample_l_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66971   { 7621 /* image_sample_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66981   { 7621 /* image_sample_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
66991   { 7621 /* image_sample_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67001   { 7621 /* image_sample_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67011   { 7621 /* image_sample_l_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67021   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67031   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67041   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67051   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67061   { 7621 /* image_sample_l_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67071   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67081   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67091   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67101   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67111   { 7621 /* image_sample_l_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67121   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67131   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67141   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67151   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67161   { 7621 /* image_sample_l_o */, 1024 /* 10 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67171   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67180   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67189   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67198   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67207   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67216   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67225   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67234   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67243   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67252   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67261   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67270   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67279   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67288   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67297   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67306   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67315   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67324   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67333   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67342   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67351   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67361   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67371   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67381   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67391   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67401   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67411   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67421   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67431   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67441   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67451   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67461   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67471   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67481   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67491   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67501   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67511   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67521   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67531   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67541   { 7638 /* image_sample_lz */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67551   { 7638 /* image_sample_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67561   { 7638 /* image_sample_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67571   { 7638 /* image_sample_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67581   { 7638 /* image_sample_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67591   { 7638 /* image_sample_lz */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67601   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67611   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67621   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67631   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67641   { 7638 /* image_sample_lz */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67651   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67660   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67669   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67678   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67687   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67696   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67705   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67714   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67723   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67732   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67741   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67750   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67759   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67768   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67777   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
67786   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67796   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67806   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67816   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67826   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67836   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67846   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67856   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67866   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67876   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67886   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67896   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67906   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67916   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67926   { 7654 /* image_sample_lz_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67936   { 7654 /* image_sample_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67946   { 7654 /* image_sample_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67956   { 7654 /* image_sample_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67966   { 7654 /* image_sample_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67976   { 7654 /* image_sample_lz_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67986   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
67996   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68006   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68016   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68026   { 7654 /* image_sample_lz_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68036   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68046   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68056   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68066   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68076   { 7654 /* image_sample_lz_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68086   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68095   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68104   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68113   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68122   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68131   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68140   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68149   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68158   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68167   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68176   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68185   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68194   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68203   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68212   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68221   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68231   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68241   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68251   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68261   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68271   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68281   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68291   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68301   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68311   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68321   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68331   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68341   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68351   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68361   { 7672 /* image_sample_o */, 16 /* 4 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68371   { 7672 /* image_sample_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68381   { 7672 /* image_sample_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68391   { 7672 /* image_sample_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68401   { 7672 /* image_sample_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68411   { 7672 /* image_sample_o */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68421   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68431   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68441   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68451   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68461   { 7672 /* image_sample_o */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68471   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68481   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68491   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68501   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68511   { 7672 /* image_sample_o */, 512 /* 9 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68521   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68530   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68539   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68548   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68557   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68566   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68575   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68584   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68593   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68602   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68611   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68620   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68629   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68638   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68647   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68656   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68665   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68675   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68685   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68695   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68705   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68715   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68725   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68735   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68745   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68755   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68765   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68775   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68785   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68795   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68805   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68815   { 7687 /* image_store */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68825   { 7687 /* image_store */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68835   { 7687 /* image_store */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68845   { 7687 /* image_store */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68855   { 7687 /* image_store */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68865   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68875   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68885   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68895   { 7687 /* image_store */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68905   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68915   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68925   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68935   { 7687 /* image_store */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
68945   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68954   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68963   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68972   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68981   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68990   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
68999   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69008   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69017   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69026   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69035   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69044   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69053   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69062   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69071   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69080   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69089   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69099   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69109   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69119   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69129   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69139   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69149   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69159   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69169   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69179   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69189   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69199   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69209   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69219   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69229   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69239   { 7699 /* image_store_mip */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69249   { 7699 /* image_store_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69259   { 7699 /* image_store_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69269   { 7699 /* image_store_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69279   { 7699 /* image_store_mip */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69289   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69299   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69309   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69319   { 7699 /* image_store_mip */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69329   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69339   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69349   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69359   { 7699 /* image_store_mip */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69368   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69376   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69384   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69392   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69400   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69408   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69416   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69424   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69432   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69440   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69448   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69456   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69464   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69472   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69480   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69488   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69496   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69505   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69514   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69523   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69532   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69541   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69550   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69559   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69568   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69577   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69586   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69595   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69604   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69613   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69622   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69631   { 7715 /* image_store_mip_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69640   { 7715 /* image_store_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69649   { 7715 /* image_store_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69658   { 7715 /* image_store_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69667   { 7715 /* image_store_mip_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69676   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69685   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69694   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69703   { 7715 /* image_store_mip_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69712   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69721   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69730   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69739   { 7715 /* image_store_mip_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69748   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69756   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69764   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69772   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69780   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69788   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69796   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69804   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69812   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69820   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69828   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69836   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69844   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69852   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69860   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69868   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX6GFX7GFX8GFX9_isGFX6GFX7GFX8GFX9 },
69876   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69885   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69894   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69903   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69912   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69921   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69930   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69939   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69948   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69957   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69966   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69975   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69984   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
69993   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70002   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70011   { 7735 /* image_store_pck */, 8 /* 3 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70020   { 7735 /* image_store_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70029   { 7735 /* image_store_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70038   { 7735 /* image_store_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70047   { 7735 /* image_store_pck */, 64 /* 6 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70056   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70065   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70074   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70083   { 7735 /* image_store_pck */, 128 /* 7 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70092   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70101   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70110   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
70119   { 7735 /* image_store_pck */, 256 /* 8 */, MCK_ImmDMask, AMFBS_isGFX10Plus_isGFX10Plus },
80357   case MCK_ImmDMask: