reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 5329   case MCK_BoolReg: {
10046   case MCK_BoolReg: return "MCK_BoolReg";
21442   { 13222 /* v_add_co_ci_u32 */, AMDGPU::V_ADD_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21442   { 13222 /* v_add_co_ci_u32 */, AMDGPU::V_ADD_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21445   { 13238 /* v_add_co_u32 */, AMDGPU::V_ADD_CO_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
21446   { 13238 /* v_add_co_u32 */, AMDGPU::V_ADD_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
21457   { 13291 /* v_add_i32 */, AMDGPU::V_ADD_I32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
21466   { 13378 /* v_add_u32 */, AMDGPU::V_ADD_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
21469   { 13388 /* v_addc_co_u32 */, AMDGPU::V_ADDC_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21469   { 13388 /* v_addc_co_u32 */, AMDGPU::V_ADDC_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21470   { 13402 /* v_addc_u32 */, AMDGPU::V_ADDC_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21470   { 13402 /* v_addc_u32 */, AMDGPU::V_ADDC_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21471   { 13402 /* v_addc_u32 */, AMDGPU::V_ADDC_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21471   { 13402 /* v_addc_u32 */, AMDGPU::V_ADDC_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
21521   { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21522   { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21523   { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21524   { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21525   { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21526   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21527   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21528   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21529   { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21530   { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21531   { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21532   { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21533   { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21534   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21535   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21536   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21537   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21538   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21539   { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21540   { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21541   { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21542   { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21543   { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21544   { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21545   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21546   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21547   { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21548   { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21549   { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21550   { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21551   { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21552   { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21553   { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21554   { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21555   { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21556   { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21557   { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21558   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21559   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21560   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21561   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21562   { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21563   { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21564   { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21565   { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21566   { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21567   { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21568   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21569   { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21570   { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21571   { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21572   { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21573   { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21574   { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21575   { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21576   { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21577   { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21578   { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21579   { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21580   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21581   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21582   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21583   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21584   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21585   { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21586   { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21587   { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21588   { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21589   { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21590   { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21591   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21592   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21593   { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21594   { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21595   { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21596   { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21597   { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21598   { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21599   { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21600   { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21601   { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21602   { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21603   { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21604   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21605   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21606   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21607   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21608   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21609   { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21610   { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21611   { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21612   { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21613   { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21614   { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21615   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21616   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21617   { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21618   { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21619   { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21620   { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21621   { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21622   { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21623   { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21624   { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21625   { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21626   { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21627   { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21628   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21629   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21630   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21631   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21632   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21633   { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21634   { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21635   { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21636   { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21637   { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21638   { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21639   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21640   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21641   { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21642   { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21643   { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21644   { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21645   { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21646   { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21647   { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21648   { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21649   { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21650   { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21651   { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21652   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21653   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21654   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21655   { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21656   { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21657   { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21658   { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21659   { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21660   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21661   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21662   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21663   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21664   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21665   { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21666   { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21667   { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21668   { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21669   { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21670   { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21671   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21672   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21673   { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21674   { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21675   { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21676   { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21677   { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21678   { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21679   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21680   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21681   { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21682   { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21683   { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21684   { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21685   { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21686   { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21687   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21688   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21689   { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21690   { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21691   { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21692   { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21693   { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21694   { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21695   { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21696   { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21697   { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21698   { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21699   { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21700   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21701   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21702   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21703   { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21704   { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21705   { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21706   { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21707   { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21708   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21709   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21710   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21711   { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21712   { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21713   { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21714   { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21715   { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21716   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21717   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21718   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21719   { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21720   { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21721   { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21722   { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21723   { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21724   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21725   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21726   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21727   { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21728   { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21729   { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21730   { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21731   { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21732   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21733   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21734   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21735   { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21736   { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21737   { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21738   { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21739   { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21740   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21741   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21742   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21743   { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21744   { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21745   { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21746   { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21747   { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21748   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21749   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21750   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21751   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21752   { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21753   { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21754   { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21755   { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21756   { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21757   { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21758   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21759   { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_e64_gfx10, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21760   { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21761   { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21762   { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e64_gfx10, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21763   { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21764   { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21765   { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21766   { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21767   { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21768   { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21769   { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21770   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21771   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21772   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21773   { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21774   { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21775   { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21776   { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21777   { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21778   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21779   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21780   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21781   { 16629 /* v_cmps_eq_f32 */, AMDGPU::V_CMPS_EQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21782   { 16661 /* v_cmps_eq_f64 */, AMDGPU::V_CMPS_EQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21783   { 16693 /* v_cmps_f_f32 */, AMDGPU::V_CMPS_F_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21784   { 16723 /* v_cmps_f_f64 */, AMDGPU::V_CMPS_F_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21785   { 16753 /* v_cmps_ge_f32 */, AMDGPU::V_CMPS_GE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21786   { 16785 /* v_cmps_ge_f64 */, AMDGPU::V_CMPS_GE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21787   { 16817 /* v_cmps_gt_f32 */, AMDGPU::V_CMPS_GT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21788   { 16849 /* v_cmps_gt_f64 */, AMDGPU::V_CMPS_GT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21789   { 16881 /* v_cmps_le_f32 */, AMDGPU::V_CMPS_LE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21790   { 16913 /* v_cmps_le_f64 */, AMDGPU::V_CMPS_LE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21791   { 16945 /* v_cmps_lg_f32 */, AMDGPU::V_CMPS_LG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21792   { 16977 /* v_cmps_lg_f64 */, AMDGPU::V_CMPS_LG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21793   { 17009 /* v_cmps_lt_f32 */, AMDGPU::V_CMPS_LT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21794   { 17041 /* v_cmps_lt_f64 */, AMDGPU::V_CMPS_LT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21795   { 17073 /* v_cmps_neq_f32 */, AMDGPU::V_CMPS_NEQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21796   { 17107 /* v_cmps_neq_f64 */, AMDGPU::V_CMPS_NEQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21797   { 17141 /* v_cmps_nge_f32 */, AMDGPU::V_CMPS_NGE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21798   { 17175 /* v_cmps_nge_f64 */, AMDGPU::V_CMPS_NGE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21799   { 17209 /* v_cmps_ngt_f32 */, AMDGPU::V_CMPS_NGT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21800   { 17243 /* v_cmps_ngt_f64 */, AMDGPU::V_CMPS_NGT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21801   { 17277 /* v_cmps_nle_f32 */, AMDGPU::V_CMPS_NLE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21802   { 17311 /* v_cmps_nle_f64 */, AMDGPU::V_CMPS_NLE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21803   { 17345 /* v_cmps_nlg_f32 */, AMDGPU::V_CMPS_NLG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21804   { 17379 /* v_cmps_nlg_f64 */, AMDGPU::V_CMPS_NLG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21805   { 17413 /* v_cmps_nlt_f32 */, AMDGPU::V_CMPS_NLT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21806   { 17447 /* v_cmps_nlt_f64 */, AMDGPU::V_CMPS_NLT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21807   { 17481 /* v_cmps_o_f32 */, AMDGPU::V_CMPS_O_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21808   { 17511 /* v_cmps_o_f64 */, AMDGPU::V_CMPS_O_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21809   { 17541 /* v_cmps_tru_f32 */, AMDGPU::V_CMPS_TRU_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21810   { 17575 /* v_cmps_tru_f64 */, AMDGPU::V_CMPS_TRU_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21811   { 17609 /* v_cmps_u_f32 */, AMDGPU::V_CMPS_U_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21812   { 17639 /* v_cmps_u_f64 */, AMDGPU::V_CMPS_U_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21813   { 17669 /* v_cmpsx_eq_f32 */, AMDGPU::V_CMPSX_EQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21814   { 17703 /* v_cmpsx_eq_f64 */, AMDGPU::V_CMPSX_EQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21815   { 17737 /* v_cmpsx_f_f32 */, AMDGPU::V_CMPSX_F_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21816   { 17769 /* v_cmpsx_f_f64 */, AMDGPU::V_CMPSX_F_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21817   { 17801 /* v_cmpsx_ge_f32 */, AMDGPU::V_CMPSX_GE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21818   { 17835 /* v_cmpsx_ge_f64 */, AMDGPU::V_CMPSX_GE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21819   { 17869 /* v_cmpsx_gt_f32 */, AMDGPU::V_CMPSX_GT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21820   { 17903 /* v_cmpsx_gt_f64 */, AMDGPU::V_CMPSX_GT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21821   { 17937 /* v_cmpsx_le_f32 */, AMDGPU::V_CMPSX_LE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21822   { 17971 /* v_cmpsx_le_f64 */, AMDGPU::V_CMPSX_LE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21823   { 18005 /* v_cmpsx_lg_f32 */, AMDGPU::V_CMPSX_LG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21824   { 18039 /* v_cmpsx_lg_f64 */, AMDGPU::V_CMPSX_LG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21825   { 18073 /* v_cmpsx_lt_f32 */, AMDGPU::V_CMPSX_LT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21826   { 18107 /* v_cmpsx_lt_f64 */, AMDGPU::V_CMPSX_LT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21827   { 18141 /* v_cmpsx_neq_f32 */, AMDGPU::V_CMPSX_NEQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21828   { 18177 /* v_cmpsx_neq_f64 */, AMDGPU::V_CMPSX_NEQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21829   { 18213 /* v_cmpsx_nge_f32 */, AMDGPU::V_CMPSX_NGE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21830   { 18249 /* v_cmpsx_nge_f64 */, AMDGPU::V_CMPSX_NGE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21831   { 18285 /* v_cmpsx_ngt_f32 */, AMDGPU::V_CMPSX_NGT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21832   { 18321 /* v_cmpsx_ngt_f64 */, AMDGPU::V_CMPSX_NGT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21833   { 18357 /* v_cmpsx_nle_f32 */, AMDGPU::V_CMPSX_NLE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21834   { 18393 /* v_cmpsx_nle_f64 */, AMDGPU::V_CMPSX_NLE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21835   { 18429 /* v_cmpsx_nlg_f32 */, AMDGPU::V_CMPSX_NLG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21836   { 18465 /* v_cmpsx_nlg_f64 */, AMDGPU::V_CMPSX_NLG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21837   { 18501 /* v_cmpsx_nlt_f32 */, AMDGPU::V_CMPSX_NLT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21838   { 18537 /* v_cmpsx_nlt_f64 */, AMDGPU::V_CMPSX_NLT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21839   { 18573 /* v_cmpsx_o_f32 */, AMDGPU::V_CMPSX_O_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21840   { 18605 /* v_cmpsx_o_f64 */, AMDGPU::V_CMPSX_O_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21841   { 18637 /* v_cmpsx_tru_f32 */, AMDGPU::V_CMPSX_TRU_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21842   { 18673 /* v_cmpsx_tru_f64 */, AMDGPU::V_CMPSX_TRU_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21843   { 18709 /* v_cmpsx_u_f32 */, AMDGPU::V_CMPSX_U_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21844   { 18741 /* v_cmpsx_u_f64 */, AMDGPU::V_CMPSX_U_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21846   { 18773 /* v_cmpx_class_f16 */, AMDGPU::V_CMPX_CLASS_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21848   { 18811 /* v_cmpx_class_f32 */, AMDGPU::V_CMPX_CLASS_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21849   { 18811 /* v_cmpx_class_f32 */, AMDGPU::V_CMPX_CLASS_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21851   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21852   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21854   { 18887 /* v_cmpx_eq_f16 */, AMDGPU::V_CMPX_EQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21856   { 18919 /* v_cmpx_eq_f32 */, AMDGPU::V_CMPX_EQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21857   { 18919 /* v_cmpx_eq_f32 */, AMDGPU::V_CMPX_EQ_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21859   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21860   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21862   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21864   { 19015 /* v_cmpx_eq_i32 */, AMDGPU::V_CMPX_EQ_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21865   { 19015 /* v_cmpx_eq_i32 */, AMDGPU::V_CMPX_EQ_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21867   { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21868   { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21870   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21872   { 19111 /* v_cmpx_eq_u32 */, AMDGPU::V_CMPX_EQ_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21873   { 19111 /* v_cmpx_eq_u32 */, AMDGPU::V_CMPX_EQ_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21875   { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21876   { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21878   { 19175 /* v_cmpx_f_f16 */, AMDGPU::V_CMPX_F_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21880   { 19205 /* v_cmpx_f_f32 */, AMDGPU::V_CMPX_F_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21881   { 19205 /* v_cmpx_f_f32 */, AMDGPU::V_CMPX_F_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21883   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21884   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21885   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21887   { 19295 /* v_cmpx_f_i32 */, AMDGPU::V_CMPX_F_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21888   { 19295 /* v_cmpx_f_i32 */, AMDGPU::V_CMPX_F_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21890   { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21891   { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21892   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21894   { 19385 /* v_cmpx_f_u32 */, AMDGPU::V_CMPX_F_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21895   { 19385 /* v_cmpx_f_u32 */, AMDGPU::V_CMPX_F_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21897   { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21898   { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21900   { 19445 /* v_cmpx_ge_f16 */, AMDGPU::V_CMPX_GE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21902   { 19477 /* v_cmpx_ge_f32 */, AMDGPU::V_CMPX_GE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21903   { 19477 /* v_cmpx_ge_f32 */, AMDGPU::V_CMPX_GE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21905   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21906   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21908   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21910   { 19573 /* v_cmpx_ge_i32 */, AMDGPU::V_CMPX_GE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21911   { 19573 /* v_cmpx_ge_i32 */, AMDGPU::V_CMPX_GE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21913   { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21914   { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21916   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21918   { 19669 /* v_cmpx_ge_u32 */, AMDGPU::V_CMPX_GE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21919   { 19669 /* v_cmpx_ge_u32 */, AMDGPU::V_CMPX_GE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21921   { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21922   { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21924   { 19733 /* v_cmpx_gt_f16 */, AMDGPU::V_CMPX_GT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21926   { 19765 /* v_cmpx_gt_f32 */, AMDGPU::V_CMPX_GT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21927   { 19765 /* v_cmpx_gt_f32 */, AMDGPU::V_CMPX_GT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21929   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21930   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21932   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21934   { 19861 /* v_cmpx_gt_i32 */, AMDGPU::V_CMPX_GT_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21935   { 19861 /* v_cmpx_gt_i32 */, AMDGPU::V_CMPX_GT_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21937   { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21938   { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21940   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21942   { 19957 /* v_cmpx_gt_u32 */, AMDGPU::V_CMPX_GT_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21943   { 19957 /* v_cmpx_gt_u32 */, AMDGPU::V_CMPX_GT_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21945   { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21946   { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21948   { 20021 /* v_cmpx_le_f16 */, AMDGPU::V_CMPX_LE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21950   { 20053 /* v_cmpx_le_f32 */, AMDGPU::V_CMPX_LE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21951   { 20053 /* v_cmpx_le_f32 */, AMDGPU::V_CMPX_LE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21953   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21954   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21956   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21958   { 20149 /* v_cmpx_le_i32 */, AMDGPU::V_CMPX_LE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21959   { 20149 /* v_cmpx_le_i32 */, AMDGPU::V_CMPX_LE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21961   { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21962   { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21964   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21966   { 20245 /* v_cmpx_le_u32 */, AMDGPU::V_CMPX_LE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21967   { 20245 /* v_cmpx_le_u32 */, AMDGPU::V_CMPX_LE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21969   { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21970   { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21972   { 20309 /* v_cmpx_lg_f16 */, AMDGPU::V_CMPX_LG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21974   { 20341 /* v_cmpx_lg_f32 */, AMDGPU::V_CMPX_LG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21975   { 20341 /* v_cmpx_lg_f32 */, AMDGPU::V_CMPX_LG_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21977   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21978   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21980   { 20405 /* v_cmpx_lt_f16 */, AMDGPU::V_CMPX_LT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21982   { 20437 /* v_cmpx_lt_f32 */, AMDGPU::V_CMPX_LT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21983   { 20437 /* v_cmpx_lt_f32 */, AMDGPU::V_CMPX_LT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21985   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21986   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21988   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21990   { 20533 /* v_cmpx_lt_i32 */, AMDGPU::V_CMPX_LT_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21991   { 20533 /* v_cmpx_lt_i32 */, AMDGPU::V_CMPX_LT_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21993   { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21994   { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
21996   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21998   { 20629 /* v_cmpx_lt_u32 */, AMDGPU::V_CMPX_LT_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
21999   { 20629 /* v_cmpx_lt_u32 */, AMDGPU::V_CMPX_LT_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22001   { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22002   { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22004   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22006   { 20725 /* v_cmpx_ne_i32 */, AMDGPU::V_CMPX_NE_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22007   { 20725 /* v_cmpx_ne_i32 */, AMDGPU::V_CMPX_NE_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22009   { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22010   { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22012   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22014   { 20821 /* v_cmpx_ne_u32 */, AMDGPU::V_CMPX_NE_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22015   { 20821 /* v_cmpx_ne_u32 */, AMDGPU::V_CMPX_NE_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22017   { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22018   { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22020   { 20885 /* v_cmpx_neq_f16 */, AMDGPU::V_CMPX_NEQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22022   { 20919 /* v_cmpx_neq_f32 */, AMDGPU::V_CMPX_NEQ_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22023   { 20919 /* v_cmpx_neq_f32 */, AMDGPU::V_CMPX_NEQ_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22025   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22026   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22028   { 20987 /* v_cmpx_nge_f16 */, AMDGPU::V_CMPX_NGE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22030   { 21021 /* v_cmpx_nge_f32 */, AMDGPU::V_CMPX_NGE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22031   { 21021 /* v_cmpx_nge_f32 */, AMDGPU::V_CMPX_NGE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22033   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22034   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22036   { 21089 /* v_cmpx_ngt_f16 */, AMDGPU::V_CMPX_NGT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22038   { 21123 /* v_cmpx_ngt_f32 */, AMDGPU::V_CMPX_NGT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22039   { 21123 /* v_cmpx_ngt_f32 */, AMDGPU::V_CMPX_NGT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22041   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22042   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22044   { 21191 /* v_cmpx_nle_f16 */, AMDGPU::V_CMPX_NLE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22046   { 21225 /* v_cmpx_nle_f32 */, AMDGPU::V_CMPX_NLE_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22047   { 21225 /* v_cmpx_nle_f32 */, AMDGPU::V_CMPX_NLE_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22049   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22050   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22052   { 21293 /* v_cmpx_nlg_f16 */, AMDGPU::V_CMPX_NLG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22054   { 21327 /* v_cmpx_nlg_f32 */, AMDGPU::V_CMPX_NLG_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22055   { 21327 /* v_cmpx_nlg_f32 */, AMDGPU::V_CMPX_NLG_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22057   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22058   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22060   { 21395 /* v_cmpx_nlt_f16 */, AMDGPU::V_CMPX_NLT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22062   { 21429 /* v_cmpx_nlt_f32 */, AMDGPU::V_CMPX_NLT_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22063   { 21429 /* v_cmpx_nlt_f32 */, AMDGPU::V_CMPX_NLT_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22065   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22066   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22068   { 21497 /* v_cmpx_o_f16 */, AMDGPU::V_CMPX_O_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22070   { 21527 /* v_cmpx_o_f32 */, AMDGPU::V_CMPX_O_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22071   { 21527 /* v_cmpx_o_f32 */, AMDGPU::V_CMPX_O_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22073   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22074   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22075   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22077   { 21617 /* v_cmpx_t_i32 */, AMDGPU::V_CMPX_T_I32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22078   { 21617 /* v_cmpx_t_i32 */, AMDGPU::V_CMPX_T_I32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22080   { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22081   { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22082   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22084   { 21707 /* v_cmpx_t_u32 */, AMDGPU::V_CMPX_T_U32_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22085   { 21707 /* v_cmpx_t_u32 */, AMDGPU::V_CMPX_T_U32_e64_vi, Convert__BoolReg1_0__VSrcB321_1__VSrcB321_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32 }, },
22087   { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e64_gfx6_gfx7, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22088   { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e64_vi, Convert__BoolReg1_0__VSrcB641_1__VSrcB641_2, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB64, MCK_VSrcB64 }, },
22090   { 21767 /* v_cmpx_tru_f16 */, AMDGPU::V_CMPX_TRU_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22092   { 21801 /* v_cmpx_tru_f32 */, AMDGPU::V_CMPX_TRU_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22093   { 21801 /* v_cmpx_tru_f32 */, AMDGPU::V_CMPX_TRU_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22095   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22096   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22098   { 21869 /* v_cmpx_u_f16 */, AMDGPU::V_CMPX_U_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22100   { 21899 /* v_cmpx_u_f32 */, AMDGPU::V_CMPX_U_F32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22101   { 21899 /* v_cmpx_u_f32 */, AMDGPU::V_CMPX_U_F32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22103   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22104   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22105   { 21959 /* v_cndmask_b32 */, AMDGPU::V_CNDMASK_B32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_BoolReg }, },
22106   { 21959 /* v_cndmask_b32 */, AMDGPU::V_CNDMASK_B32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_BoolReg }, },
22107   { 21959 /* v_cndmask_b32 */, AMDGPU::V_CNDMASK_B32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_BoolReg }, },
22244   { 22704 /* v_div_scale_f32 */, AMDGPU::V_DIV_SCALE_F32_gfx10, Convert__Reg1_0__BoolReg1_1__VSrcF321_2__VSrcF321_3__VSrcF321_4, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcF32, MCK_VSrcF32, MCK_VSrcF32 }, },
22245   { 22704 /* v_div_scale_f32 */, AMDGPU::V_DIV_SCALE_F32_gfx6_gfx7, Convert__Reg1_0__BoolReg1_1__VSrcF321_2__VSrcF321_3__VSrcF321_4, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcF32, MCK_VSrcF32, MCK_VSrcF32 }, },
22246   { 22704 /* v_div_scale_f32 */, AMDGPU::V_DIV_SCALE_F32_vi, Convert__Reg1_0__BoolReg1_1__VSrcF321_2__VSrcF321_3__VSrcF321_4, AMFBS_isGFX8GFX9, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcF32, MCK_VSrcF32, MCK_VSrcF32 }, },
22247   { 22720 /* v_div_scale_f64 */, AMDGPU::V_DIV_SCALE_F64_gfx10, Convert__Reg1_0__BoolReg1_1__VSrcF641_2__VSrcF641_3__VSrcF641_4, AMFBS_isGFX10Plus, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcF64, MCK_VSrcF64, MCK_VSrcF64 }, },
22248   { 22720 /* v_div_scale_f64 */, AMDGPU::V_DIV_SCALE_F64_gfx6_gfx7, Convert__Reg1_0__BoolReg1_1__VSrcF641_2__VSrcF641_3__VSrcF641_4, AMFBS_isGFX6GFX7, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcF64, MCK_VSrcF64, MCK_VSrcF64 }, },
22249   { 22720 /* v_div_scale_f64 */, AMDGPU::V_DIV_SCALE_F64_vi, Convert__Reg1_0__BoolReg1_1__VSrcF641_2__VSrcF641_3__VSrcF641_4, AMFBS_isGFX8GFX9, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcF64, MCK_VSrcF64, MCK_VSrcF64 }, },
22406   { 23790 /* v_mad_i64_i32 */, AMDGPU::V_MAD_I64_I32_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX10Plus, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22407   { 23790 /* v_mad_i64_i32 */, AMDGPU::V_MAD_I64_I32_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX7Only, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22408   { 23790 /* v_mad_i64_i32 */, AMDGPU::V_MAD_I64_I32_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX8GFX9, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22426   { 23956 /* v_mad_u64_u32 */, AMDGPU::V_MAD_U64_U32_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX10Plus, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22427   { 23956 /* v_mad_u64_u32 */, AMDGPU::V_MAD_U64_U32_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX7Only, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22428   { 23956 /* v_mad_u64_u32 */, AMDGPU::V_MAD_U64_U32_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX7Plus_isGFX8GFX9, { MCK_VReg_64, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB64, MCK_ImmClampSI }, },
22724   { 25959 /* v_sub_co_ci_u32 */, AMDGPU::V_SUB_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22724   { 25959 /* v_sub_co_ci_u32 */, AMDGPU::V_SUB_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22727   { 25975 /* v_sub_co_u32 */, AMDGPU::V_SUB_CO_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22728   { 25975 /* v_sub_co_u32 */, AMDGPU::V_SUB_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22736   { 26018 /* v_sub_i32 */, AMDGPU::V_SUB_I32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22743   { 26090 /* v_sub_u32 */, AMDGPU::V_SUB_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22746   { 26100 /* v_subb_co_u32 */, AMDGPU::V_SUBB_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22746   { 26100 /* v_subb_co_u32 */, AMDGPU::V_SUBB_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22747   { 26114 /* v_subb_u32 */, AMDGPU::V_SUBB_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22747   { 26114 /* v_subb_u32 */, AMDGPU::V_SUBB_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22748   { 26114 /* v_subb_u32 */, AMDGPU::V_SUBB_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22748   { 26114 /* v_subb_u32 */, AMDGPU::V_SUBB_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22751   { 26125 /* v_subbrev_co_u32 */, AMDGPU::V_SUBBREV_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22751   { 26125 /* v_subbrev_co_u32 */, AMDGPU::V_SUBBREV_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22752   { 26142 /* v_subbrev_u32 */, AMDGPU::V_SUBBREV_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22752   { 26142 /* v_subbrev_u32 */, AMDGPU::V_SUBBREV_U32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22753   { 26142 /* v_subbrev_u32 */, AMDGPU::V_SUBBREV_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22753   { 26142 /* v_subbrev_u32 */, AMDGPU::V_SUBBREV_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22756   { 26156 /* v_subrev_co_ci_u32 */, AMDGPU::V_SUBREV_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22756   { 26156 /* v_subrev_co_ci_u32 */, AMDGPU::V_SUBREV_CO_CI_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_BoolReg, MCK_ImmClampSI }, },
22759   { 26175 /* v_subrev_co_u32 */, AMDGPU::V_SUBREV_CO_U32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_isGFX10Plus, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22760   { 26175 /* v_subrev_co_u32 */, AMDGPU::V_SUBREV_CO_U32_e64_gfx9, ConvertCustom_cvtVOP3, AMFBS_isGFX9Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22766   { 26217 /* v_subrev_i32 */, AMDGPU::V_SUBREV_I32_e64_gfx6_gfx7, ConvertCustom_cvtVOP3, AMFBS_isGFX6GFX7, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
22770   { 26259 /* v_subrev_u32 */, AMDGPU::V_SUBREV_U32_e64_vi, ConvertCustom_cvtVOP3, AMFBS_isGFX8Only, { MCK_VGPR_32, MCK_BoolReg, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmClampSI }, },
23090   { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23091   { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23092   { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23093   { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23094   { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23095   { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23096   { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23097   { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23098   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23099   { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23100   { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23101   { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23102   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23103   { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23104   { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23105   { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23106   { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23107   { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23108   { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23109   { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23110   { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23111   { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23112   { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23113   { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23114   { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23115   { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23116   { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23117   { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23118   { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23119   { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23120   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23121   { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23122   { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23123   { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23124   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23125   { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23126   { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23127   { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23128   { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23129   { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23130   { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23131   { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23132   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23133   { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23134   { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23135   { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23136   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23137   { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23138   { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23139   { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23140   { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23141   { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23142   { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23143   { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23144   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23145   { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23146   { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23147   { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23148   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23149   { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23150   { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23151   { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23152   { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23153   { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23154   { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23155   { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23156   { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23157   { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23158   { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23159   { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23160   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23161   { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23162   { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23163   { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23164   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23165   { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23166   { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23167   { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23168   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23169   { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23170   { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23171   { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23172   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23173   { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23174   { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23175   { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23176   { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23177   { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23178   { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23179   { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23180   { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23181   { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23182   { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23183   { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23184   { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23185   { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23186   { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23187   { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23188   { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23189   { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23190   { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23191   { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23192   { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23193   { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23194   { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23195   { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23196   { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23197   { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23198   { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23199   { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23200   { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23201   { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23202   { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23203   { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23204   { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23205   { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23206   { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23207   { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23208   { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23209   { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23210   { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23211   { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23212   { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23213   { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23214   { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23215   { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23216   { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_sdwa_gfx10, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA10_isGFX10Plus, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23217   { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23219   { 18773 /* v_cmpx_class_f16 */, AMDGPU::V_CMPX_CLASS_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23221   { 18811 /* v_cmpx_class_f32 */, AMDGPU::V_CMPX_CLASS_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23223   { 18887 /* v_cmpx_eq_f16 */, AMDGPU::V_CMPX_EQ_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23225   { 18919 /* v_cmpx_eq_f32 */, AMDGPU::V_CMPX_EQ_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23227   { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23229   { 19015 /* v_cmpx_eq_i32 */, AMDGPU::V_CMPX_EQ_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23231   { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23233   { 19111 /* v_cmpx_eq_u32 */, AMDGPU::V_CMPX_EQ_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23235   { 19175 /* v_cmpx_f_f16 */, AMDGPU::V_CMPX_F_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23237   { 19205 /* v_cmpx_f_f32 */, AMDGPU::V_CMPX_F_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23238   { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23240   { 19295 /* v_cmpx_f_i32 */, AMDGPU::V_CMPX_F_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23241   { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23243   { 19385 /* v_cmpx_f_u32 */, AMDGPU::V_CMPX_F_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23245   { 19445 /* v_cmpx_ge_f16 */, AMDGPU::V_CMPX_GE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23247   { 19477 /* v_cmpx_ge_f32 */, AMDGPU::V_CMPX_GE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23249   { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23251   { 19573 /* v_cmpx_ge_i32 */, AMDGPU::V_CMPX_GE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23253   { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23255   { 19669 /* v_cmpx_ge_u32 */, AMDGPU::V_CMPX_GE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23257   { 19733 /* v_cmpx_gt_f16 */, AMDGPU::V_CMPX_GT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23259   { 19765 /* v_cmpx_gt_f32 */, AMDGPU::V_CMPX_GT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23261   { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23263   { 19861 /* v_cmpx_gt_i32 */, AMDGPU::V_CMPX_GT_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23265   { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23267   { 19957 /* v_cmpx_gt_u32 */, AMDGPU::V_CMPX_GT_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23269   { 20021 /* v_cmpx_le_f16 */, AMDGPU::V_CMPX_LE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23271   { 20053 /* v_cmpx_le_f32 */, AMDGPU::V_CMPX_LE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23273   { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23275   { 20149 /* v_cmpx_le_i32 */, AMDGPU::V_CMPX_LE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23277   { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23279   { 20245 /* v_cmpx_le_u32 */, AMDGPU::V_CMPX_LE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23281   { 20309 /* v_cmpx_lg_f16 */, AMDGPU::V_CMPX_LG_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23283   { 20341 /* v_cmpx_lg_f32 */, AMDGPU::V_CMPX_LG_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23285   { 20405 /* v_cmpx_lt_f16 */, AMDGPU::V_CMPX_LT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23287   { 20437 /* v_cmpx_lt_f32 */, AMDGPU::V_CMPX_LT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23289   { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23291   { 20533 /* v_cmpx_lt_i32 */, AMDGPU::V_CMPX_LT_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23293   { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23295   { 20629 /* v_cmpx_lt_u32 */, AMDGPU::V_CMPX_LT_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23297   { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23299   { 20725 /* v_cmpx_ne_i32 */, AMDGPU::V_CMPX_NE_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23301   { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23303   { 20821 /* v_cmpx_ne_u32 */, AMDGPU::V_CMPX_NE_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23305   { 20885 /* v_cmpx_neq_f16 */, AMDGPU::V_CMPX_NEQ_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23307   { 20919 /* v_cmpx_neq_f32 */, AMDGPU::V_CMPX_NEQ_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23309   { 20987 /* v_cmpx_nge_f16 */, AMDGPU::V_CMPX_NGE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23311   { 21021 /* v_cmpx_nge_f32 */, AMDGPU::V_CMPX_NGE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23313   { 21089 /* v_cmpx_ngt_f16 */, AMDGPU::V_CMPX_NGT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23315   { 21123 /* v_cmpx_ngt_f32 */, AMDGPU::V_CMPX_NGT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23317   { 21191 /* v_cmpx_nle_f16 */, AMDGPU::V_CMPX_NLE_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23319   { 21225 /* v_cmpx_nle_f32 */, AMDGPU::V_CMPX_NLE_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23321   { 21293 /* v_cmpx_nlg_f16 */, AMDGPU::V_CMPX_NLG_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23323   { 21327 /* v_cmpx_nlg_f32 */, AMDGPU::V_CMPX_NLG_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23325   { 21395 /* v_cmpx_nlt_f16 */, AMDGPU::V_CMPX_NLT_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23327   { 21429 /* v_cmpx_nlt_f32 */, AMDGPU::V_CMPX_NLT_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23329   { 21497 /* v_cmpx_o_f16 */, AMDGPU::V_CMPX_O_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23331   { 21527 /* v_cmpx_o_f32 */, AMDGPU::V_CMPX_O_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23332   { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23334   { 21617 /* v_cmpx_t_i32 */, AMDGPU::V_CMPX_T_I32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23335   { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt16InputMods, MCK_SDWAWithInt16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23337   { 21707 /* v_cmpx_t_u32 */, AMDGPU::V_CMPX_T_U32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23339   { 21767 /* v_cmpx_tru_f16 */, AMDGPU::V_CMPX_TRU_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23341   { 21801 /* v_cmpx_tru_f32 */, AMDGPU::V_CMPX_TRU_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23343   { 21869 /* v_cmpx_u_f16 */, AMDGPU::V_CMPX_U_F16_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP16InputMods, MCK_SDWAWithFP16InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
23345   { 21899 /* v_cmpx_u_f32 */, AMDGPU::V_CMPX_U_F32_sdwa_gfx9, ConvertCustom_cvtSdwaVOPC, AMFBS_HasSDWA9_HasSDWA9, { MCK_BoolReg, MCK_SDWAWithFP32InputMods, MCK_SDWAWithFP32InputMods, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, },
72850   { 13222 /* v_add_co_ci_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX10Plus },
72889   { 13238 /* v_add_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX10Plus },
72891   { 13238 /* v_add_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX9Only },
72995   { 13291 /* v_add_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73030   { 13378 /* v_add_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX8Only },
73052   { 13388 /* v_addc_co_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX9Only },
73064   { 13402 /* v_addc_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73066   { 13402 /* v_addc_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX8Only },
73262   { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73264   { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73266   { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73271   { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73281   { 13677 /* v_cmp_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73283   { 13677 /* v_cmp_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73285   { 13677 /* v_cmp_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73287   { 13677 /* v_cmp_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73292   { 13677 /* v_cmp_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73302   { 13713 /* v_cmp_class_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73304   { 13713 /* v_cmp_class_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73306   { 13713 /* v_cmp_class_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73308   { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73311   { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73314   { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73318   { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73326   { 13779 /* v_cmp_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73329   { 13779 /* v_cmp_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73332   { 13779 /* v_cmp_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73335   { 13779 /* v_cmp_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73339   { 13779 /* v_cmp_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73347   { 13809 /* v_cmp_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73350   { 13809 /* v_cmp_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73353   { 13809 /* v_cmp_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73356   { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73357   { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73358   { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73362   { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73370   { 13869 /* v_cmp_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73371   { 13869 /* v_cmp_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73372   { 13869 /* v_cmp_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73373   { 13869 /* v_cmp_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73377   { 13869 /* v_cmp_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73385   { 13899 /* v_cmp_eq_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73386   { 13899 /* v_cmp_eq_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73387   { 13899 /* v_cmp_eq_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73388   { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73389   { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73390   { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73394   { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73402   { 13959 /* v_cmp_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73403   { 13959 /* v_cmp_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73404   { 13959 /* v_cmp_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73405   { 13959 /* v_cmp_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73409   { 13959 /* v_cmp_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73417   { 13989 /* v_cmp_eq_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73418   { 13989 /* v_cmp_eq_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73419   { 13989 /* v_cmp_eq_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73420   { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73423   { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73426   { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73430   { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73438   { 14047 /* v_cmp_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73441   { 14047 /* v_cmp_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73444   { 14047 /* v_cmp_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73447   { 14047 /* v_cmp_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73451   { 14047 /* v_cmp_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73459   { 14075 /* v_cmp_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73462   { 14075 /* v_cmp_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73465   { 14075 /* v_cmp_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73468   { 14103 /* v_cmp_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73469   { 14103 /* v_cmp_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73477   { 14131 /* v_cmp_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73478   { 14131 /* v_cmp_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73479   { 14131 /* v_cmp_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73480   { 14131 /* v_cmp_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73484   { 14131 /* v_cmp_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73492   { 14159 /* v_cmp_f_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73493   { 14159 /* v_cmp_f_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73494   { 14159 /* v_cmp_f_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73495   { 14187 /* v_cmp_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73496   { 14187 /* v_cmp_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73504   { 14215 /* v_cmp_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73505   { 14215 /* v_cmp_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73506   { 14215 /* v_cmp_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73507   { 14215 /* v_cmp_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73511   { 14215 /* v_cmp_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73519   { 14243 /* v_cmp_f_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73520   { 14243 /* v_cmp_f_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73521   { 14243 /* v_cmp_f_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73522   { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73525   { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73528   { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73532   { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73540   { 14301 /* v_cmp_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73543   { 14301 /* v_cmp_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73546   { 14301 /* v_cmp_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73549   { 14301 /* v_cmp_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73553   { 14301 /* v_cmp_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73561   { 14331 /* v_cmp_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73564   { 14331 /* v_cmp_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73567   { 14331 /* v_cmp_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73570   { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73571   { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73572   { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73576   { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73584   { 14391 /* v_cmp_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73585   { 14391 /* v_cmp_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73586   { 14391 /* v_cmp_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73587   { 14391 /* v_cmp_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73591   { 14391 /* v_cmp_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73599   { 14421 /* v_cmp_ge_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73600   { 14421 /* v_cmp_ge_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73601   { 14421 /* v_cmp_ge_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73602   { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73603   { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73604   { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73608   { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73616   { 14481 /* v_cmp_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73617   { 14481 /* v_cmp_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73618   { 14481 /* v_cmp_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73619   { 14481 /* v_cmp_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73623   { 14481 /* v_cmp_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73631   { 14511 /* v_cmp_ge_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73632   { 14511 /* v_cmp_ge_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73633   { 14511 /* v_cmp_ge_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73634   { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73637   { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73640   { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73644   { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73652   { 14571 /* v_cmp_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73655   { 14571 /* v_cmp_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73658   { 14571 /* v_cmp_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73661   { 14571 /* v_cmp_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73665   { 14571 /* v_cmp_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73673   { 14601 /* v_cmp_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73676   { 14601 /* v_cmp_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73679   { 14601 /* v_cmp_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73682   { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73683   { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73684   { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73688   { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73696   { 14661 /* v_cmp_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73697   { 14661 /* v_cmp_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73698   { 14661 /* v_cmp_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73699   { 14661 /* v_cmp_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73703   { 14661 /* v_cmp_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73711   { 14691 /* v_cmp_gt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73712   { 14691 /* v_cmp_gt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73713   { 14691 /* v_cmp_gt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73714   { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73715   { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73716   { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73720   { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73728   { 14751 /* v_cmp_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73729   { 14751 /* v_cmp_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73730   { 14751 /* v_cmp_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73731   { 14751 /* v_cmp_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73735   { 14751 /* v_cmp_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73743   { 14781 /* v_cmp_gt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73744   { 14781 /* v_cmp_gt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73745   { 14781 /* v_cmp_gt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73746   { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73749   { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73752   { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73756   { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73764   { 14841 /* v_cmp_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73767   { 14841 /* v_cmp_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73770   { 14841 /* v_cmp_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73773   { 14841 /* v_cmp_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73777   { 14841 /* v_cmp_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73785   { 14871 /* v_cmp_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73788   { 14871 /* v_cmp_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73791   { 14871 /* v_cmp_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73794   { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73795   { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73796   { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73800   { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73808   { 14931 /* v_cmp_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73809   { 14931 /* v_cmp_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73810   { 14931 /* v_cmp_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73811   { 14931 /* v_cmp_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73815   { 14931 /* v_cmp_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73823   { 14961 /* v_cmp_le_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73824   { 14961 /* v_cmp_le_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73825   { 14961 /* v_cmp_le_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73826   { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73827   { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73828   { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73832   { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73840   { 15021 /* v_cmp_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73841   { 15021 /* v_cmp_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73842   { 15021 /* v_cmp_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73843   { 15021 /* v_cmp_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73847   { 15021 /* v_cmp_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73855   { 15051 /* v_cmp_le_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73856   { 15051 /* v_cmp_le_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73857   { 15051 /* v_cmp_le_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73858   { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73861   { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73864   { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73868   { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73876   { 15111 /* v_cmp_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73879   { 15111 /* v_cmp_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73882   { 15111 /* v_cmp_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73885   { 15111 /* v_cmp_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73889   { 15111 /* v_cmp_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73897   { 15141 /* v_cmp_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73900   { 15141 /* v_cmp_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73903   { 15141 /* v_cmp_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73906   { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73909   { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73912   { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73916   { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73924   { 15201 /* v_cmp_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73927   { 15201 /* v_cmp_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73930   { 15201 /* v_cmp_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73933   { 15201 /* v_cmp_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73937   { 15201 /* v_cmp_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73945   { 15231 /* v_cmp_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73948   { 15231 /* v_cmp_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73951   { 15231 /* v_cmp_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73954   { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73955   { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73956   { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73960   { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73968   { 15291 /* v_cmp_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73969   { 15291 /* v_cmp_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73970   { 15291 /* v_cmp_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73971   { 15291 /* v_cmp_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73975   { 15291 /* v_cmp_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
73983   { 15321 /* v_cmp_lt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
73984   { 15321 /* v_cmp_lt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
73985   { 15321 /* v_cmp_lt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
73986   { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73987   { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73988   { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
73992   { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74000   { 15381 /* v_cmp_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74001   { 15381 /* v_cmp_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74002   { 15381 /* v_cmp_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74003   { 15381 /* v_cmp_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74007   { 15381 /* v_cmp_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74015   { 15411 /* v_cmp_lt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74016   { 15411 /* v_cmp_lt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74017   { 15411 /* v_cmp_lt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74018   { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74019   { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74020   { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74024   { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74032   { 15471 /* v_cmp_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74033   { 15471 /* v_cmp_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74034   { 15471 /* v_cmp_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74035   { 15471 /* v_cmp_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74039   { 15471 /* v_cmp_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74047   { 15501 /* v_cmp_ne_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74048   { 15501 /* v_cmp_ne_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74049   { 15501 /* v_cmp_ne_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74050   { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74051   { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74052   { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74056   { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74064   { 15561 /* v_cmp_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74065   { 15561 /* v_cmp_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74066   { 15561 /* v_cmp_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74067   { 15561 /* v_cmp_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74071   { 15561 /* v_cmp_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74079   { 15591 /* v_cmp_ne_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74080   { 15591 /* v_cmp_ne_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74081   { 15591 /* v_cmp_ne_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74082   { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74085   { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74088   { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74092   { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74100   { 15653 /* v_cmp_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74103   { 15653 /* v_cmp_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74106   { 15653 /* v_cmp_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74109   { 15653 /* v_cmp_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74113   { 15653 /* v_cmp_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74121   { 15685 /* v_cmp_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74124   { 15685 /* v_cmp_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74127   { 15685 /* v_cmp_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74130   { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74133   { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74136   { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74140   { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74148   { 15749 /* v_cmp_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74151   { 15749 /* v_cmp_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74154   { 15749 /* v_cmp_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74157   { 15749 /* v_cmp_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74161   { 15749 /* v_cmp_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74169   { 15781 /* v_cmp_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74172   { 15781 /* v_cmp_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74175   { 15781 /* v_cmp_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74178   { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74181   { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74184   { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74188   { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74196   { 15845 /* v_cmp_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74199   { 15845 /* v_cmp_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74202   { 15845 /* v_cmp_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74205   { 15845 /* v_cmp_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74209   { 15845 /* v_cmp_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74217   { 15877 /* v_cmp_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74220   { 15877 /* v_cmp_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74223   { 15877 /* v_cmp_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74226   { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74229   { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74232   { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74236   { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74244   { 15941 /* v_cmp_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74247   { 15941 /* v_cmp_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74250   { 15941 /* v_cmp_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74253   { 15941 /* v_cmp_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74257   { 15941 /* v_cmp_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74265   { 15973 /* v_cmp_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74268   { 15973 /* v_cmp_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74271   { 15973 /* v_cmp_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74274   { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74277   { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74280   { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74284   { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74292   { 16037 /* v_cmp_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74295   { 16037 /* v_cmp_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74298   { 16037 /* v_cmp_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74301   { 16037 /* v_cmp_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74305   { 16037 /* v_cmp_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74313   { 16069 /* v_cmp_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74316   { 16069 /* v_cmp_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74319   { 16069 /* v_cmp_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74322   { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74325   { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74328   { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74332   { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74340   { 16133 /* v_cmp_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74343   { 16133 /* v_cmp_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74346   { 16133 /* v_cmp_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74349   { 16133 /* v_cmp_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74353   { 16133 /* v_cmp_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74361   { 16165 /* v_cmp_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74364   { 16165 /* v_cmp_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74367   { 16165 /* v_cmp_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74370   { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74373   { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74376   { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74380   { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74388   { 16225 /* v_cmp_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74391   { 16225 /* v_cmp_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74394   { 16225 /* v_cmp_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74397   { 16225 /* v_cmp_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74401   { 16225 /* v_cmp_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74409   { 16253 /* v_cmp_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74412   { 16253 /* v_cmp_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74415   { 16253 /* v_cmp_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74418   { 16281 /* v_cmp_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74419   { 16281 /* v_cmp_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74427   { 16309 /* v_cmp_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74428   { 16309 /* v_cmp_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74429   { 16309 /* v_cmp_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74430   { 16309 /* v_cmp_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74434   { 16309 /* v_cmp_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74442   { 16337 /* v_cmp_t_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74443   { 16337 /* v_cmp_t_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74444   { 16337 /* v_cmp_t_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74445   { 16365 /* v_cmp_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74446   { 16365 /* v_cmp_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74454   { 16393 /* v_cmp_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74455   { 16393 /* v_cmp_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74456   { 16393 /* v_cmp_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74457   { 16393 /* v_cmp_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74461   { 16393 /* v_cmp_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74469   { 16421 /* v_cmp_t_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74470   { 16421 /* v_cmp_t_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74471   { 16421 /* v_cmp_t_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74472   { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74475   { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74478   { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74482   { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74490   { 16481 /* v_cmp_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74493   { 16481 /* v_cmp_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74496   { 16481 /* v_cmp_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74499   { 16481 /* v_cmp_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74503   { 16481 /* v_cmp_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74511   { 16513 /* v_cmp_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74514   { 16513 /* v_cmp_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74517   { 16513 /* v_cmp_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74520   { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74523   { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74526   { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74530   { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74538   { 16573 /* v_cmp_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74541   { 16573 /* v_cmp_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74544   { 16573 /* v_cmp_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74547   { 16573 /* v_cmp_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA10_isGFX10Plus },
74551   { 16573 /* v_cmp_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74559   { 16601 /* v_cmp_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX10Plus },
74562   { 16601 /* v_cmp_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74565   { 16601 /* v_cmp_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74568   { 16629 /* v_cmps_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74571   { 16661 /* v_cmps_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74574   { 16693 /* v_cmps_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74577   { 16723 /* v_cmps_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74580   { 16753 /* v_cmps_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74583   { 16785 /* v_cmps_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74586   { 16817 /* v_cmps_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74589   { 16849 /* v_cmps_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74592   { 16881 /* v_cmps_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74595   { 16913 /* v_cmps_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74598   { 16945 /* v_cmps_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74601   { 16977 /* v_cmps_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74604   { 17009 /* v_cmps_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74607   { 17041 /* v_cmps_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74610   { 17073 /* v_cmps_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74613   { 17107 /* v_cmps_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74616   { 17141 /* v_cmps_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74619   { 17175 /* v_cmps_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74622   { 17209 /* v_cmps_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74625   { 17243 /* v_cmps_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74628   { 17277 /* v_cmps_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74631   { 17311 /* v_cmps_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74634   { 17345 /* v_cmps_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74637   { 17379 /* v_cmps_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74640   { 17413 /* v_cmps_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74643   { 17447 /* v_cmps_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74646   { 17481 /* v_cmps_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74649   { 17511 /* v_cmps_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74652   { 17541 /* v_cmps_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74655   { 17575 /* v_cmps_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74658   { 17609 /* v_cmps_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74661   { 17639 /* v_cmps_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74664   { 17669 /* v_cmpsx_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74667   { 17703 /* v_cmpsx_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74670   { 17737 /* v_cmpsx_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74673   { 17769 /* v_cmpsx_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74676   { 17801 /* v_cmpsx_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74679   { 17835 /* v_cmpsx_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74682   { 17869 /* v_cmpsx_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74685   { 17903 /* v_cmpsx_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74688   { 17937 /* v_cmpsx_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74691   { 17971 /* v_cmpsx_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74694   { 18005 /* v_cmpsx_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74697   { 18039 /* v_cmpsx_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74700   { 18073 /* v_cmpsx_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74703   { 18107 /* v_cmpsx_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74706   { 18141 /* v_cmpsx_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74709   { 18177 /* v_cmpsx_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74712   { 18213 /* v_cmpsx_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74715   { 18249 /* v_cmpsx_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74718   { 18285 /* v_cmpsx_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74721   { 18321 /* v_cmpsx_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74724   { 18357 /* v_cmpsx_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74727   { 18393 /* v_cmpsx_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74730   { 18429 /* v_cmpsx_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74733   { 18465 /* v_cmpsx_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74736   { 18501 /* v_cmpsx_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74739   { 18537 /* v_cmpsx_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74742   { 18573 /* v_cmpsx_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74745   { 18605 /* v_cmpsx_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74748   { 18637 /* v_cmpsx_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74751   { 18673 /* v_cmpsx_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74754   { 18709 /* v_cmpsx_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74757   { 18741 /* v_cmpsx_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7_isGFX6GFX7 },
74761   { 18773 /* v_cmpx_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74767   { 18773 /* v_cmpx_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74778   { 18811 /* v_cmpx_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74780   { 18811 /* v_cmpx_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74786   { 18811 /* v_cmpx_class_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74797   { 18849 /* v_cmpx_class_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74799   { 18849 /* v_cmpx_class_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74803   { 18887 /* v_cmpx_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74809   { 18887 /* v_cmpx_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74819   { 18919 /* v_cmpx_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74822   { 18919 /* v_cmpx_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74828   { 18919 /* v_cmpx_eq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74838   { 18951 /* v_cmpx_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74841   { 18951 /* v_cmpx_eq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74844   { 18983 /* v_cmpx_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74848   { 18983 /* v_cmpx_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74856   { 19015 /* v_cmpx_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74857   { 19015 /* v_cmpx_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74861   { 19015 /* v_cmpx_eq_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74869   { 19047 /* v_cmpx_eq_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74870   { 19047 /* v_cmpx_eq_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74871   { 19079 /* v_cmpx_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74875   { 19079 /* v_cmpx_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74883   { 19111 /* v_cmpx_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74884   { 19111 /* v_cmpx_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74888   { 19111 /* v_cmpx_eq_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74896   { 19143 /* v_cmpx_eq_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74897   { 19143 /* v_cmpx_eq_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74900   { 19175 /* v_cmpx_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74906   { 19175 /* v_cmpx_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74916   { 19205 /* v_cmpx_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74919   { 19205 /* v_cmpx_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74925   { 19205 /* v_cmpx_f_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74935   { 19235 /* v_cmpx_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74938   { 19235 /* v_cmpx_f_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74941   { 19265 /* v_cmpx_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74942   { 19265 /* v_cmpx_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74950   { 19295 /* v_cmpx_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74951   { 19295 /* v_cmpx_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74955   { 19295 /* v_cmpx_f_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74963   { 19325 /* v_cmpx_f_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74964   { 19325 /* v_cmpx_f_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74965   { 19355 /* v_cmpx_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74966   { 19355 /* v_cmpx_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74974   { 19385 /* v_cmpx_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74975   { 19385 /* v_cmpx_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74979   { 19385 /* v_cmpx_f_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
74987   { 19415 /* v_cmpx_f_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
74988   { 19415 /* v_cmpx_f_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
74991   { 19445 /* v_cmpx_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74997   { 19445 /* v_cmpx_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75007   { 19477 /* v_cmpx_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75010   { 19477 /* v_cmpx_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75016   { 19477 /* v_cmpx_ge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75026   { 19509 /* v_cmpx_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75029   { 19509 /* v_cmpx_ge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75032   { 19541 /* v_cmpx_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75036   { 19541 /* v_cmpx_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75044   { 19573 /* v_cmpx_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75045   { 19573 /* v_cmpx_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75049   { 19573 /* v_cmpx_ge_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75057   { 19605 /* v_cmpx_ge_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75058   { 19605 /* v_cmpx_ge_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75059   { 19637 /* v_cmpx_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75063   { 19637 /* v_cmpx_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75071   { 19669 /* v_cmpx_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75072   { 19669 /* v_cmpx_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75076   { 19669 /* v_cmpx_ge_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75084   { 19701 /* v_cmpx_ge_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75085   { 19701 /* v_cmpx_ge_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75088   { 19733 /* v_cmpx_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75094   { 19733 /* v_cmpx_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75104   { 19765 /* v_cmpx_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75107   { 19765 /* v_cmpx_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75113   { 19765 /* v_cmpx_gt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75123   { 19797 /* v_cmpx_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75126   { 19797 /* v_cmpx_gt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75129   { 19829 /* v_cmpx_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75133   { 19829 /* v_cmpx_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75141   { 19861 /* v_cmpx_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75142   { 19861 /* v_cmpx_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75146   { 19861 /* v_cmpx_gt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75154   { 19893 /* v_cmpx_gt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75155   { 19893 /* v_cmpx_gt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75156   { 19925 /* v_cmpx_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75160   { 19925 /* v_cmpx_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75168   { 19957 /* v_cmpx_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75169   { 19957 /* v_cmpx_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75173   { 19957 /* v_cmpx_gt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75181   { 19989 /* v_cmpx_gt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75182   { 19989 /* v_cmpx_gt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75185   { 20021 /* v_cmpx_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75191   { 20021 /* v_cmpx_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75201   { 20053 /* v_cmpx_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75204   { 20053 /* v_cmpx_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75210   { 20053 /* v_cmpx_le_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75220   { 20085 /* v_cmpx_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75223   { 20085 /* v_cmpx_le_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75226   { 20117 /* v_cmpx_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75230   { 20117 /* v_cmpx_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75238   { 20149 /* v_cmpx_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75239   { 20149 /* v_cmpx_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75243   { 20149 /* v_cmpx_le_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75251   { 20181 /* v_cmpx_le_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75252   { 20181 /* v_cmpx_le_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75253   { 20213 /* v_cmpx_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75257   { 20213 /* v_cmpx_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75265   { 20245 /* v_cmpx_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75266   { 20245 /* v_cmpx_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75270   { 20245 /* v_cmpx_le_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75278   { 20277 /* v_cmpx_le_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75279   { 20277 /* v_cmpx_le_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75282   { 20309 /* v_cmpx_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75288   { 20309 /* v_cmpx_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75298   { 20341 /* v_cmpx_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75301   { 20341 /* v_cmpx_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75307   { 20341 /* v_cmpx_lg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75317   { 20373 /* v_cmpx_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75320   { 20373 /* v_cmpx_lg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75325   { 20405 /* v_cmpx_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75331   { 20405 /* v_cmpx_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75341   { 20437 /* v_cmpx_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75344   { 20437 /* v_cmpx_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75350   { 20437 /* v_cmpx_lt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75360   { 20469 /* v_cmpx_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75363   { 20469 /* v_cmpx_lt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75366   { 20501 /* v_cmpx_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75370   { 20501 /* v_cmpx_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75378   { 20533 /* v_cmpx_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75379   { 20533 /* v_cmpx_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75383   { 20533 /* v_cmpx_lt_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75391   { 20565 /* v_cmpx_lt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75392   { 20565 /* v_cmpx_lt_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75393   { 20597 /* v_cmpx_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75397   { 20597 /* v_cmpx_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75405   { 20629 /* v_cmpx_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75406   { 20629 /* v_cmpx_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75410   { 20629 /* v_cmpx_lt_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75418   { 20661 /* v_cmpx_lt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75419   { 20661 /* v_cmpx_lt_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75420   { 20693 /* v_cmpx_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75424   { 20693 /* v_cmpx_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75432   { 20725 /* v_cmpx_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75433   { 20725 /* v_cmpx_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75437   { 20725 /* v_cmpx_ne_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75445   { 20757 /* v_cmpx_ne_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75446   { 20757 /* v_cmpx_ne_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75447   { 20789 /* v_cmpx_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75451   { 20789 /* v_cmpx_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75459   { 20821 /* v_cmpx_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75460   { 20821 /* v_cmpx_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75464   { 20821 /* v_cmpx_ne_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75472   { 20853 /* v_cmpx_ne_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75473   { 20853 /* v_cmpx_ne_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75476   { 20885 /* v_cmpx_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75482   { 20885 /* v_cmpx_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75492   { 20919 /* v_cmpx_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75495   { 20919 /* v_cmpx_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75501   { 20919 /* v_cmpx_neq_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75511   { 20953 /* v_cmpx_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75514   { 20953 /* v_cmpx_neq_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75519   { 20987 /* v_cmpx_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75525   { 20987 /* v_cmpx_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75535   { 21021 /* v_cmpx_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75538   { 21021 /* v_cmpx_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75544   { 21021 /* v_cmpx_nge_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75554   { 21055 /* v_cmpx_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75557   { 21055 /* v_cmpx_nge_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75562   { 21089 /* v_cmpx_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75568   { 21089 /* v_cmpx_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75578   { 21123 /* v_cmpx_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75581   { 21123 /* v_cmpx_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75587   { 21123 /* v_cmpx_ngt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75597   { 21157 /* v_cmpx_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75600   { 21157 /* v_cmpx_ngt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75605   { 21191 /* v_cmpx_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75611   { 21191 /* v_cmpx_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75621   { 21225 /* v_cmpx_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75624   { 21225 /* v_cmpx_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75630   { 21225 /* v_cmpx_nle_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75640   { 21259 /* v_cmpx_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75643   { 21259 /* v_cmpx_nle_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75648   { 21293 /* v_cmpx_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75654   { 21293 /* v_cmpx_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75664   { 21327 /* v_cmpx_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75667   { 21327 /* v_cmpx_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75673   { 21327 /* v_cmpx_nlg_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75683   { 21361 /* v_cmpx_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75686   { 21361 /* v_cmpx_nlg_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75691   { 21395 /* v_cmpx_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75697   { 21395 /* v_cmpx_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75707   { 21429 /* v_cmpx_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75710   { 21429 /* v_cmpx_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75716   { 21429 /* v_cmpx_nlt_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75726   { 21463 /* v_cmpx_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75729   { 21463 /* v_cmpx_nlt_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75734   { 21497 /* v_cmpx_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75740   { 21497 /* v_cmpx_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75750   { 21527 /* v_cmpx_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75753   { 21527 /* v_cmpx_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75759   { 21527 /* v_cmpx_o_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75769   { 21557 /* v_cmpx_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75772   { 21557 /* v_cmpx_o_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75775   { 21587 /* v_cmpx_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75776   { 21587 /* v_cmpx_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75784   { 21617 /* v_cmpx_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75785   { 21617 /* v_cmpx_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75789   { 21617 /* v_cmpx_t_i32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75797   { 21647 /* v_cmpx_t_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75798   { 21647 /* v_cmpx_t_i64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75799   { 21677 /* v_cmpx_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75800   { 21677 /* v_cmpx_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75808   { 21707 /* v_cmpx_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75809   { 21707 /* v_cmpx_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75813   { 21707 /* v_cmpx_t_u32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75821   { 21737 /* v_cmpx_t_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75822   { 21737 /* v_cmpx_t_u64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75825   { 21767 /* v_cmpx_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75831   { 21767 /* v_cmpx_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75841   { 21801 /* v_cmpx_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75844   { 21801 /* v_cmpx_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75850   { 21801 /* v_cmpx_tru_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75860   { 21835 /* v_cmpx_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75863   { 21835 /* v_cmpx_tru_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75868   { 21869 /* v_cmpx_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75874   { 21869 /* v_cmpx_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75884   { 21899 /* v_cmpx_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75887   { 21899 /* v_cmpx_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75893   { 21899 /* v_cmpx_u_f32 */, 1 /* 0 */, MCK_BoolReg, AMFBS_HasSDWA9_HasSDWA9 },
75903   { 21929 /* v_cmpx_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75906   { 21929 /* v_cmpx_u_f64 */, 1 /* 0 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
75909   { 21959 /* v_cndmask_b32 */, 8 /* 3 */, MCK_BoolReg, AMFBS_isGFX10Plus },
75911   { 21959 /* v_cndmask_b32 */, 8 /* 3 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
75913   { 21959 /* v_cndmask_b32 */, 8 /* 3 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
76863   { 22704 /* v_div_scale_f32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX10Plus },
76864   { 22704 /* v_div_scale_f32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
76865   { 22704 /* v_div_scale_f32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
76866   { 22720 /* v_div_scale_f64 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX10Plus },
76867   { 22720 /* v_div_scale_f64 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
76868   { 22720 /* v_div_scale_f64 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX8GFX9 },
77995   { 23790 /* v_mad_i64_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX10Plus },
77997   { 23790 /* v_mad_i64_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX7Only },
77999   { 23790 /* v_mad_i64_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX8GFX9 },
78039   { 23956 /* v_mad_u64_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX10Plus },
78041   { 23956 /* v_mad_u64_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX7Only },
78043   { 23956 /* v_mad_u64_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX7Plus_isGFX8GFX9 },
79652   { 25959 /* v_sub_co_ci_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX10Plus },
79691   { 25975 /* v_sub_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX10Plus },
79693   { 25975 /* v_sub_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX9Only },
79788   { 26018 /* v_sub_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
79823   { 26090 /* v_sub_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX8Only },
79845   { 26100 /* v_subb_co_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX9Only },
79857   { 26114 /* v_subb_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
79859   { 26114 /* v_subb_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX8Only },
79871   { 26125 /* v_subbrev_co_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX9Only },
79883   { 26142 /* v_subbrev_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
79885   { 26142 /* v_subbrev_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX8Only },
79899   { 26156 /* v_subrev_co_ci_u32 */, 18 /* 1, 4 */, MCK_BoolReg, AMFBS_isGFX10Plus },
79938   { 26175 /* v_subrev_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX10Plus },
79940   { 26175 /* v_subrev_co_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX9Only },
80033   { 26217 /* v_subrev_i32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX6GFX7 },
80066   { 26259 /* v_subrev_u32 */, 2 /* 1 */, MCK_BoolReg, AMFBS_isGFX8Only },
80251   case MCK_BoolReg: