reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
5910 case MCK_AISrc_512B32: { 10129 case MCK_AISrc_512B32: return "MCK_AISrc_512B32"; 22486 { 24320 /* v_mfma_f32_16x16x2bf16 */, AMDGPU::V_MFMA_F32_16X16X2BF16_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_32, MCK_AV_32, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, }, 22487 { 24343 /* v_mfma_f32_16x16x4f16 */, AMDGPU::V_MFMA_F32_16X16X4F16_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_64, MCK_AV_64, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, }, 22493 { 24477 /* v_mfma_f32_32x32x4bf16 */, AMDGPU::V_MFMA_F32_32X32X4BF16_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_32, MCK_AV_32, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, }, 22495 { 24522 /* v_mfma_f32_32x32x8f16 */, AMDGPU::V_MFMA_F32_32X32X8F16_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_64, MCK_AV_64, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, }, 22500 { 24627 /* v_mfma_i32_16x16x4i8 */, AMDGPU::V_MFMA_I32_16X16X4I8_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_32, MCK_AV_32, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, }, 22502 { 24669 /* v_mfma_i32_32x32x8i8 */, AMDGPU::V_MFMA_I32_32X32X8I8_vi, Convert__Reg1_0__Reg1_1__Reg1_2__AISrc_512B321_3__ImmCBSZ1_4__ImmABID1_5__ImmBLGP1_6, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_AReg_512, MCK_AV_32, MCK_AV_32, MCK_AISrc_512B32, MCK_ImmCBSZ, MCK_ImmABID, MCK_ImmBLGP }, },