reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc
18919   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
18920   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
18921   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
18922   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VGPR_32 }, },
18923   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VGPR_32 }, },
18924   { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VGPR_32 }, },
18951   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
18952   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
18953   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
18954   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
18955   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
18956   { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19047   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19048   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19049   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19050   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19051   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19052   { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19135   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19136   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19137   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19138   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19139   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19140   { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19231   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19232   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19233   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19234   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19235   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19236   { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19327   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19328   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19329   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19330   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19331   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19332   { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19423   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19424   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19425   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19426   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19427   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19428   { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19455   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19456   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19457   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19458   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19459   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19460   { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19615   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19616   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19617   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19618   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19619   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19620   { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19647   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19648   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19649   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19650   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19651   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19652   { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19679   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19680   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19681   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19682   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19683   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19684   { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19711   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19712   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19713   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19714   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19715   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19716   { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19743   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19744   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19745   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19746   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19747   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19748   { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19775   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19776   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19777   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19778   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19779   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19780   { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19807   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19808   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19809   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19810   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19811   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19812   { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19895   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19896   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19897   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19898   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19899   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19900   { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19927   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19928   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19929   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19930   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19931   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19932   { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19941   { 16661 /* v_cmps_eq_f64 */, AMDGPU::V_CMPS_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19942   { 16661 /* v_cmps_eq_f64 */, AMDGPU::V_CMPS_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19949   { 16723 /* v_cmps_f_f64 */, AMDGPU::V_CMPS_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19950   { 16723 /* v_cmps_f_f64 */, AMDGPU::V_CMPS_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19957   { 16785 /* v_cmps_ge_f64 */, AMDGPU::V_CMPS_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19958   { 16785 /* v_cmps_ge_f64 */, AMDGPU::V_CMPS_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19965   { 16849 /* v_cmps_gt_f64 */, AMDGPU::V_CMPS_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19966   { 16849 /* v_cmps_gt_f64 */, AMDGPU::V_CMPS_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19973   { 16913 /* v_cmps_le_f64 */, AMDGPU::V_CMPS_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19974   { 16913 /* v_cmps_le_f64 */, AMDGPU::V_CMPS_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19981   { 16977 /* v_cmps_lg_f64 */, AMDGPU::V_CMPS_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19982   { 16977 /* v_cmps_lg_f64 */, AMDGPU::V_CMPS_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19989   { 17041 /* v_cmps_lt_f64 */, AMDGPU::V_CMPS_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19990   { 17041 /* v_cmps_lt_f64 */, AMDGPU::V_CMPS_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
19997   { 17107 /* v_cmps_neq_f64 */, AMDGPU::V_CMPS_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19998   { 17107 /* v_cmps_neq_f64 */, AMDGPU::V_CMPS_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20005   { 17175 /* v_cmps_nge_f64 */, AMDGPU::V_CMPS_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20006   { 17175 /* v_cmps_nge_f64 */, AMDGPU::V_CMPS_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20013   { 17243 /* v_cmps_ngt_f64 */, AMDGPU::V_CMPS_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20014   { 17243 /* v_cmps_ngt_f64 */, AMDGPU::V_CMPS_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20021   { 17311 /* v_cmps_nle_f64 */, AMDGPU::V_CMPS_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20022   { 17311 /* v_cmps_nle_f64 */, AMDGPU::V_CMPS_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20029   { 17379 /* v_cmps_nlg_f64 */, AMDGPU::V_CMPS_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20030   { 17379 /* v_cmps_nlg_f64 */, AMDGPU::V_CMPS_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20037   { 17447 /* v_cmps_nlt_f64 */, AMDGPU::V_CMPS_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20038   { 17447 /* v_cmps_nlt_f64 */, AMDGPU::V_CMPS_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20045   { 17511 /* v_cmps_o_f64 */, AMDGPU::V_CMPS_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20046   { 17511 /* v_cmps_o_f64 */, AMDGPU::V_CMPS_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20053   { 17575 /* v_cmps_tru_f64 */, AMDGPU::V_CMPS_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20054   { 17575 /* v_cmps_tru_f64 */, AMDGPU::V_CMPS_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20061   { 17639 /* v_cmps_u_f64 */, AMDGPU::V_CMPS_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20062   { 17639 /* v_cmps_u_f64 */, AMDGPU::V_CMPS_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20069   { 17703 /* v_cmpsx_eq_f64 */, AMDGPU::V_CMPSX_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20070   { 17703 /* v_cmpsx_eq_f64 */, AMDGPU::V_CMPSX_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20077   { 17769 /* v_cmpsx_f_f64 */, AMDGPU::V_CMPSX_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20078   { 17769 /* v_cmpsx_f_f64 */, AMDGPU::V_CMPSX_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20085   { 17835 /* v_cmpsx_ge_f64 */, AMDGPU::V_CMPSX_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20086   { 17835 /* v_cmpsx_ge_f64 */, AMDGPU::V_CMPSX_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20093   { 17903 /* v_cmpsx_gt_f64 */, AMDGPU::V_CMPSX_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20094   { 17903 /* v_cmpsx_gt_f64 */, AMDGPU::V_CMPSX_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20101   { 17971 /* v_cmpsx_le_f64 */, AMDGPU::V_CMPSX_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20102   { 17971 /* v_cmpsx_le_f64 */, AMDGPU::V_CMPSX_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20109   { 18039 /* v_cmpsx_lg_f64 */, AMDGPU::V_CMPSX_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20110   { 18039 /* v_cmpsx_lg_f64 */, AMDGPU::V_CMPSX_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20117   { 18107 /* v_cmpsx_lt_f64 */, AMDGPU::V_CMPSX_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20118   { 18107 /* v_cmpsx_lt_f64 */, AMDGPU::V_CMPSX_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20125   { 18177 /* v_cmpsx_neq_f64 */, AMDGPU::V_CMPSX_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20126   { 18177 /* v_cmpsx_neq_f64 */, AMDGPU::V_CMPSX_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20133   { 18249 /* v_cmpsx_nge_f64 */, AMDGPU::V_CMPSX_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20134   { 18249 /* v_cmpsx_nge_f64 */, AMDGPU::V_CMPSX_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20141   { 18321 /* v_cmpsx_ngt_f64 */, AMDGPU::V_CMPSX_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20142   { 18321 /* v_cmpsx_ngt_f64 */, AMDGPU::V_CMPSX_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20149   { 18393 /* v_cmpsx_nle_f64 */, AMDGPU::V_CMPSX_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20150   { 18393 /* v_cmpsx_nle_f64 */, AMDGPU::V_CMPSX_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20157   { 18465 /* v_cmpsx_nlg_f64 */, AMDGPU::V_CMPSX_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20158   { 18465 /* v_cmpsx_nlg_f64 */, AMDGPU::V_CMPSX_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20165   { 18537 /* v_cmpsx_nlt_f64 */, AMDGPU::V_CMPSX_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20166   { 18537 /* v_cmpsx_nlt_f64 */, AMDGPU::V_CMPSX_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20173   { 18605 /* v_cmpsx_o_f64 */, AMDGPU::V_CMPSX_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20174   { 18605 /* v_cmpsx_o_f64 */, AMDGPU::V_CMPSX_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20181   { 18673 /* v_cmpsx_tru_f64 */, AMDGPU::V_CMPSX_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20182   { 18673 /* v_cmpsx_tru_f64 */, AMDGPU::V_CMPSX_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20189   { 18741 /* v_cmpsx_u_f64 */, AMDGPU::V_CMPSX_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20190   { 18741 /* v_cmpsx_u_f64 */, AMDGPU::V_CMPSX_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20211   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
20212   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
20213   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VGPR_32 }, },
20214   { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VGPR_32 }, },
20237   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20238   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20239   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20240   { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20315   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20316   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20317   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20318   { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20389   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20390   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20391   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20392   { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20467   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20468   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20469   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20470   { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20545   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20546   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20547   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20548   { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20623   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20624   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20625   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20626   { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20649   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20650   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20651   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20652   { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20779   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20780   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20781   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20782   { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20805   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20806   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20807   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20808   { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20831   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20832   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20833   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20834   { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20857   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20858   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20859   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20860   { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20883   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20884   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20885   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20886   { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20909   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20910   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20911   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20912   { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20935   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20936   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20937   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
20938   { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
21009   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
21010   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
21011   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
21012   { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
21035   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
21036   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
21037   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e32_gfx6_gfx7, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },
21038   { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcF64, MCK_VReg_64 }, },