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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18983 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
18984 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
18985 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
18986 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
18987 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
18988 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19015 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19016 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19017 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19018 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19019 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19020 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19075 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19076 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19077 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19078 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19079 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19080 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19103 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19104 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19105 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19106 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19107 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19108 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19167 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19168 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19169 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19170 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19171 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19172 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19199 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19200 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19201 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19202 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19203 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19204 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19263 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19264 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19265 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19266 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19267 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19268 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19295 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19296 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19297 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19298 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19299 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19300 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19359 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19360 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19361 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19362 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19363 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19364 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19391 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19392 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19393 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19394 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19395 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19396 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19487 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19488 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19489 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19490 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19491 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19492 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19519 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19520 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19521 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19522 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19523 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19524 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19551 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19552 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19553 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19554 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19555 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19556 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19583 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19584 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19585 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19586 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19587 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19588 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19835 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19836 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19837 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19838 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19839 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19840 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19863 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19864 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19865 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19866 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19867 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
19868 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20263 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20264 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20265 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20266 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20289 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20290 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20291 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20292 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20339 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20340 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20341 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20342 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20363 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20364 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20365 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20366 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20415 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20416 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20417 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20418 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20441 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20442 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20443 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20444 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20493 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20494 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20495 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20496 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20519 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20520 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20521 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20522 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20571 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20572 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20573 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20574 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20597 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20598 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20599 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20600 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20675 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20676 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20677 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20678 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20701 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20702 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20703 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20704 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20727 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20728 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20729 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20730 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20753 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20754 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20755 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20756 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20959 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20960 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20961 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20962 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20983 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20984 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20985 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e32_gfx6_gfx7, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX6GFX7_isGFX6GFX7_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },
20986 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave32, { MCK_VCC_LO, MCK_VSrcB64, MCK_VReg_64 }, },