reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc
18864   { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
18876   { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21217   { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21222   { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21245   { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21250   { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21261   { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21266   { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21303   { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21385   { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21411   { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },