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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc17566 { 7856 /* s_and_saveexec_b64 */, AMDGPU::S_AND_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17567 { 7856 /* s_and_saveexec_b64 */, AMDGPU::S_AND_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
17568 { 7856 /* s_and_saveexec_b64 */, AMDGPU::S_AND_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
17570 { 7896 /* s_andn1_saveexec_b64 */, AMDGPU::S_ANDN1_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17571 { 7896 /* s_andn1_saveexec_b64 */, AMDGPU::S_ANDN1_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
17573 { 7936 /* s_andn1_wrexec_b64 */, AMDGPU::S_ANDN1_WREXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17574 { 7936 /* s_andn1_wrexec_b64 */, AMDGPU::S_ANDN1_WREXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
17582 { 8000 /* s_andn2_saveexec_b64 */, AMDGPU::S_ANDN2_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17583 { 8000 /* s_andn2_saveexec_b64 */, AMDGPU::S_ANDN2_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
17584 { 8000 /* s_andn2_saveexec_b64 */, AMDGPU::S_ANDN2_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
17586 { 8040 /* s_andn2_wrexec_b64 */, AMDGPU::S_ANDN2_WREXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17587 { 8040 /* s_andn2_wrexec_b64 */, AMDGPU::S_ANDN2_WREXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
17814 { 8531 /* s_bcnt0_i32_b64 */, AMDGPU::S_BCNT0_I32_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
17815 { 8531 /* s_bcnt0_i32_b64 */, AMDGPU::S_BCNT0_I32_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
17816 { 8531 /* s_bcnt0_i32_b64 */, AMDGPU::S_BCNT0_I32_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
17820 { 8563 /* s_bcnt1_i32_b64 */, AMDGPU::S_BCNT1_I32_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
17821 { 8563 /* s_bcnt1_i32_b64 */, AMDGPU::S_BCNT1_I32_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
17822 { 8563 /* s_bcnt1_i32_b64 */, AMDGPU::S_BCNT1_I32_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
17864 { 8794 /* s_brev_b64 */, AMDGPU::S_BREV_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
17865 { 8794 /* s_brev_b64 */, AMDGPU::S_BREV_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
17866 { 8794 /* s_brev_b64 */, AMDGPU::S_BREV_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18154 { 9820 /* s_cmov_b64 */, AMDGPU::S_CMOV_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18155 { 9820 /* s_cmov_b64 */, AMDGPU::S_CMOV_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18156 { 9820 /* s_cmov_b64 */, AMDGPU::S_CMOV_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18241 { 10419 /* s_ff0_i32_b64 */, AMDGPU::S_FF0_I32_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
18242 { 10419 /* s_ff0_i32_b64 */, AMDGPU::S_FF0_I32_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
18243 { 10419 /* s_ff0_i32_b64 */, AMDGPU::S_FF0_I32_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
18247 { 10447 /* s_ff1_i32_b64 */, AMDGPU::S_FF1_I32_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
18248 { 10447 /* s_ff1_i32_b64 */, AMDGPU::S_FF1_I32_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
18249 { 10447 /* s_ff1_i32_b64 */, AMDGPU::S_FF1_I32_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
18256 { 10489 /* s_flbit_i32_b64 */, AMDGPU::S_FLBIT_I32_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
18257 { 10489 /* s_flbit_i32_b64 */, AMDGPU::S_FLBIT_I32_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
18258 { 10489 /* s_flbit_i32_b64 */, AMDGPU::S_FLBIT_I32_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
18259 { 10505 /* s_flbit_i32_i64 */, AMDGPU::S_FLBIT_I32_I64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_32, MCK_SSrcB64 }, },
18260 { 10505 /* s_flbit_i32_i64 */, AMDGPU::S_FLBIT_I32_I64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_32, MCK_SSrcB64 }, },
18261 { 10505 /* s_flbit_i32_i64 */, AMDGPU::S_FLBIT_I32_I64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_32, MCK_SSrcB64 }, },
18348 { 10882 /* s_mov_b64 */, AMDGPU::S_MOV_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18349 { 10882 /* s_mov_b64 */, AMDGPU::S_MOV_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18350 { 10882 /* s_mov_b64 */, AMDGPU::S_MOV_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18362 { 10947 /* s_movreld_b64 */, AMDGPU::S_MOVRELD_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18363 { 10947 /* s_movreld_b64 */, AMDGPU::S_MOVRELD_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18364 { 10947 /* s_movreld_b64 */, AMDGPU::S_MOVRELD_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18368 { 10975 /* s_movrels_b64 */, AMDGPU::S_MOVRELS_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18369 { 10975 /* s_movrels_b64 */, AMDGPU::S_MOVRELS_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18370 { 10975 /* s_movrels_b64 */, AMDGPU::S_MOVRELS_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18389 { 11095 /* s_nand_saveexec_b64 */, AMDGPU::S_NAND_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18390 { 11095 /* s_nand_saveexec_b64 */, AMDGPU::S_NAND_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18391 { 11095 /* s_nand_saveexec_b64 */, AMDGPU::S_NAND_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18400 { 11160 /* s_nor_saveexec_b64 */, AMDGPU::S_NOR_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18401 { 11160 /* s_nor_saveexec_b64 */, AMDGPU::S_NOR_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18402 { 11160 /* s_nor_saveexec_b64 */, AMDGPU::S_NOR_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18406 { 11189 /* s_not_b64 */, AMDGPU::S_NOT_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18407 { 11189 /* s_not_b64 */, AMDGPU::S_NOT_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18408 { 11189 /* s_not_b64 */, AMDGPU::S_NOT_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18416 { 11235 /* s_or_saveexec_b64 */, AMDGPU::S_OR_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18417 { 11235 /* s_or_saveexec_b64 */, AMDGPU::S_OR_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18418 { 11235 /* s_or_saveexec_b64 */, AMDGPU::S_OR_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18420 { 11273 /* s_orn1_saveexec_b64 */, AMDGPU::S_ORN1_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18421 { 11273 /* s_orn1_saveexec_b64 */, AMDGPU::S_ORN1_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX9Plus_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18429 { 11335 /* s_orn2_saveexec_b64 */, AMDGPU::S_ORN2_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18430 { 11335 /* s_orn2_saveexec_b64 */, AMDGPU::S_ORN2_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18431 { 11335 /* s_orn2_saveexec_b64 */, AMDGPU::S_ORN2_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18441 { 11424 /* s_quadmask_b64 */, AMDGPU::S_QUADMASK_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18442 { 11424 /* s_quadmask_b64 */, AMDGPU::S_QUADMASK_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18443 { 11424 /* s_quadmask_b64 */, AMDGPU::S_QUADMASK_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18522 { 11956 /* s_swappc_b64 */, AMDGPU::S_SWAPPC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18523 { 11956 /* s_swappc_b64 */, AMDGPU::S_SWAPPC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18524 { 11956 /* s_swappc_b64 */, AMDGPU::S_SWAPPC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18540 { 12141 /* s_wqm_b64 */, AMDGPU::S_WQM_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18541 { 12141 /* s_wqm_b64 */, AMDGPU::S_WQM_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18542 { 12141 /* s_wqm_b64 */, AMDGPU::S_WQM_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18550 { 12193 /* s_xnor_saveexec_b64 */, AMDGPU::S_XNOR_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18551 { 12193 /* s_xnor_saveexec_b64 */, AMDGPU::S_XNOR_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18552 { 12193 /* s_xnor_saveexec_b64 */, AMDGPU::S_XNOR_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },
18560 { 12252 /* s_xor_saveexec_b64 */, AMDGPU::S_XOR_SAVEEXEC_B64_gfx10, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX10Plus, { MCK_SReg_64, MCK_SSrcB64 }, },
18561 { 12252 /* s_xor_saveexec_b64 */, AMDGPU::S_XOR_SAVEEXEC_B64_gfx6_gfx7, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX6GFX7, { MCK_SReg_64, MCK_SSrcB64 }, },
18562 { 12252 /* s_xor_saveexec_b64 */, AMDGPU::S_XOR_SAVEEXEC_B64_vi, Convert__Reg1_0__SSrcB641_1, AMFBS_isGFX8GFX9, { MCK_SReg_64, MCK_SSrcB64 }, },