reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
18217 { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_SGPR_gfx10, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64, MCK_SReg_32 }, }, 18218 { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_SGPR_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_SReg_32 }, }, 18221 { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_SGPR_gfx10, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX10Plus, { MCK_SReg_64, MCK_SReg_32 }, }, 18222 { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_SGPR_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_SReg_32 }, }, 21279 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e32_gfx10, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32 }, }, 21280 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e32_gfx6_gfx7, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32 }, }, 21281 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e32_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32 }, }, 21333 { 25672 /* v_readfirstlane_b32 */, AMDGPU::V_READFIRSTLANE_B32, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SReg_32, MCK_VRegOrLds_32 }, }, 21436 { 13172 /* v_accvgpr_read_b32 */, AMDGPU::V_ACCVGPR_READ_B32_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasMAIInsts_HasMAIInsts, { MCK_VGPR_32, MCK_AGPR_32 }, }, 22547 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e64_gfx10, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32 }, }, 22548 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e64_gfx6_gfx7, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX6GFX7, { MCK_VGPR_32, MCK_VGPR_32 }, }, 22549 { 24900 /* v_movrels_b32 */, AMDGPU::V_MOVRELS_B32_e64_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasMovrel_isGFX8GFX9, { MCK_VGPR_32, MCK_VGPR_32 }, },