reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc
23658   { 22313 /* v_cvt_norm_i16_f16 */, AMDGPU::V_CVT_NORM_I16_F16_dpp_vi, ConvertCustom_cvtDPP, AMFBS_isGFX9Plus_HasDPP, { MCK_VGPR_32, MCK_VRegWithFPInputMods, MCK_ImmDPPCtrl, MCK_ImmRowMask, MCK_ImmBankMask, MCK_ImmBoundCtrl }, },
23661   { 22332 /* v_cvt_norm_u16_f16 */, AMDGPU::V_CVT_NORM_U16_F16_dpp_vi, ConvertCustom_cvtDPP, AMFBS_isGFX9Plus_HasDPP, { MCK_VGPR_32, MCK_VRegWithFPInputMods, MCK_ImmDPPCtrl, MCK_ImmRowMask, MCK_ImmBankMask, MCK_ImmBoundCtrl }, },
23836   { 25863 /* v_sat_pk_u8_i16 */, AMDGPU::V_SAT_PK_U8_I16_dpp_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmDPPCtrl1_2__ImmRowMask1_3__ImmBankMask1_4__ImmBoundCtrl1_5, AMFBS_isGFX9Plus_HasDPP, { MCK_VGPR_32, MCK_VGPR_32, MCK_ImmDPPCtrl, MCK_ImmRowMask, MCK_ImmBankMask, MCK_ImmBoundCtrl }, },
76584   { 22313 /* v_cvt_norm_i16_f16 */, 2 /* 1 */, MCK_VRegWithFPInputMods, AMFBS_isGFX9Plus_HasDPP },
76585   { 22313 /* v_cvt_norm_i16_f16 */, 4 /* 2 */, MCK_ImmDPPCtrl, AMFBS_isGFX9Plus_HasDPP },
76586   { 22313 /* v_cvt_norm_i16_f16 */, 8 /* 3 */, MCK_ImmRowMask, AMFBS_isGFX9Plus_HasDPP },
76587   { 22313 /* v_cvt_norm_i16_f16 */, 16 /* 4 */, MCK_ImmBankMask, AMFBS_isGFX9Plus_HasDPP },
76588   { 22313 /* v_cvt_norm_i16_f16 */, 32 /* 5 */, MCK_ImmBoundCtrl, AMFBS_isGFX9Plus_HasDPP },
76616   { 22332 /* v_cvt_norm_u16_f16 */, 2 /* 1 */, MCK_VRegWithFPInputMods, AMFBS_isGFX9Plus_HasDPP },
76617   { 22332 /* v_cvt_norm_u16_f16 */, 4 /* 2 */, MCK_ImmDPPCtrl, AMFBS_isGFX9Plus_HasDPP },
76618   { 22332 /* v_cvt_norm_u16_f16 */, 8 /* 3 */, MCK_ImmRowMask, AMFBS_isGFX9Plus_HasDPP },
76619   { 22332 /* v_cvt_norm_u16_f16 */, 16 /* 4 */, MCK_ImmBankMask, AMFBS_isGFX9Plus_HasDPP },
76620   { 22332 /* v_cvt_norm_u16_f16 */, 32 /* 5 */, MCK_ImmBoundCtrl, AMFBS_isGFX9Plus_HasDPP },
79458   { 25863 /* v_sat_pk_u8_i16 */, 4 /* 2 */, MCK_ImmDPPCtrl, AMFBS_isGFX9Plus_HasDPP },
79459   { 25863 /* v_sat_pk_u8_i16 */, 8 /* 3 */, MCK_ImmRowMask, AMFBS_isGFX9Plus_HasDPP },
79460   { 25863 /* v_sat_pk_u8_i16 */, 16 /* 4 */, MCK_ImmBankMask, AMFBS_isGFX9Plus_HasDPP },
79461   { 25863 /* v_sat_pk_u8_i16 */, 32 /* 5 */, MCK_ImmBoundCtrl, AMFBS_isGFX9Plus_HasDPP },