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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18899 { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
18909 { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
18921 { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
18931 { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
18941 { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
18953 { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
18963 { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18973 { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
18985 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
18995 { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19005 { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19017 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19027 { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19037 { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19049 { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19057 { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19065 { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19077 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19085 { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19093 { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19105 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19115 { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19125 { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19137 { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19147 { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19157 { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19169 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19179 { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19189 { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19201 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19211 { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19221 { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19233 { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19243 { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19253 { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19265 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19275 { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19285 { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19297 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19307 { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19317 { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19329 { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19339 { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19349 { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19361 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19371 { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19381 { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19393 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19403 { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19413 { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19425 { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19435 { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19445 { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19457 { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19467 { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19477 { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19489 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19499 { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19509 { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19521 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19531 { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19541 { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19553 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19563 { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19573 { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19585 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19595 { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19605 { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19617 { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19627 { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19637 { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19649 { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19659 { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19669 { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19681 { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19691 { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19701 { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19713 { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19723 { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19733 { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19745 { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19755 { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19765 { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19777 { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19787 { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19797 { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19809 { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19817 { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19825 { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19837 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19845 { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19853 { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19865 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19875 { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19885 { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19897 { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19907 { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19917 { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19929 { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20194 { 18773 /* v_cmpx_class_f16 */, AMDGPU::V_CMPX_CLASS_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20202 { 18811 /* v_cmpx_class_f32 */, AMDGPU::V_CMPX_CLASS_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20212 { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
20220 { 18887 /* v_cmpx_eq_f16 */, AMDGPU::V_CMPX_EQ_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20228 { 18919 /* v_cmpx_eq_f32 */, AMDGPU::V_CMPX_EQ_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20238 { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20246 { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20254 { 19015 /* v_cmpx_eq_i32 */, AMDGPU::V_CMPX_EQ_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20264 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20272 { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20280 { 19111 /* v_cmpx_eq_u32 */, AMDGPU::V_CMPX_EQ_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20290 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20298 { 19175 /* v_cmpx_f_f16 */, AMDGPU::V_CMPX_F_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20306 { 19205 /* v_cmpx_f_f32 */, AMDGPU::V_CMPX_F_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20316 { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20323 { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20330 { 19295 /* v_cmpx_f_i32 */, AMDGPU::V_CMPX_F_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20340 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20347 { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20354 { 19385 /* v_cmpx_f_u32 */, AMDGPU::V_CMPX_F_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20364 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20372 { 19445 /* v_cmpx_ge_f16 */, AMDGPU::V_CMPX_GE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20380 { 19477 /* v_cmpx_ge_f32 */, AMDGPU::V_CMPX_GE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20390 { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20398 { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20406 { 19573 /* v_cmpx_ge_i32 */, AMDGPU::V_CMPX_GE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20416 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20424 { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20432 { 19669 /* v_cmpx_ge_u32 */, AMDGPU::V_CMPX_GE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20442 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20450 { 19733 /* v_cmpx_gt_f16 */, AMDGPU::V_CMPX_GT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20458 { 19765 /* v_cmpx_gt_f32 */, AMDGPU::V_CMPX_GT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20468 { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20476 { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20484 { 19861 /* v_cmpx_gt_i32 */, AMDGPU::V_CMPX_GT_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20494 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20502 { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20510 { 19957 /* v_cmpx_gt_u32 */, AMDGPU::V_CMPX_GT_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20520 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20528 { 20021 /* v_cmpx_le_f16 */, AMDGPU::V_CMPX_LE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20536 { 20053 /* v_cmpx_le_f32 */, AMDGPU::V_CMPX_LE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20546 { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20554 { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20562 { 20149 /* v_cmpx_le_i32 */, AMDGPU::V_CMPX_LE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20572 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20580 { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20588 { 20245 /* v_cmpx_le_u32 */, AMDGPU::V_CMPX_LE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20598 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20606 { 20309 /* v_cmpx_lg_f16 */, AMDGPU::V_CMPX_LG_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20614 { 20341 /* v_cmpx_lg_f32 */, AMDGPU::V_CMPX_LG_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20624 { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20632 { 20405 /* v_cmpx_lt_f16 */, AMDGPU::V_CMPX_LT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20640 { 20437 /* v_cmpx_lt_f32 */, AMDGPU::V_CMPX_LT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20650 { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20658 { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20666 { 20533 /* v_cmpx_lt_i32 */, AMDGPU::V_CMPX_LT_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20676 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20684 { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20692 { 20629 /* v_cmpx_lt_u32 */, AMDGPU::V_CMPX_LT_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20702 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20710 { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20718 { 20725 /* v_cmpx_ne_i32 */, AMDGPU::V_CMPX_NE_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20728 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20736 { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20744 { 20821 /* v_cmpx_ne_u32 */, AMDGPU::V_CMPX_NE_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20754 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20762 { 20885 /* v_cmpx_neq_f16 */, AMDGPU::V_CMPX_NEQ_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20770 { 20919 /* v_cmpx_neq_f32 */, AMDGPU::V_CMPX_NEQ_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20780 { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20788 { 20987 /* v_cmpx_nge_f16 */, AMDGPU::V_CMPX_NGE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20796 { 21021 /* v_cmpx_nge_f32 */, AMDGPU::V_CMPX_NGE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20806 { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20814 { 21089 /* v_cmpx_ngt_f16 */, AMDGPU::V_CMPX_NGT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20822 { 21123 /* v_cmpx_ngt_f32 */, AMDGPU::V_CMPX_NGT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20832 { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20840 { 21191 /* v_cmpx_nle_f16 */, AMDGPU::V_CMPX_NLE_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20848 { 21225 /* v_cmpx_nle_f32 */, AMDGPU::V_CMPX_NLE_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20858 { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20866 { 21293 /* v_cmpx_nlg_f16 */, AMDGPU::V_CMPX_NLG_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20874 { 21327 /* v_cmpx_nlg_f32 */, AMDGPU::V_CMPX_NLG_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20884 { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20892 { 21395 /* v_cmpx_nlt_f16 */, AMDGPU::V_CMPX_NLT_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20900 { 21429 /* v_cmpx_nlt_f32 */, AMDGPU::V_CMPX_NLT_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20910 { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20918 { 21497 /* v_cmpx_o_f16 */, AMDGPU::V_CMPX_O_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
20926 { 21527 /* v_cmpx_o_f32 */, AMDGPU::V_CMPX_O_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
20936 { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
20943 { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20950 { 21617 /* v_cmpx_t_i32 */, AMDGPU::V_CMPX_T_I32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20960 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20967 { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
20974 { 21707 /* v_cmpx_t_u32 */, AMDGPU::V_CMPX_T_U32_e32_vi, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
20984 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e32_vi, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
20992 { 21767 /* v_cmpx_tru_f16 */, AMDGPU::V_CMPX_TRU_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
21000 { 21801 /* v_cmpx_tru_f32 */, AMDGPU::V_CMPX_TRU_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
21010 { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
21018 { 21869 /* v_cmpx_u_f16 */, AMDGPU::V_CMPX_U_F16_e32_vi, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
21026 { 21899 /* v_cmpx_u_f32 */, AMDGPU::V_CMPX_U_F32_e32_vi, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
21036 { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e32_vi, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX8GFX9_isGFX8GFX9_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },