reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
18081 { 9380 /* s_buffer_load_dword */, AMDGPU::S_BUFFER_LOAD_DWORD_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18088 { 9400 /* s_buffer_load_dwordx16 */, AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_512, MCK_SReg_128, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18095 { 9423 /* s_buffer_load_dwordx2 */, AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18102 { 9445 /* s_buffer_load_dwordx4 */, AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18109 { 9467 /* s_buffer_load_dwordx8 */, AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_256, MCK_SReg_128, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18279 { 10626 /* s_load_dword */, AMDGPU::S_LOAD_DWORD_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18286 { 10639 /* s_load_dwordx16 */, AMDGPU::S_LOAD_DWORDX16_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_512, MCK_SReg_64, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18293 { 10655 /* s_load_dwordx2 */, AMDGPU::S_LOAD_DWORDX2_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18300 { 10670 /* s_load_dwordx4 */, AMDGPU::S_LOAD_DWORDX4_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 18307 { 10685 /* s_load_dwordx8 */, AMDGPU::S_LOAD_DWORDX8_IMM_ci, Convert__Reg1_0__Reg1_1__ImmSMRDLiteralOffset1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_isGFX7Only, { MCK_SReg_256, MCK_SReg_64, MCK_ImmSMRDLiteralOffset, MCK_ImmGLC, MCK_ImmDLC }, }, 70766 { 9380 /* s_buffer_load_dword */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70767 { 9380 /* s_buffer_load_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70768 { 9380 /* s_buffer_load_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70784 { 9400 /* s_buffer_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70785 { 9400 /* s_buffer_load_dwordx16 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70786 { 9400 /* s_buffer_load_dwordx16 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70802 { 9423 /* s_buffer_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70803 { 9423 /* s_buffer_load_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70804 { 9423 /* s_buffer_load_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70820 { 9445 /* s_buffer_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70821 { 9445 /* s_buffer_load_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70822 { 9445 /* s_buffer_load_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70838 { 9467 /* s_buffer_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70839 { 9467 /* s_buffer_load_dwordx8 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70840 { 9467 /* s_buffer_load_dwordx8 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70918 { 10626 /* s_load_dword */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70919 { 10626 /* s_load_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70920 { 10626 /* s_load_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70936 { 10639 /* s_load_dwordx16 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70937 { 10639 /* s_load_dwordx16 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70938 { 10639 /* s_load_dwordx16 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70954 { 10655 /* s_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70955 { 10655 /* s_load_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70956 { 10655 /* s_load_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70972 { 10670 /* s_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70973 { 10670 /* s_load_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70974 { 10670 /* s_load_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only }, 70990 { 10685 /* s_load_dwordx8 */, 4 /* 2 */, MCK_ImmSMRDLiteralOffset, AMFBS_isGFX7Only }, 70991 { 10685 /* s_load_dwordx8 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_isGFX7Only }, 70992 { 10685 /* s_load_dwordx8 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_isGFX7Only },