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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18898 { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
18908 { 13677 /* v_cmp_class_f32 */, AMDGPU::V_CMP_CLASS_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
18920 { 13713 /* v_cmp_class_f64 */, AMDGPU::V_CMP_CLASS_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VGPR_32 }, },
18930 { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
18940 { 13779 /* v_cmp_eq_f32 */, AMDGPU::V_CMP_EQ_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
18952 { 13809 /* v_cmp_eq_f64 */, AMDGPU::V_CMP_EQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
18962 { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
18972 { 13869 /* v_cmp_eq_i32 */, AMDGPU::V_CMP_EQ_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
18984 { 13899 /* v_cmp_eq_i64 */, AMDGPU::V_CMP_EQ_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
18994 { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19004 { 13959 /* v_cmp_eq_u32 */, AMDGPU::V_CMP_EQ_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19016 { 13989 /* v_cmp_eq_u64 */, AMDGPU::V_CMP_EQ_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19026 { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19036 { 14047 /* v_cmp_f_f32 */, AMDGPU::V_CMP_F_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19048 { 14075 /* v_cmp_f_f64 */, AMDGPU::V_CMP_F_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19064 { 14131 /* v_cmp_f_i32 */, AMDGPU::V_CMP_F_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19076 { 14159 /* v_cmp_f_i64 */, AMDGPU::V_CMP_F_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19092 { 14215 /* v_cmp_f_u32 */, AMDGPU::V_CMP_F_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19104 { 14243 /* v_cmp_f_u64 */, AMDGPU::V_CMP_F_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19114 { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19124 { 14301 /* v_cmp_ge_f32 */, AMDGPU::V_CMP_GE_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19136 { 14331 /* v_cmp_ge_f64 */, AMDGPU::V_CMP_GE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19146 { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19156 { 14391 /* v_cmp_ge_i32 */, AMDGPU::V_CMP_GE_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19168 { 14421 /* v_cmp_ge_i64 */, AMDGPU::V_CMP_GE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19178 { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19188 { 14481 /* v_cmp_ge_u32 */, AMDGPU::V_CMP_GE_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19200 { 14511 /* v_cmp_ge_u64 */, AMDGPU::V_CMP_GE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19210 { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19220 { 14571 /* v_cmp_gt_f32 */, AMDGPU::V_CMP_GT_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19232 { 14601 /* v_cmp_gt_f64 */, AMDGPU::V_CMP_GT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19242 { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19252 { 14661 /* v_cmp_gt_i32 */, AMDGPU::V_CMP_GT_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19264 { 14691 /* v_cmp_gt_i64 */, AMDGPU::V_CMP_GT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19274 { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19284 { 14751 /* v_cmp_gt_u32 */, AMDGPU::V_CMP_GT_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19296 { 14781 /* v_cmp_gt_u64 */, AMDGPU::V_CMP_GT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19306 { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19316 { 14841 /* v_cmp_le_f32 */, AMDGPU::V_CMP_LE_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19328 { 14871 /* v_cmp_le_f64 */, AMDGPU::V_CMP_LE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19338 { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19348 { 14931 /* v_cmp_le_i32 */, AMDGPU::V_CMP_LE_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19360 { 14961 /* v_cmp_le_i64 */, AMDGPU::V_CMP_LE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19370 { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19380 { 15021 /* v_cmp_le_u32 */, AMDGPU::V_CMP_LE_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19392 { 15051 /* v_cmp_le_u64 */, AMDGPU::V_CMP_LE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19402 { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19412 { 15111 /* v_cmp_lg_f32 */, AMDGPU::V_CMP_LG_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19424 { 15141 /* v_cmp_lg_f64 */, AMDGPU::V_CMP_LG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19434 { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19444 { 15201 /* v_cmp_lt_f32 */, AMDGPU::V_CMP_LT_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19456 { 15231 /* v_cmp_lt_f64 */, AMDGPU::V_CMP_LT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19466 { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19476 { 15291 /* v_cmp_lt_i32 */, AMDGPU::V_CMP_LT_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19488 { 15321 /* v_cmp_lt_i64 */, AMDGPU::V_CMP_LT_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19498 { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19508 { 15381 /* v_cmp_lt_u32 */, AMDGPU::V_CMP_LT_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19520 { 15411 /* v_cmp_lt_u64 */, AMDGPU::V_CMP_LT_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19530 { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19540 { 15471 /* v_cmp_ne_i32 */, AMDGPU::V_CMP_NE_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19552 { 15501 /* v_cmp_ne_i64 */, AMDGPU::V_CMP_NE_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19562 { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB16, MCK_VGPR_32 }, },
19572 { 15561 /* v_cmp_ne_u32 */, AMDGPU::V_CMP_NE_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19584 { 15591 /* v_cmp_ne_u64 */, AMDGPU::V_CMP_NE_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19594 { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19604 { 15653 /* v_cmp_neq_f32 */, AMDGPU::V_CMP_NEQ_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19616 { 15685 /* v_cmp_neq_f64 */, AMDGPU::V_CMP_NEQ_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19626 { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19636 { 15749 /* v_cmp_nge_f32 */, AMDGPU::V_CMP_NGE_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19648 { 15781 /* v_cmp_nge_f64 */, AMDGPU::V_CMP_NGE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19658 { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19668 { 15845 /* v_cmp_ngt_f32 */, AMDGPU::V_CMP_NGT_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19680 { 15877 /* v_cmp_ngt_f64 */, AMDGPU::V_CMP_NGT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19690 { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19700 { 15941 /* v_cmp_nle_f32 */, AMDGPU::V_CMP_NLE_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19712 { 15973 /* v_cmp_nle_f64 */, AMDGPU::V_CMP_NLE_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19722 { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19732 { 16037 /* v_cmp_nlg_f32 */, AMDGPU::V_CMP_NLG_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19744 { 16069 /* v_cmp_nlg_f64 */, AMDGPU::V_CMP_NLG_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19754 { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19764 { 16133 /* v_cmp_nlt_f32 */, AMDGPU::V_CMP_NLT_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19776 { 16165 /* v_cmp_nlt_f64 */, AMDGPU::V_CMP_NLT_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19786 { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19796 { 16225 /* v_cmp_o_f32 */, AMDGPU::V_CMP_O_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19808 { 16253 /* v_cmp_o_f64 */, AMDGPU::V_CMP_O_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19824 { 16309 /* v_cmp_t_i32 */, AMDGPU::V_CMP_T_I32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19836 { 16337 /* v_cmp_t_i64 */, AMDGPU::V_CMP_T_I64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19852 { 16393 /* v_cmp_t_u32 */, AMDGPU::V_CMP_T_U32_e32_gfx10, Convert__VSrcB321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB32, MCK_VGPR_32 }, },
19864 { 16421 /* v_cmp_t_u64 */, AMDGPU::V_CMP_T_U64_e32_gfx10, Convert__VSrcB641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcB64, MCK_VReg_64 }, },
19874 { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19884 { 16481 /* v_cmp_tru_f32 */, AMDGPU::V_CMP_TRU_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19896 { 16513 /* v_cmp_tru_f64 */, AMDGPU::V_CMP_TRU_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },
19906 { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e32_gfx10, Convert__VSrcF161_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF16, MCK_VGPR_32 }, },
19916 { 16573 /* v_cmp_u_f32 */, AMDGPU::V_CMP_U_F32_e32_gfx10, Convert__VSrcF321_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF32, MCK_VGPR_32 }, },
19928 { 16601 /* v_cmp_u_f64 */, AMDGPU::V_CMP_U_F64_e32_gfx10, Convert__VSrcF641_1__Reg1_2, AMFBS_isGFX10Plus_isGFX10Plus_isWave64, { MCK_VCC, MCK_VSrcF64, MCK_VReg_64 }, },