reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
18461 { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_SGPR_gfx10, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, }, 18463 { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, }, 18465 { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_SGPR_gfx10, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, }, 18467 { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, }, 18469 { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_SGPR_gfx10, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_128, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, }, 18471 { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_IMM_gfx10, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, }, 71023 { 11547 /* s_scratch_store_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71024 { 11547 /* s_scratch_store_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71027 { 11547 /* s_scratch_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71028 { 11547 /* s_scratch_store_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71029 { 11547 /* s_scratch_store_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71033 { 11569 /* s_scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71034 { 11569 /* s_scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71037 { 11569 /* s_scratch_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71038 { 11569 /* s_scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71039 { 11569 /* s_scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71043 { 11593 /* s_scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71044 { 11593 /* s_scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71047 { 11593 /* s_scratch_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71048 { 11593 /* s_scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts }, 71049 { 11593 /* s_scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarStores_isGFX10Plus_HasScalarFlatScratchInsts },