reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc
18450   { 11480 /* s_scratch_load_dword */, AMDGPU::S_SCRATCH_LOAD_DWORD_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18452   { 11480 /* s_scratch_load_dword */, AMDGPU::S_SCRATCH_LOAD_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18454   { 11501 /* s_scratch_load_dwordx2 */, AMDGPU::S_SCRATCH_LOAD_DWORDX2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18456   { 11501 /* s_scratch_load_dwordx2 */, AMDGPU::S_SCRATCH_LOAD_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18458   { 11524 /* s_scratch_load_dwordx4 */, AMDGPU::S_SCRATCH_LOAD_DWORDX4_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18460   { 11524 /* s_scratch_load_dwordx4 */, AMDGPU::S_SCRATCH_LOAD_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18462   { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18464   { 11547 /* s_scratch_store_dword */, AMDGPU::S_SCRATCH_STORE_DWORD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18466   { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18468   { 11569 /* s_scratch_store_dwordx2 */, AMDGPU::S_SCRATCH_STORE_DWORDX2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
18470   { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_SReg_32, MCK_ImmGLC, MCK_ImmDLC }, },
18472   { 11593 /* s_scratch_store_dwordx4 */, AMDGPU::S_SCRATCH_STORE_DWORDX4_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmGLC1_3__ImmDLC1_4, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmGLC, MCK_ImmDLC }, },
70995   { 11480 /* s_scratch_load_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
70996   { 11480 /* s_scratch_load_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71000   { 11480 /* s_scratch_load_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71001   { 11480 /* s_scratch_load_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71002   { 11480 /* s_scratch_load_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71005   { 11501 /* s_scratch_load_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71006   { 11501 /* s_scratch_load_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71010   { 11501 /* s_scratch_load_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71011   { 11501 /* s_scratch_load_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71012   { 11501 /* s_scratch_load_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71015   { 11524 /* s_scratch_load_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71016   { 11524 /* s_scratch_load_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71020   { 11524 /* s_scratch_load_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71021   { 11524 /* s_scratch_load_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71022   { 11524 /* s_scratch_load_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71025   { 11547 /* s_scratch_store_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71026   { 11547 /* s_scratch_store_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71030   { 11547 /* s_scratch_store_dword */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71031   { 11547 /* s_scratch_store_dword */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71032   { 11547 /* s_scratch_store_dword */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71035   { 11569 /* s_scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71036   { 11569 /* s_scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71040   { 11569 /* s_scratch_store_dwordx2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71041   { 11569 /* s_scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71042   { 11569 /* s_scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71045   { 11593 /* s_scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71046   { 11593 /* s_scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71050   { 11593 /* s_scratch_store_dwordx4 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71051   { 11593 /* s_scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },
71052   { 11593 /* s_scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmGLC, AMFBS_HasScalarFlatScratchInsts_isGFX8GFX9 },