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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc17603 { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17605 { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17607 { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17609 { 8112 /* s_atomic_add */, AMDGPU::S_ATOMIC_ADD_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17611 { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17613 { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17615 { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17617 { 8125 /* s_atomic_add_x2 */, AMDGPU::S_ATOMIC_ADD_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17619 { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17621 { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17623 { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17625 { 8141 /* s_atomic_and */, AMDGPU::S_ATOMIC_AND_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17627 { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17629 { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17631 { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17633 { 8154 /* s_atomic_and_x2 */, AMDGPU::S_ATOMIC_AND_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17635 { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17637 { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17639 { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17641 { 8170 /* s_atomic_cmpswap */, AMDGPU::S_ATOMIC_CMPSWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17643 { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17645 { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17647 { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17649 { 8187 /* s_atomic_cmpswap_x2 */, AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17651 { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17653 { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17655 { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17657 { 8207 /* s_atomic_dec */, AMDGPU::S_ATOMIC_DEC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17659 { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17661 { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17663 { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17665 { 8220 /* s_atomic_dec_x2 */, AMDGPU::S_ATOMIC_DEC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17667 { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17669 { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17671 { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17673 { 8236 /* s_atomic_inc */, AMDGPU::S_ATOMIC_INC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17675 { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17677 { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17679 { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17681 { 8249 /* s_atomic_inc_x2 */, AMDGPU::S_ATOMIC_INC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17683 { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17685 { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17687 { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17689 { 8265 /* s_atomic_or */, AMDGPU::S_ATOMIC_OR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17691 { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17693 { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17695 { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17697 { 8277 /* s_atomic_or_x2 */, AMDGPU::S_ATOMIC_OR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17699 { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17701 { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17703 { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17705 { 8292 /* s_atomic_smax */, AMDGPU::S_ATOMIC_SMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17707 { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17709 { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17711 { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17713 { 8306 /* s_atomic_smax_x2 */, AMDGPU::S_ATOMIC_SMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17715 { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17717 { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17719 { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17721 { 8323 /* s_atomic_smin */, AMDGPU::S_ATOMIC_SMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17723 { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17725 { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17727 { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17729 { 8337 /* s_atomic_smin_x2 */, AMDGPU::S_ATOMIC_SMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17731 { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17733 { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17735 { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17737 { 8354 /* s_atomic_sub */, AMDGPU::S_ATOMIC_SUB_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17739 { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17741 { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17743 { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17745 { 8367 /* s_atomic_sub_x2 */, AMDGPU::S_ATOMIC_SUB_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17747 { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17749 { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17751 { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17753 { 8383 /* s_atomic_swap */, AMDGPU::S_ATOMIC_SWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17755 { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17757 { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17759 { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17761 { 8397 /* s_atomic_swap_x2 */, AMDGPU::S_ATOMIC_SWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17763 { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17765 { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17767 { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17769 { 8414 /* s_atomic_umax */, AMDGPU::S_ATOMIC_UMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17771 { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17773 { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17775 { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17777 { 8428 /* s_atomic_umax_x2 */, AMDGPU::S_ATOMIC_UMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17779 { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17781 { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17783 { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17785 { 8445 /* s_atomic_umin */, AMDGPU::S_ATOMIC_UMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17787 { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17789 { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17791 { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17793 { 8459 /* s_atomic_umin_x2 */, AMDGPU::S_ATOMIC_UMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17795 { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17797 { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17799 { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17801 { 8476 /* s_atomic_xor */, AMDGPU::S_ATOMIC_XOR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17803 { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_ImmDLC }, },
17805 { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17807 { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17809 { 8489 /* s_atomic_xor_x2 */, AMDGPU::S_ATOMIC_XOR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_64, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17868 { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17870 { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17872 { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17874 { 8805 /* s_buffer_atomic_add */, AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17876 { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17878 { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17880 { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17882 { 8825 /* s_buffer_atomic_add_x2 */, AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17884 { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17886 { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17888 { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17890 { 8848 /* s_buffer_atomic_and */, AMDGPU::S_BUFFER_ATOMIC_AND_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17892 { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17894 { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17896 { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17898 { 8868 /* s_buffer_atomic_and_x2 */, AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17900 { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17902 { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17904 { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17906 { 8891 /* s_buffer_atomic_cmpswap */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17908 { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17910 { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17912 { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17914 { 8915 /* s_buffer_atomic_cmpswap_x2 */, AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_128, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17916 { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17918 { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17920 { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17922 { 8942 /* s_buffer_atomic_dec */, AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17924 { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17926 { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17928 { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17930 { 8962 /* s_buffer_atomic_dec_x2 */, AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17932 { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17934 { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17936 { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17938 { 8985 /* s_buffer_atomic_inc */, AMDGPU::S_BUFFER_ATOMIC_INC_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17940 { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17942 { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17944 { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17946 { 9005 /* s_buffer_atomic_inc_x2 */, AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17948 { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17950 { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17952 { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17954 { 9028 /* s_buffer_atomic_or */, AMDGPU::S_BUFFER_ATOMIC_OR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17956 { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17958 { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17960 { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17962 { 9047 /* s_buffer_atomic_or_x2 */, AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17964 { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17966 { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17968 { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17970 { 9069 /* s_buffer_atomic_smax */, AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17972 { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17974 { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17976 { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17978 { 9090 /* s_buffer_atomic_smax_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17980 { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17982 { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17984 { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17986 { 9114 /* s_buffer_atomic_smin */, AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17988 { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17990 { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
17992 { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
17994 { 9135 /* s_buffer_atomic_smin_x2 */, AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
17996 { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
17998 { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18000 { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18002 { 9159 /* s_buffer_atomic_sub */, AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18004 { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18006 { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18008 { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18010 { 9179 /* s_buffer_atomic_sub_x2 */, AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18012 { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18014 { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18016 { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18018 { 9202 /* s_buffer_atomic_swap */, AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18020 { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18022 { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18024 { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18026 { 9223 /* s_buffer_atomic_swap_x2 */, AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18028 { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18030 { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18032 { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18034 { 9247 /* s_buffer_atomic_umax */, AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18036 { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18038 { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18040 { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18042 { 9268 /* s_buffer_atomic_umax_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18044 { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18046 { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18048 { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18050 { 9292 /* s_buffer_atomic_umin */, AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18052 { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18054 { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18056 { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18058 { 9313 /* s_buffer_atomic_umin_x2 */, AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18060 { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18062 { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18064 { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18066 { 9337 /* s_buffer_atomic_xor */, AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_32_XM0_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18068 { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_SGPR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_ImmDLC }, },
18070 { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_vi, Convert__Reg1_0__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_3, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_ImmDLC }, },
18072 { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_SGPR_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_SReg_32, MCK_glc, MCK_ImmDLC }, },
18074 { 9357 /* s_buffer_atomic_xor_x2 */, AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_vi, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmSMRDOffset201_2__ImmDLC1_4, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64_XEXEC, MCK_SReg_128, MCK_ImmSMRDOffset20, MCK_glc, MCK_ImmDLC }, },
18218 { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_SGPR_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_SReg_32 }, },
18220 { 10232 /* s_dcache_discard */, AMDGPU::S_DCACHE_DISCARD_IMM_vi, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
18222 { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_SGPR_vi, Convert__Reg1_0__Reg1_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_SReg_32 }, },
18224 { 10249 /* s_dcache_discard_x2 */, AMDGPU::S_DCACHE_DISCARD_X2_IMM_vi, Convert__Reg1_0__ImmSMRDOffset201_1, AMFBS_HasScalarAtomics_isGFX8GFX9, { MCK_SReg_64, MCK_ImmSMRDOffset20 }, },
70126 { 8112 /* s_atomic_add */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70129 { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70130 { 8112 /* s_atomic_add */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70132 { 8112 /* s_atomic_add */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70135 { 8112 /* s_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70136 { 8112 /* s_atomic_add */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70138 { 8125 /* s_atomic_add_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70141 { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70142 { 8125 /* s_atomic_add_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70144 { 8125 /* s_atomic_add_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70147 { 8125 /* s_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70148 { 8125 /* s_atomic_add_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70150 { 8141 /* s_atomic_and */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70153 { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70154 { 8141 /* s_atomic_and */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70156 { 8141 /* s_atomic_and */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70159 { 8141 /* s_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70160 { 8141 /* s_atomic_and */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70162 { 8154 /* s_atomic_and_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70165 { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70166 { 8154 /* s_atomic_and_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70168 { 8154 /* s_atomic_and_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70171 { 8154 /* s_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70172 { 8154 /* s_atomic_and_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70174 { 8170 /* s_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70177 { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70178 { 8170 /* s_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70180 { 8170 /* s_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70183 { 8170 /* s_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70184 { 8170 /* s_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70186 { 8187 /* s_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70189 { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70190 { 8187 /* s_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70192 { 8187 /* s_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70195 { 8187 /* s_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70196 { 8187 /* s_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70198 { 8207 /* s_atomic_dec */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70201 { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70202 { 8207 /* s_atomic_dec */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70204 { 8207 /* s_atomic_dec */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70207 { 8207 /* s_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70208 { 8207 /* s_atomic_dec */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70210 { 8220 /* s_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70213 { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70214 { 8220 /* s_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70216 { 8220 /* s_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70219 { 8220 /* s_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70220 { 8220 /* s_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70222 { 8236 /* s_atomic_inc */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70225 { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70226 { 8236 /* s_atomic_inc */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70228 { 8236 /* s_atomic_inc */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70231 { 8236 /* s_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70232 { 8236 /* s_atomic_inc */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70234 { 8249 /* s_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70237 { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70238 { 8249 /* s_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70240 { 8249 /* s_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70243 { 8249 /* s_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70244 { 8249 /* s_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70246 { 8265 /* s_atomic_or */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70249 { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70250 { 8265 /* s_atomic_or */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70252 { 8265 /* s_atomic_or */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70255 { 8265 /* s_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70256 { 8265 /* s_atomic_or */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70258 { 8277 /* s_atomic_or_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70261 { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70262 { 8277 /* s_atomic_or_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70264 { 8277 /* s_atomic_or_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70267 { 8277 /* s_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70268 { 8277 /* s_atomic_or_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70270 { 8292 /* s_atomic_smax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70273 { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70274 { 8292 /* s_atomic_smax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70276 { 8292 /* s_atomic_smax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70279 { 8292 /* s_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70280 { 8292 /* s_atomic_smax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70282 { 8306 /* s_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70285 { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70286 { 8306 /* s_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70288 { 8306 /* s_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70291 { 8306 /* s_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70292 { 8306 /* s_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70294 { 8323 /* s_atomic_smin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70297 { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70298 { 8323 /* s_atomic_smin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70300 { 8323 /* s_atomic_smin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70303 { 8323 /* s_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70304 { 8323 /* s_atomic_smin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70306 { 8337 /* s_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70309 { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70310 { 8337 /* s_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70312 { 8337 /* s_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70315 { 8337 /* s_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70316 { 8337 /* s_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70318 { 8354 /* s_atomic_sub */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70321 { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70322 { 8354 /* s_atomic_sub */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70324 { 8354 /* s_atomic_sub */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70327 { 8354 /* s_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70328 { 8354 /* s_atomic_sub */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70330 { 8367 /* s_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70333 { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70334 { 8367 /* s_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70336 { 8367 /* s_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70339 { 8367 /* s_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70340 { 8367 /* s_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70342 { 8383 /* s_atomic_swap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70345 { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70346 { 8383 /* s_atomic_swap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70348 { 8383 /* s_atomic_swap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70351 { 8383 /* s_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70352 { 8383 /* s_atomic_swap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70354 { 8397 /* s_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70357 { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70358 { 8397 /* s_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70360 { 8397 /* s_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70363 { 8397 /* s_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70364 { 8397 /* s_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70366 { 8414 /* s_atomic_umax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70369 { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70370 { 8414 /* s_atomic_umax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70372 { 8414 /* s_atomic_umax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70375 { 8414 /* s_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70376 { 8414 /* s_atomic_umax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70378 { 8428 /* s_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70381 { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70382 { 8428 /* s_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70384 { 8428 /* s_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70387 { 8428 /* s_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70388 { 8428 /* s_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70390 { 8445 /* s_atomic_umin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70393 { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70394 { 8445 /* s_atomic_umin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70396 { 8445 /* s_atomic_umin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70399 { 8445 /* s_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70400 { 8445 /* s_atomic_umin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70402 { 8459 /* s_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70405 { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70406 { 8459 /* s_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70408 { 8459 /* s_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70411 { 8459 /* s_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70412 { 8459 /* s_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70414 { 8476 /* s_atomic_xor */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70417 { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70418 { 8476 /* s_atomic_xor */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70420 { 8476 /* s_atomic_xor */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70423 { 8476 /* s_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70424 { 8476 /* s_atomic_xor */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70426 { 8489 /* s_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70429 { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70430 { 8489 /* s_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70432 { 8489 /* s_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70435 { 8489 /* s_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70436 { 8489 /* s_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70440 { 8805 /* s_buffer_atomic_add */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70443 { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70444 { 8805 /* s_buffer_atomic_add */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70446 { 8805 /* s_buffer_atomic_add */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70449 { 8805 /* s_buffer_atomic_add */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70450 { 8805 /* s_buffer_atomic_add */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70452 { 8825 /* s_buffer_atomic_add_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70455 { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70456 { 8825 /* s_buffer_atomic_add_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70458 { 8825 /* s_buffer_atomic_add_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70461 { 8825 /* s_buffer_atomic_add_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70462 { 8825 /* s_buffer_atomic_add_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70464 { 8848 /* s_buffer_atomic_and */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70467 { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70468 { 8848 /* s_buffer_atomic_and */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70470 { 8848 /* s_buffer_atomic_and */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70473 { 8848 /* s_buffer_atomic_and */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70474 { 8848 /* s_buffer_atomic_and */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70476 { 8868 /* s_buffer_atomic_and_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70479 { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70480 { 8868 /* s_buffer_atomic_and_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70482 { 8868 /* s_buffer_atomic_and_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70485 { 8868 /* s_buffer_atomic_and_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70486 { 8868 /* s_buffer_atomic_and_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70488 { 8891 /* s_buffer_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70491 { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70492 { 8891 /* s_buffer_atomic_cmpswap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70494 { 8891 /* s_buffer_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70497 { 8891 /* s_buffer_atomic_cmpswap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70498 { 8891 /* s_buffer_atomic_cmpswap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70500 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70503 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70504 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70506 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70509 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70510 { 8915 /* s_buffer_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70512 { 8942 /* s_buffer_atomic_dec */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70515 { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70516 { 8942 /* s_buffer_atomic_dec */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70518 { 8942 /* s_buffer_atomic_dec */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70521 { 8942 /* s_buffer_atomic_dec */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70522 { 8942 /* s_buffer_atomic_dec */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70524 { 8962 /* s_buffer_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70527 { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70528 { 8962 /* s_buffer_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70530 { 8962 /* s_buffer_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70533 { 8962 /* s_buffer_atomic_dec_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70534 { 8962 /* s_buffer_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70536 { 8985 /* s_buffer_atomic_inc */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70539 { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70540 { 8985 /* s_buffer_atomic_inc */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70542 { 8985 /* s_buffer_atomic_inc */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70545 { 8985 /* s_buffer_atomic_inc */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70546 { 8985 /* s_buffer_atomic_inc */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70548 { 9005 /* s_buffer_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70551 { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70552 { 9005 /* s_buffer_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70554 { 9005 /* s_buffer_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70557 { 9005 /* s_buffer_atomic_inc_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70558 { 9005 /* s_buffer_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70560 { 9028 /* s_buffer_atomic_or */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70563 { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70564 { 9028 /* s_buffer_atomic_or */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70566 { 9028 /* s_buffer_atomic_or */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70569 { 9028 /* s_buffer_atomic_or */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70570 { 9028 /* s_buffer_atomic_or */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70572 { 9047 /* s_buffer_atomic_or_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70575 { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70576 { 9047 /* s_buffer_atomic_or_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70578 { 9047 /* s_buffer_atomic_or_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70581 { 9047 /* s_buffer_atomic_or_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70582 { 9047 /* s_buffer_atomic_or_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70584 { 9069 /* s_buffer_atomic_smax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70587 { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70588 { 9069 /* s_buffer_atomic_smax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70590 { 9069 /* s_buffer_atomic_smax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70593 { 9069 /* s_buffer_atomic_smax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70594 { 9069 /* s_buffer_atomic_smax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70596 { 9090 /* s_buffer_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70599 { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70600 { 9090 /* s_buffer_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70602 { 9090 /* s_buffer_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70605 { 9090 /* s_buffer_atomic_smax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70606 { 9090 /* s_buffer_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70608 { 9114 /* s_buffer_atomic_smin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70611 { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70612 { 9114 /* s_buffer_atomic_smin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70614 { 9114 /* s_buffer_atomic_smin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70617 { 9114 /* s_buffer_atomic_smin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70618 { 9114 /* s_buffer_atomic_smin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70620 { 9135 /* s_buffer_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70623 { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70624 { 9135 /* s_buffer_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70626 { 9135 /* s_buffer_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70629 { 9135 /* s_buffer_atomic_smin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70630 { 9135 /* s_buffer_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70632 { 9159 /* s_buffer_atomic_sub */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70635 { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70636 { 9159 /* s_buffer_atomic_sub */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70638 { 9159 /* s_buffer_atomic_sub */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70641 { 9159 /* s_buffer_atomic_sub */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70642 { 9159 /* s_buffer_atomic_sub */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70644 { 9179 /* s_buffer_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70647 { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70648 { 9179 /* s_buffer_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70650 { 9179 /* s_buffer_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70653 { 9179 /* s_buffer_atomic_sub_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70654 { 9179 /* s_buffer_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70656 { 9202 /* s_buffer_atomic_swap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70659 { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70660 { 9202 /* s_buffer_atomic_swap */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70662 { 9202 /* s_buffer_atomic_swap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70665 { 9202 /* s_buffer_atomic_swap */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70666 { 9202 /* s_buffer_atomic_swap */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70668 { 9223 /* s_buffer_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70671 { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70672 { 9223 /* s_buffer_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70674 { 9223 /* s_buffer_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70677 { 9223 /* s_buffer_atomic_swap_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70678 { 9223 /* s_buffer_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70680 { 9247 /* s_buffer_atomic_umax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70683 { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70684 { 9247 /* s_buffer_atomic_umax */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70686 { 9247 /* s_buffer_atomic_umax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70689 { 9247 /* s_buffer_atomic_umax */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70690 { 9247 /* s_buffer_atomic_umax */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70692 { 9268 /* s_buffer_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70695 { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70696 { 9268 /* s_buffer_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70698 { 9268 /* s_buffer_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70701 { 9268 /* s_buffer_atomic_umax_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70702 { 9268 /* s_buffer_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70704 { 9292 /* s_buffer_atomic_umin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70707 { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70708 { 9292 /* s_buffer_atomic_umin */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70710 { 9292 /* s_buffer_atomic_umin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70713 { 9292 /* s_buffer_atomic_umin */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70714 { 9292 /* s_buffer_atomic_umin */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70716 { 9313 /* s_buffer_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70719 { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70720 { 9313 /* s_buffer_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70722 { 9313 /* s_buffer_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70725 { 9313 /* s_buffer_atomic_umin_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70726 { 9313 /* s_buffer_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70728 { 9337 /* s_buffer_atomic_xor */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70731 { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70732 { 9337 /* s_buffer_atomic_xor */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70734 { 9337 /* s_buffer_atomic_xor */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70737 { 9337 /* s_buffer_atomic_xor */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70738 { 9337 /* s_buffer_atomic_xor */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70740 { 9357 /* s_buffer_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70743 { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70744 { 9357 /* s_buffer_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70746 { 9357 /* s_buffer_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70749 { 9357 /* s_buffer_atomic_xor_x2 */, 4 /* 2 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70750 { 9357 /* s_buffer_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmDLC, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70896 { 10232 /* s_dcache_discard */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },
70898 { 10249 /* s_dcache_discard_x2 */, 2 /* 1 */, MCK_ImmSMRDOffset20, AMFBS_HasScalarAtomics_isGFX8GFX9 },