reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
23064 { 13222 /* v_add_co_ci_u32 */, AMDGPU::V_ADD_CO_CI_U32_sdwa_w64_gfx10, ConvertCustom_cvtSdwaVOP2b, AMFBS_HasSDWA10_isGFX10Plus_isWave64, { MCK_VGPR_32, MCK_VCC, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_VCC, MCK_ImmClampSI, MCK_ImmSDWADstSel, MCK_ImmSDWADstUnused, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, }, 23353 { 21959 /* v_cndmask_b32 */, AMDGPU::V_CNDMASK_B32_sdwa_w64_gfx10, ConvertCustom_cvtSdwaVOP2e, AMFBS_HasSDWA10_isGFX10Plus_isWave64, { MCK_VGPR_32, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_VCC, MCK_ImmClampSI, MCK_ImmSDWADstSel, MCK_ImmSDWADstUnused, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, }, 23513 { 25959 /* v_sub_co_ci_u32 */, AMDGPU::V_SUB_CO_CI_U32_sdwa_w64_gfx10, ConvertCustom_cvtSdwaVOP2b, AMFBS_HasSDWA10_isGFX10Plus_isWave64, { MCK_VGPR_32, MCK_VCC, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_VCC, MCK_ImmClampSI, MCK_ImmSDWADstSel, MCK_ImmSDWADstUnused, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, }, 23534 { 26156 /* v_subrev_co_ci_u32 */, AMDGPU::V_SUBREV_CO_CI_U32_sdwa_w64_gfx10, ConvertCustom_cvtSdwaVOP2b, AMFBS_HasSDWA10_isGFX10Plus_isWave64, { MCK_VGPR_32, MCK_VCC, MCK_SDWAWithInt32InputMods, MCK_SDWAWithInt32InputMods, MCK_VCC, MCK_ImmClampSI, MCK_ImmSDWADstSel, MCK_ImmSDWADstUnused, MCK_ImmSDWASrc0Sel, MCK_ImmSDWASrc1Sel }, }, 72872 { 13222 /* v_add_co_ci_u32 */, 12 /* 2, 3 */, MCK_SDWAWithInt32InputMods, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 72873 { 13222 /* v_add_co_ci_u32 */, 32 /* 5 */, MCK_ImmClampSI, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 72874 { 13222 /* v_add_co_ci_u32 */, 64 /* 6 */, MCK_ImmSDWADstSel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 72875 { 13222 /* v_add_co_ci_u32 */, 256 /* 8 */, MCK_ImmSDWASrc0Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 72876 { 13222 /* v_add_co_ci_u32 */, 512 /* 9 */, MCK_ImmSDWASrc1Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 72877 { 13222 /* v_add_co_ci_u32 */, 128 /* 7 */, MCK_ImmSDWADstUnused, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75946 { 21959 /* v_cndmask_b32 */, 6 /* 1, 2 */, MCK_SDWAWithInt32InputMods, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75947 { 21959 /* v_cndmask_b32 */, 16 /* 4 */, MCK_ImmClampSI, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75948 { 21959 /* v_cndmask_b32 */, 32 /* 5 */, MCK_ImmSDWADstSel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75949 { 21959 /* v_cndmask_b32 */, 128 /* 7 */, MCK_ImmSDWASrc0Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75950 { 21959 /* v_cndmask_b32 */, 256 /* 8 */, MCK_ImmSDWASrc1Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 75951 { 21959 /* v_cndmask_b32 */, 64 /* 6 */, MCK_ImmSDWADstUnused, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79674 { 25959 /* v_sub_co_ci_u32 */, 12 /* 2, 3 */, MCK_SDWAWithInt32InputMods, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79675 { 25959 /* v_sub_co_ci_u32 */, 32 /* 5 */, MCK_ImmClampSI, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79676 { 25959 /* v_sub_co_ci_u32 */, 64 /* 6 */, MCK_ImmSDWADstSel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79677 { 25959 /* v_sub_co_ci_u32 */, 256 /* 8 */, MCK_ImmSDWASrc0Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79678 { 25959 /* v_sub_co_ci_u32 */, 512 /* 9 */, MCK_ImmSDWASrc1Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79679 { 25959 /* v_sub_co_ci_u32 */, 128 /* 7 */, MCK_ImmSDWADstUnused, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79921 { 26156 /* v_subrev_co_ci_u32 */, 12 /* 2, 3 */, MCK_SDWAWithInt32InputMods, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79922 { 26156 /* v_subrev_co_ci_u32 */, 32 /* 5 */, MCK_ImmClampSI, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79923 { 26156 /* v_subrev_co_ci_u32 */, 64 /* 6 */, MCK_ImmSDWADstSel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79924 { 26156 /* v_subrev_co_ci_u32 */, 256 /* 8 */, MCK_ImmSDWASrc0Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79925 { 26156 /* v_subrev_co_ci_u32 */, 512 /* 9 */, MCK_ImmSDWASrc1Sel, AMFBS_HasSDWA10_isGFX10Plus_isWave64 }, 79926 { 26156 /* v_subrev_co_ci_u32 */, 128 /* 7 */, MCK_ImmSDWADstUnused, AMFBS_HasSDWA10_isGFX10Plus_isWave64 },