|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc20205 { 18828 /* v_cmpx_class_f32_e32 */, AMDGPU::V_CMPX_CLASS_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20215 { 18866 /* v_cmpx_class_f64_e32 */, AMDGPU::V_CMPX_CLASS_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VGPR_32 }, },
20231 { 18933 /* v_cmpx_eq_f32_e32 */, AMDGPU::V_CMPX_EQ_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20241 { 18965 /* v_cmpx_eq_f64_e32 */, AMDGPU::V_CMPX_EQ_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20257 { 19029 /* v_cmpx_eq_i32_e32 */, AMDGPU::V_CMPX_EQ_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20267 { 19061 /* v_cmpx_eq_i64_e32 */, AMDGPU::V_CMPX_EQ_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20283 { 19125 /* v_cmpx_eq_u32_e32 */, AMDGPU::V_CMPX_EQ_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20293 { 19157 /* v_cmpx_eq_u64_e32 */, AMDGPU::V_CMPX_EQ_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20309 { 19218 /* v_cmpx_f_f32_e32 */, AMDGPU::V_CMPX_F_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20319 { 19248 /* v_cmpx_f_f64_e32 */, AMDGPU::V_CMPX_F_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20333 { 19308 /* v_cmpx_f_i32_e32 */, AMDGPU::V_CMPX_F_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20343 { 19338 /* v_cmpx_f_i64_e32 */, AMDGPU::V_CMPX_F_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20357 { 19398 /* v_cmpx_f_u32_e32 */, AMDGPU::V_CMPX_F_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20367 { 19428 /* v_cmpx_f_u64_e32 */, AMDGPU::V_CMPX_F_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20383 { 19491 /* v_cmpx_ge_f32_e32 */, AMDGPU::V_CMPX_GE_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20393 { 19523 /* v_cmpx_ge_f64_e32 */, AMDGPU::V_CMPX_GE_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20409 { 19587 /* v_cmpx_ge_i32_e32 */, AMDGPU::V_CMPX_GE_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20419 { 19619 /* v_cmpx_ge_i64_e32 */, AMDGPU::V_CMPX_GE_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20435 { 19683 /* v_cmpx_ge_u32_e32 */, AMDGPU::V_CMPX_GE_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20445 { 19715 /* v_cmpx_ge_u64_e32 */, AMDGPU::V_CMPX_GE_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20461 { 19779 /* v_cmpx_gt_f32_e32 */, AMDGPU::V_CMPX_GT_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20471 { 19811 /* v_cmpx_gt_f64_e32 */, AMDGPU::V_CMPX_GT_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20487 { 19875 /* v_cmpx_gt_i32_e32 */, AMDGPU::V_CMPX_GT_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20497 { 19907 /* v_cmpx_gt_i64_e32 */, AMDGPU::V_CMPX_GT_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20513 { 19971 /* v_cmpx_gt_u32_e32 */, AMDGPU::V_CMPX_GT_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20523 { 20003 /* v_cmpx_gt_u64_e32 */, AMDGPU::V_CMPX_GT_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20539 { 20067 /* v_cmpx_le_f32_e32 */, AMDGPU::V_CMPX_LE_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20549 { 20099 /* v_cmpx_le_f64_e32 */, AMDGPU::V_CMPX_LE_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20565 { 20163 /* v_cmpx_le_i32_e32 */, AMDGPU::V_CMPX_LE_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20575 { 20195 /* v_cmpx_le_i64_e32 */, AMDGPU::V_CMPX_LE_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20591 { 20259 /* v_cmpx_le_u32_e32 */, AMDGPU::V_CMPX_LE_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20601 { 20291 /* v_cmpx_le_u64_e32 */, AMDGPU::V_CMPX_LE_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20617 { 20355 /* v_cmpx_lg_f32_e32 */, AMDGPU::V_CMPX_LG_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20627 { 20387 /* v_cmpx_lg_f64_e32 */, AMDGPU::V_CMPX_LG_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20643 { 20451 /* v_cmpx_lt_f32_e32 */, AMDGPU::V_CMPX_LT_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20653 { 20483 /* v_cmpx_lt_f64_e32 */, AMDGPU::V_CMPX_LT_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20669 { 20547 /* v_cmpx_lt_i32_e32 */, AMDGPU::V_CMPX_LT_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20679 { 20579 /* v_cmpx_lt_i64_e32 */, AMDGPU::V_CMPX_LT_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20695 { 20643 /* v_cmpx_lt_u32_e32 */, AMDGPU::V_CMPX_LT_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20705 { 20675 /* v_cmpx_lt_u64_e32 */, AMDGPU::V_CMPX_LT_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20721 { 20739 /* v_cmpx_ne_i32_e32 */, AMDGPU::V_CMPX_NE_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20731 { 20771 /* v_cmpx_ne_i64_e32 */, AMDGPU::V_CMPX_NE_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20747 { 20835 /* v_cmpx_ne_u32_e32 */, AMDGPU::V_CMPX_NE_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20757 { 20867 /* v_cmpx_ne_u64_e32 */, AMDGPU::V_CMPX_NE_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20773 { 20934 /* v_cmpx_neq_f32_e32 */, AMDGPU::V_CMPX_NEQ_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20783 { 20968 /* v_cmpx_neq_f64_e32 */, AMDGPU::V_CMPX_NEQ_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20799 { 21036 /* v_cmpx_nge_f32_e32 */, AMDGPU::V_CMPX_NGE_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20809 { 21070 /* v_cmpx_nge_f64_e32 */, AMDGPU::V_CMPX_NGE_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20825 { 21138 /* v_cmpx_ngt_f32_e32 */, AMDGPU::V_CMPX_NGT_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20835 { 21172 /* v_cmpx_ngt_f64_e32 */, AMDGPU::V_CMPX_NGT_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20851 { 21240 /* v_cmpx_nle_f32_e32 */, AMDGPU::V_CMPX_NLE_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20861 { 21274 /* v_cmpx_nle_f64_e32 */, AMDGPU::V_CMPX_NLE_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20877 { 21342 /* v_cmpx_nlg_f32_e32 */, AMDGPU::V_CMPX_NLG_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20887 { 21376 /* v_cmpx_nlg_f64_e32 */, AMDGPU::V_CMPX_NLG_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20903 { 21444 /* v_cmpx_nlt_f32_e32 */, AMDGPU::V_CMPX_NLT_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20913 { 21478 /* v_cmpx_nlt_f64_e32 */, AMDGPU::V_CMPX_NLT_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20929 { 21540 /* v_cmpx_o_f32_e32 */, AMDGPU::V_CMPX_O_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
20939 { 21570 /* v_cmpx_o_f64_e32 */, AMDGPU::V_CMPX_O_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
20953 { 21630 /* v_cmpx_t_i32_e32 */, AMDGPU::V_CMPX_T_I32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20963 { 21660 /* v_cmpx_t_i64_e32 */, AMDGPU::V_CMPX_T_I64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
20977 { 21720 /* v_cmpx_t_u32_e32 */, AMDGPU::V_CMPX_T_U32_e32_gfx10, Convert__VSrcB321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VGPR_32 }, },
20987 { 21750 /* v_cmpx_t_u64_e32 */, AMDGPU::V_CMPX_T_U64_e32_gfx10, Convert__VSrcB641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VReg_64 }, },
21003 { 21816 /* v_cmpx_tru_f32_e32 */, AMDGPU::V_CMPX_TRU_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
21013 { 21850 /* v_cmpx_tru_f64_e32 */, AMDGPU::V_CMPX_TRU_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
21029 { 21912 /* v_cmpx_u_f32_e32 */, AMDGPU::V_CMPX_U_F32_e32_gfx10, Convert__VSrcF321_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF32, MCK_VGPR_32 }, },
21039 { 21942 /* v_cmpx_u_f64_e32 */, AMDGPU::V_CMPX_U_F64_e32_gfx10, Convert__VSrcF641_0__Reg1_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcF64, MCK_VReg_64 }, },
21847 { 18811 /* v_cmpx_class_f32 */, AMDGPU::V_CMPX_CLASS_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_VSrcB32 }, },
21850 { 18849 /* v_cmpx_class_f64 */, AMDGPU::V_CMPX_CLASS_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_VSrcB32 }, },
21855 { 18919 /* v_cmpx_eq_f32 */, AMDGPU::V_CMPX_EQ_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21858 { 18951 /* v_cmpx_eq_f64 */, AMDGPU::V_CMPX_EQ_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21863 { 19015 /* v_cmpx_eq_i32 */, AMDGPU::V_CMPX_EQ_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21866 { 19047 /* v_cmpx_eq_i64 */, AMDGPU::V_CMPX_EQ_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21871 { 19111 /* v_cmpx_eq_u32 */, AMDGPU::V_CMPX_EQ_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21874 { 19143 /* v_cmpx_eq_u64 */, AMDGPU::V_CMPX_EQ_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21879 { 19205 /* v_cmpx_f_f32 */, AMDGPU::V_CMPX_F_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21882 { 19235 /* v_cmpx_f_f64 */, AMDGPU::V_CMPX_F_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21886 { 19295 /* v_cmpx_f_i32 */, AMDGPU::V_CMPX_F_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21889 { 19325 /* v_cmpx_f_i64 */, AMDGPU::V_CMPX_F_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21893 { 19385 /* v_cmpx_f_u32 */, AMDGPU::V_CMPX_F_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21896 { 19415 /* v_cmpx_f_u64 */, AMDGPU::V_CMPX_F_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21901 { 19477 /* v_cmpx_ge_f32 */, AMDGPU::V_CMPX_GE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21904 { 19509 /* v_cmpx_ge_f64 */, AMDGPU::V_CMPX_GE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21909 { 19573 /* v_cmpx_ge_i32 */, AMDGPU::V_CMPX_GE_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21912 { 19605 /* v_cmpx_ge_i64 */, AMDGPU::V_CMPX_GE_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21917 { 19669 /* v_cmpx_ge_u32 */, AMDGPU::V_CMPX_GE_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21920 { 19701 /* v_cmpx_ge_u64 */, AMDGPU::V_CMPX_GE_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21925 { 19765 /* v_cmpx_gt_f32 */, AMDGPU::V_CMPX_GT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21928 { 19797 /* v_cmpx_gt_f64 */, AMDGPU::V_CMPX_GT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21933 { 19861 /* v_cmpx_gt_i32 */, AMDGPU::V_CMPX_GT_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21936 { 19893 /* v_cmpx_gt_i64 */, AMDGPU::V_CMPX_GT_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21941 { 19957 /* v_cmpx_gt_u32 */, AMDGPU::V_CMPX_GT_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21944 { 19989 /* v_cmpx_gt_u64 */, AMDGPU::V_CMPX_GT_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21949 { 20053 /* v_cmpx_le_f32 */, AMDGPU::V_CMPX_LE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21952 { 20085 /* v_cmpx_le_f64 */, AMDGPU::V_CMPX_LE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21957 { 20149 /* v_cmpx_le_i32 */, AMDGPU::V_CMPX_LE_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21960 { 20181 /* v_cmpx_le_i64 */, AMDGPU::V_CMPX_LE_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21965 { 20245 /* v_cmpx_le_u32 */, AMDGPU::V_CMPX_LE_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21968 { 20277 /* v_cmpx_le_u64 */, AMDGPU::V_CMPX_LE_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21973 { 20341 /* v_cmpx_lg_f32 */, AMDGPU::V_CMPX_LG_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21976 { 20373 /* v_cmpx_lg_f64 */, AMDGPU::V_CMPX_LG_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21981 { 20437 /* v_cmpx_lt_f32 */, AMDGPU::V_CMPX_LT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
21984 { 20469 /* v_cmpx_lt_f64 */, AMDGPU::V_CMPX_LT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
21989 { 20533 /* v_cmpx_lt_i32 */, AMDGPU::V_CMPX_LT_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
21992 { 20565 /* v_cmpx_lt_i64 */, AMDGPU::V_CMPX_LT_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
21997 { 20629 /* v_cmpx_lt_u32 */, AMDGPU::V_CMPX_LT_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
22000 { 20661 /* v_cmpx_lt_u64 */, AMDGPU::V_CMPX_LT_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
22005 { 20725 /* v_cmpx_ne_i32 */, AMDGPU::V_CMPX_NE_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
22008 { 20757 /* v_cmpx_ne_i64 */, AMDGPU::V_CMPX_NE_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
22013 { 20821 /* v_cmpx_ne_u32 */, AMDGPU::V_CMPX_NE_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
22016 { 20853 /* v_cmpx_ne_u64 */, AMDGPU::V_CMPX_NE_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
22021 { 20919 /* v_cmpx_neq_f32 */, AMDGPU::V_CMPX_NEQ_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22024 { 20953 /* v_cmpx_neq_f64 */, AMDGPU::V_CMPX_NEQ_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22029 { 21021 /* v_cmpx_nge_f32 */, AMDGPU::V_CMPX_NGE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22032 { 21055 /* v_cmpx_nge_f64 */, AMDGPU::V_CMPX_NGE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22037 { 21123 /* v_cmpx_ngt_f32 */, AMDGPU::V_CMPX_NGT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22040 { 21157 /* v_cmpx_ngt_f64 */, AMDGPU::V_CMPX_NGT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22045 { 21225 /* v_cmpx_nle_f32 */, AMDGPU::V_CMPX_NLE_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22048 { 21259 /* v_cmpx_nle_f64 */, AMDGPU::V_CMPX_NLE_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22053 { 21327 /* v_cmpx_nlg_f32 */, AMDGPU::V_CMPX_NLG_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22056 { 21361 /* v_cmpx_nlg_f64 */, AMDGPU::V_CMPX_NLG_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22061 { 21429 /* v_cmpx_nlt_f32 */, AMDGPU::V_CMPX_NLT_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22064 { 21463 /* v_cmpx_nlt_f64 */, AMDGPU::V_CMPX_NLT_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22069 { 21527 /* v_cmpx_o_f32 */, AMDGPU::V_CMPX_O_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22072 { 21557 /* v_cmpx_o_f64 */, AMDGPU::V_CMPX_O_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22076 { 21617 /* v_cmpx_t_i32 */, AMDGPU::V_CMPX_T_I32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
22079 { 21647 /* v_cmpx_t_i64 */, AMDGPU::V_CMPX_T_I64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
22083 { 21707 /* v_cmpx_t_u32 */, AMDGPU::V_CMPX_T_U32_e64_gfx10, Convert__VSrcB321_0__VSrcB321_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB32, MCK_VSrcB32 }, },
22086 { 21737 /* v_cmpx_t_u64 */, AMDGPU::V_CMPX_T_U64_e64_gfx10, Convert__VSrcB641_0__VSrcB641_1, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_VSrcB64, MCK_VSrcB64 }, },
22091 { 21801 /* v_cmpx_tru_f32 */, AMDGPU::V_CMPX_TRU_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22094 { 21835 /* v_cmpx_tru_f64 */, AMDGPU::V_CMPX_TRU_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
22099 { 21899 /* v_cmpx_u_f32 */, AMDGPU::V_CMPX_U_F32_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP32InputMods, MCK_RegOrImmWithFP32InputMods, MCK_ImmClampSI }, },
22102 { 21929 /* v_cmpx_u_f64 */, AMDGPU::V_CMPX_U_F64_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_HasNoSdstCMPX_isGFX10Plus, { MCK_RegOrImmWithFP64InputMods, MCK_RegOrImmWithFP64InputMods, MCK_ImmClampSI }, },
74777 { 18811 /* v_cmpx_class_f32 */, 1 /* 0 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74796 { 18849 /* v_cmpx_class_f64 */, 1 /* 0 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74817 { 18919 /* v_cmpx_eq_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74818 { 18919 /* v_cmpx_eq_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74836 { 18951 /* v_cmpx_eq_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74837 { 18951 /* v_cmpx_eq_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74914 { 19205 /* v_cmpx_f_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74915 { 19205 /* v_cmpx_f_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74933 { 19235 /* v_cmpx_f_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
74934 { 19235 /* v_cmpx_f_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75005 { 19477 /* v_cmpx_ge_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75006 { 19477 /* v_cmpx_ge_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75024 { 19509 /* v_cmpx_ge_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75025 { 19509 /* v_cmpx_ge_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75102 { 19765 /* v_cmpx_gt_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75103 { 19765 /* v_cmpx_gt_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75121 { 19797 /* v_cmpx_gt_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75122 { 19797 /* v_cmpx_gt_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75199 { 20053 /* v_cmpx_le_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75200 { 20053 /* v_cmpx_le_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75218 { 20085 /* v_cmpx_le_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75219 { 20085 /* v_cmpx_le_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75296 { 20341 /* v_cmpx_lg_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75297 { 20341 /* v_cmpx_lg_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75315 { 20373 /* v_cmpx_lg_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75316 { 20373 /* v_cmpx_lg_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75339 { 20437 /* v_cmpx_lt_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75340 { 20437 /* v_cmpx_lt_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75358 { 20469 /* v_cmpx_lt_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75359 { 20469 /* v_cmpx_lt_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75490 { 20919 /* v_cmpx_neq_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75491 { 20919 /* v_cmpx_neq_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75509 { 20953 /* v_cmpx_neq_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75510 { 20953 /* v_cmpx_neq_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75533 { 21021 /* v_cmpx_nge_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75534 { 21021 /* v_cmpx_nge_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75552 { 21055 /* v_cmpx_nge_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75553 { 21055 /* v_cmpx_nge_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75576 { 21123 /* v_cmpx_ngt_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75577 { 21123 /* v_cmpx_ngt_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75595 { 21157 /* v_cmpx_ngt_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75596 { 21157 /* v_cmpx_ngt_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75619 { 21225 /* v_cmpx_nle_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75620 { 21225 /* v_cmpx_nle_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75638 { 21259 /* v_cmpx_nle_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75639 { 21259 /* v_cmpx_nle_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75662 { 21327 /* v_cmpx_nlg_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75663 { 21327 /* v_cmpx_nlg_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75681 { 21361 /* v_cmpx_nlg_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75682 { 21361 /* v_cmpx_nlg_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75705 { 21429 /* v_cmpx_nlt_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75706 { 21429 /* v_cmpx_nlt_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75724 { 21463 /* v_cmpx_nlt_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75725 { 21463 /* v_cmpx_nlt_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75748 { 21527 /* v_cmpx_o_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75749 { 21527 /* v_cmpx_o_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75767 { 21557 /* v_cmpx_o_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75768 { 21557 /* v_cmpx_o_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75839 { 21801 /* v_cmpx_tru_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75840 { 21801 /* v_cmpx_tru_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75858 { 21835 /* v_cmpx_tru_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75859 { 21835 /* v_cmpx_tru_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75882 { 21899 /* v_cmpx_u_f32 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75883 { 21899 /* v_cmpx_u_f32 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75901 { 21929 /* v_cmpx_u_f64 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP64InputMods, AMFBS_HasNoSdstCMPX_isGFX10Plus },
75902 { 21929 /* v_cmpx_u_f64 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_HasNoSdstCMPX_isGFX10Plus },