|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18563 { 12271 /* scratch_load_dword */, AMDGPU::SCRATCH_LOAD_DWORD_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18565 { 12271 /* scratch_load_dword */, AMDGPU::SCRATCH_LOAD_DWORD_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18567 { 12290 /* scratch_load_dwordx2 */, AMDGPU::SCRATCH_LOAD_DWORDX2_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_64, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18569 { 12290 /* scratch_load_dwordx2 */, AMDGPU::SCRATCH_LOAD_DWORDX2_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18571 { 12311 /* scratch_load_dwordx3 */, AMDGPU::SCRATCH_LOAD_DWORDX3_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_96, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18573 { 12311 /* scratch_load_dwordx3 */, AMDGPU::SCRATCH_LOAD_DWORDX3_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_96, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18575 { 12332 /* scratch_load_dwordx4 */, AMDGPU::SCRATCH_LOAD_DWORDX4_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_128, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18577 { 12332 /* scratch_load_dwordx4 */, AMDGPU::SCRATCH_LOAD_DWORDX4_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VReg_128, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18579 { 12353 /* scratch_load_sbyte */, AMDGPU::SCRATCH_LOAD_SBYTE_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18581 { 12353 /* scratch_load_sbyte */, AMDGPU::SCRATCH_LOAD_SBYTE_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18583 { 12372 /* scratch_load_sbyte_d16 */, AMDGPU::SCRATCH_LOAD_SBYTE_D16_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18585 { 12372 /* scratch_load_sbyte_d16 */, AMDGPU::SCRATCH_LOAD_SBYTE_D16_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18587 { 12395 /* scratch_load_sbyte_d16_hi */, AMDGPU::SCRATCH_LOAD_SBYTE_D16_HI_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18589 { 12395 /* scratch_load_sbyte_d16_hi */, AMDGPU::SCRATCH_LOAD_SBYTE_D16_HI_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18591 { 12421 /* scratch_load_short_d16 */, AMDGPU::SCRATCH_LOAD_SHORT_D16_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18593 { 12421 /* scratch_load_short_d16 */, AMDGPU::SCRATCH_LOAD_SHORT_D16_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18595 { 12444 /* scratch_load_short_d16_hi */, AMDGPU::SCRATCH_LOAD_SHORT_D16_HI_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18597 { 12444 /* scratch_load_short_d16_hi */, AMDGPU::SCRATCH_LOAD_SHORT_D16_HI_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18599 { 12470 /* scratch_load_sshort */, AMDGPU::SCRATCH_LOAD_SSHORT_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18601 { 12470 /* scratch_load_sshort */, AMDGPU::SCRATCH_LOAD_SSHORT_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18603 { 12490 /* scratch_load_ubyte */, AMDGPU::SCRATCH_LOAD_UBYTE_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18605 { 12490 /* scratch_load_ubyte */, AMDGPU::SCRATCH_LOAD_UBYTE_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18607 { 12509 /* scratch_load_ubyte_d16 */, AMDGPU::SCRATCH_LOAD_UBYTE_D16_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18609 { 12509 /* scratch_load_ubyte_d16 */, AMDGPU::SCRATCH_LOAD_UBYTE_D16_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18611 { 12532 /* scratch_load_ubyte_d16_hi */, AMDGPU::SCRATCH_LOAD_UBYTE_D16_HI_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18613 { 12532 /* scratch_load_ubyte_d16_hi */, AMDGPU::SCRATCH_LOAD_UBYTE_D16_HI_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18615 { 12558 /* scratch_load_ushort */, AMDGPU::SCRATCH_LOAD_USHORT_SADDR_gfx10, Convert__Reg1_0__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_off, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18617 { 12558 /* scratch_load_ushort */, AMDGPU::SCRATCH_LOAD_USHORT_gfx10, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18619 { 12578 /* scratch_store_byte */, AMDGPU::SCRATCH_STORE_BYTE_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VGPR_32, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18621 { 12578 /* scratch_store_byte */, AMDGPU::SCRATCH_STORE_BYTE_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18623 { 12597 /* scratch_store_byte_d16_hi */, AMDGPU::SCRATCH_STORE_BYTE_D16_HI_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VGPR_32, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18625 { 12597 /* scratch_store_byte_d16_hi */, AMDGPU::SCRATCH_STORE_BYTE_D16_HI_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18627 { 12623 /* scratch_store_dword */, AMDGPU::SCRATCH_STORE_DWORD_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VGPR_32, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18629 { 12623 /* scratch_store_dword */, AMDGPU::SCRATCH_STORE_DWORD_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18631 { 12643 /* scratch_store_dwordx2 */, AMDGPU::SCRATCH_STORE_DWORDX2_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VReg_64, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18633 { 12643 /* scratch_store_dwordx2 */, AMDGPU::SCRATCH_STORE_DWORDX2_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18635 { 12665 /* scratch_store_dwordx3 */, AMDGPU::SCRATCH_STORE_DWORDX3_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VReg_96, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18637 { 12665 /* scratch_store_dwordx3 */, AMDGPU::SCRATCH_STORE_DWORDX3_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_96, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18639 { 12687 /* scratch_store_dwordx4 */, AMDGPU::SCRATCH_STORE_DWORDX4_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VReg_128, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18641 { 12687 /* scratch_store_dwordx4 */, AMDGPU::SCRATCH_STORE_DWORDX4_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VReg_128, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18643 { 12709 /* scratch_store_short */, AMDGPU::SCRATCH_STORE_SHORT_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VGPR_32, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18645 { 12709 /* scratch_store_short */, AMDGPU::SCRATCH_STORE_SHORT_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18647 { 12729 /* scratch_store_short_d16_hi */, AMDGPU::SCRATCH_STORE_SHORT_D16_HI_SADDR_gfx10, Convert__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_off, MCK_VGPR_32, MCK_SReg_32_XEXEC_HI, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
18649 { 12729 /* scratch_store_short_d16_hi */, AMDGPU::SCRATCH_STORE_SHORT_D16_HI_gfx10, Convert__Reg1_1__Reg1_0__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatScratchInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
71096 { 12271 /* scratch_load_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71097 { 12271 /* scratch_load_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71098 { 12271 /* scratch_load_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71099 { 12271 /* scratch_load_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71104 { 12271 /* scratch_load_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71105 { 12271 /* scratch_load_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71106 { 12271 /* scratch_load_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71107 { 12271 /* scratch_load_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71112 { 12290 /* scratch_load_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71113 { 12290 /* scratch_load_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71114 { 12290 /* scratch_load_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71115 { 12290 /* scratch_load_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71120 { 12290 /* scratch_load_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71121 { 12290 /* scratch_load_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71122 { 12290 /* scratch_load_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71123 { 12290 /* scratch_load_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71128 { 12311 /* scratch_load_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71129 { 12311 /* scratch_load_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71130 { 12311 /* scratch_load_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71131 { 12311 /* scratch_load_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71136 { 12311 /* scratch_load_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71137 { 12311 /* scratch_load_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71138 { 12311 /* scratch_load_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71139 { 12311 /* scratch_load_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71144 { 12332 /* scratch_load_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71145 { 12332 /* scratch_load_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71146 { 12332 /* scratch_load_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71147 { 12332 /* scratch_load_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71152 { 12332 /* scratch_load_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71153 { 12332 /* scratch_load_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71154 { 12332 /* scratch_load_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71155 { 12332 /* scratch_load_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71160 { 12353 /* scratch_load_sbyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71161 { 12353 /* scratch_load_sbyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71162 { 12353 /* scratch_load_sbyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71163 { 12353 /* scratch_load_sbyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71168 { 12353 /* scratch_load_sbyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71169 { 12353 /* scratch_load_sbyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71170 { 12353 /* scratch_load_sbyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71171 { 12353 /* scratch_load_sbyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71176 { 12372 /* scratch_load_sbyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71177 { 12372 /* scratch_load_sbyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71178 { 12372 /* scratch_load_sbyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71179 { 12372 /* scratch_load_sbyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71184 { 12372 /* scratch_load_sbyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71185 { 12372 /* scratch_load_sbyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71186 { 12372 /* scratch_load_sbyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71187 { 12372 /* scratch_load_sbyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71192 { 12395 /* scratch_load_sbyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71193 { 12395 /* scratch_load_sbyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71194 { 12395 /* scratch_load_sbyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71195 { 12395 /* scratch_load_sbyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71200 { 12395 /* scratch_load_sbyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71201 { 12395 /* scratch_load_sbyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71202 { 12395 /* scratch_load_sbyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71203 { 12395 /* scratch_load_sbyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71208 { 12421 /* scratch_load_short_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71209 { 12421 /* scratch_load_short_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71210 { 12421 /* scratch_load_short_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71211 { 12421 /* scratch_load_short_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71216 { 12421 /* scratch_load_short_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71217 { 12421 /* scratch_load_short_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71218 { 12421 /* scratch_load_short_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71219 { 12421 /* scratch_load_short_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71224 { 12444 /* scratch_load_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71225 { 12444 /* scratch_load_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71226 { 12444 /* scratch_load_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71227 { 12444 /* scratch_load_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71232 { 12444 /* scratch_load_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71233 { 12444 /* scratch_load_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71234 { 12444 /* scratch_load_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71235 { 12444 /* scratch_load_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71240 { 12470 /* scratch_load_sshort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71241 { 12470 /* scratch_load_sshort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71242 { 12470 /* scratch_load_sshort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71243 { 12470 /* scratch_load_sshort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71248 { 12470 /* scratch_load_sshort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71249 { 12470 /* scratch_load_sshort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71250 { 12470 /* scratch_load_sshort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71251 { 12470 /* scratch_load_sshort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71256 { 12490 /* scratch_load_ubyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71257 { 12490 /* scratch_load_ubyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71258 { 12490 /* scratch_load_ubyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71259 { 12490 /* scratch_load_ubyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71264 { 12490 /* scratch_load_ubyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71265 { 12490 /* scratch_load_ubyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71266 { 12490 /* scratch_load_ubyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71267 { 12490 /* scratch_load_ubyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71272 { 12509 /* scratch_load_ubyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71273 { 12509 /* scratch_load_ubyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71274 { 12509 /* scratch_load_ubyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71275 { 12509 /* scratch_load_ubyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71280 { 12509 /* scratch_load_ubyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71281 { 12509 /* scratch_load_ubyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71282 { 12509 /* scratch_load_ubyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71283 { 12509 /* scratch_load_ubyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71288 { 12532 /* scratch_load_ubyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71289 { 12532 /* scratch_load_ubyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71290 { 12532 /* scratch_load_ubyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71291 { 12532 /* scratch_load_ubyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71296 { 12532 /* scratch_load_ubyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71297 { 12532 /* scratch_load_ubyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71298 { 12532 /* scratch_load_ubyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71299 { 12532 /* scratch_load_ubyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71304 { 12558 /* scratch_load_ushort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71305 { 12558 /* scratch_load_ushort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71306 { 12558 /* scratch_load_ushort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71307 { 12558 /* scratch_load_ushort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71312 { 12558 /* scratch_load_ushort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71313 { 12558 /* scratch_load_ushort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71314 { 12558 /* scratch_load_ushort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71315 { 12558 /* scratch_load_ushort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71320 { 12578 /* scratch_store_byte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71321 { 12578 /* scratch_store_byte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71322 { 12578 /* scratch_store_byte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71323 { 12578 /* scratch_store_byte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71328 { 12578 /* scratch_store_byte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71329 { 12578 /* scratch_store_byte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71330 { 12578 /* scratch_store_byte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71331 { 12578 /* scratch_store_byte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71336 { 12597 /* scratch_store_byte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71337 { 12597 /* scratch_store_byte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71338 { 12597 /* scratch_store_byte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71339 { 12597 /* scratch_store_byte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71344 { 12597 /* scratch_store_byte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71345 { 12597 /* scratch_store_byte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71346 { 12597 /* scratch_store_byte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71347 { 12597 /* scratch_store_byte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71352 { 12623 /* scratch_store_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71353 { 12623 /* scratch_store_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71354 { 12623 /* scratch_store_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71355 { 12623 /* scratch_store_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71360 { 12623 /* scratch_store_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71361 { 12623 /* scratch_store_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71362 { 12623 /* scratch_store_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71363 { 12623 /* scratch_store_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71368 { 12643 /* scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71369 { 12643 /* scratch_store_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71370 { 12643 /* scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71371 { 12643 /* scratch_store_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71376 { 12643 /* scratch_store_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71377 { 12643 /* scratch_store_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71378 { 12643 /* scratch_store_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71379 { 12643 /* scratch_store_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71384 { 12665 /* scratch_store_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71385 { 12665 /* scratch_store_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71386 { 12665 /* scratch_store_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71387 { 12665 /* scratch_store_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71392 { 12665 /* scratch_store_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71393 { 12665 /* scratch_store_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71394 { 12665 /* scratch_store_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71395 { 12665 /* scratch_store_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71400 { 12687 /* scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71401 { 12687 /* scratch_store_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71402 { 12687 /* scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71403 { 12687 /* scratch_store_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71408 { 12687 /* scratch_store_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71409 { 12687 /* scratch_store_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71410 { 12687 /* scratch_store_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71411 { 12687 /* scratch_store_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71416 { 12709 /* scratch_store_short */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71417 { 12709 /* scratch_store_short */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71418 { 12709 /* scratch_store_short */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71419 { 12709 /* scratch_store_short */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71424 { 12709 /* scratch_store_short */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71425 { 12709 /* scratch_store_short */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71426 { 12709 /* scratch_store_short */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71427 { 12709 /* scratch_store_short */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71432 { 12729 /* scratch_store_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71433 { 12729 /* scratch_store_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71434 { 12729 /* scratch_store_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71435 { 12729 /* scratch_store_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71440 { 12729 /* scratch_store_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71441 { 12729 /* scratch_store_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71442 { 12729 /* scratch_store_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },
71443 { 12729 /* scratch_store_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatScratchInsts_isGFX10Plus },