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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc13113 { 4992 /* global_atomic_add */, AMDGPU::GLOBAL_ATOMIC_ADD_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13115 { 4992 /* global_atomic_add */, AMDGPU::GLOBAL_ATOMIC_ADD_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13117 { 4992 /* global_atomic_add */, AMDGPU::GLOBAL_ATOMIC_ADD_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13119 { 4992 /* global_atomic_add */, AMDGPU::GLOBAL_ATOMIC_ADD_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13123 { 5032 /* global_atomic_add_x2 */, AMDGPU::GLOBAL_ATOMIC_ADD_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13125 { 5032 /* global_atomic_add_x2 */, AMDGPU::GLOBAL_ATOMIC_ADD_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13127 { 5032 /* global_atomic_add_x2 */, AMDGPU::GLOBAL_ATOMIC_ADD_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13129 { 5032 /* global_atomic_add_x2 */, AMDGPU::GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13131 { 5053 /* global_atomic_and */, AMDGPU::GLOBAL_ATOMIC_AND_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13133 { 5053 /* global_atomic_and */, AMDGPU::GLOBAL_ATOMIC_AND_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13135 { 5053 /* global_atomic_and */, AMDGPU::GLOBAL_ATOMIC_AND_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13137 { 5053 /* global_atomic_and */, AMDGPU::GLOBAL_ATOMIC_AND_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13139 { 5071 /* global_atomic_and_x2 */, AMDGPU::GLOBAL_ATOMIC_AND_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13141 { 5071 /* global_atomic_and_x2 */, AMDGPU::GLOBAL_ATOMIC_AND_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13143 { 5071 /* global_atomic_and_x2 */, AMDGPU::GLOBAL_ATOMIC_AND_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13145 { 5071 /* global_atomic_and_x2 */, AMDGPU::GLOBAL_ATOMIC_AND_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13147 { 5092 /* global_atomic_cmpswap */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13149 { 5092 /* global_atomic_cmpswap */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13151 { 5092 /* global_atomic_cmpswap */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13153 { 5092 /* global_atomic_cmpswap */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13155 { 5114 /* global_atomic_cmpswap_x2 */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13157 { 5114 /* global_atomic_cmpswap_x2 */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13159 { 5114 /* global_atomic_cmpswap_x2 */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_128, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13161 { 5114 /* global_atomic_cmpswap_x2 */, AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_128, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13163 { 5139 /* global_atomic_dec */, AMDGPU::GLOBAL_ATOMIC_DEC_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13165 { 5139 /* global_atomic_dec */, AMDGPU::GLOBAL_ATOMIC_DEC_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13167 { 5139 /* global_atomic_dec */, AMDGPU::GLOBAL_ATOMIC_DEC_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13169 { 5139 /* global_atomic_dec */, AMDGPU::GLOBAL_ATOMIC_DEC_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13171 { 5157 /* global_atomic_dec_x2 */, AMDGPU::GLOBAL_ATOMIC_DEC_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13173 { 5157 /* global_atomic_dec_x2 */, AMDGPU::GLOBAL_ATOMIC_DEC_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13175 { 5157 /* global_atomic_dec_x2 */, AMDGPU::GLOBAL_ATOMIC_DEC_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13177 { 5157 /* global_atomic_dec_x2 */, AMDGPU::GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13203 { 5309 /* global_atomic_inc */, AMDGPU::GLOBAL_ATOMIC_INC_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13205 { 5309 /* global_atomic_inc */, AMDGPU::GLOBAL_ATOMIC_INC_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13207 { 5309 /* global_atomic_inc */, AMDGPU::GLOBAL_ATOMIC_INC_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13209 { 5309 /* global_atomic_inc */, AMDGPU::GLOBAL_ATOMIC_INC_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13211 { 5327 /* global_atomic_inc_x2 */, AMDGPU::GLOBAL_ATOMIC_INC_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13213 { 5327 /* global_atomic_inc_x2 */, AMDGPU::GLOBAL_ATOMIC_INC_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13215 { 5327 /* global_atomic_inc_x2 */, AMDGPU::GLOBAL_ATOMIC_INC_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13217 { 5327 /* global_atomic_inc_x2 */, AMDGPU::GLOBAL_ATOMIC_INC_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13219 { 5348 /* global_atomic_or */, AMDGPU::GLOBAL_ATOMIC_OR_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13221 { 5348 /* global_atomic_or */, AMDGPU::GLOBAL_ATOMIC_OR_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13223 { 5348 /* global_atomic_or */, AMDGPU::GLOBAL_ATOMIC_OR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13225 { 5348 /* global_atomic_or */, AMDGPU::GLOBAL_ATOMIC_OR_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13227 { 5365 /* global_atomic_or_x2 */, AMDGPU::GLOBAL_ATOMIC_OR_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13229 { 5365 /* global_atomic_or_x2 */, AMDGPU::GLOBAL_ATOMIC_OR_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13231 { 5365 /* global_atomic_or_x2 */, AMDGPU::GLOBAL_ATOMIC_OR_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13233 { 5365 /* global_atomic_or_x2 */, AMDGPU::GLOBAL_ATOMIC_OR_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13237 { 5410 /* global_atomic_smax */, AMDGPU::GLOBAL_ATOMIC_SMAX_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13239 { 5410 /* global_atomic_smax */, AMDGPU::GLOBAL_ATOMIC_SMAX_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13241 { 5410 /* global_atomic_smax */, AMDGPU::GLOBAL_ATOMIC_SMAX_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13243 { 5410 /* global_atomic_smax */, AMDGPU::GLOBAL_ATOMIC_SMAX_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13245 { 5429 /* global_atomic_smax_x2 */, AMDGPU::GLOBAL_ATOMIC_SMAX_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13247 { 5429 /* global_atomic_smax_x2 */, AMDGPU::GLOBAL_ATOMIC_SMAX_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13249 { 5429 /* global_atomic_smax_x2 */, AMDGPU::GLOBAL_ATOMIC_SMAX_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13251 { 5429 /* global_atomic_smax_x2 */, AMDGPU::GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13253 { 5451 /* global_atomic_smin */, AMDGPU::GLOBAL_ATOMIC_SMIN_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13255 { 5451 /* global_atomic_smin */, AMDGPU::GLOBAL_ATOMIC_SMIN_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13257 { 5451 /* global_atomic_smin */, AMDGPU::GLOBAL_ATOMIC_SMIN_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13259 { 5451 /* global_atomic_smin */, AMDGPU::GLOBAL_ATOMIC_SMIN_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13261 { 5470 /* global_atomic_smin_x2 */, AMDGPU::GLOBAL_ATOMIC_SMIN_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13263 { 5470 /* global_atomic_smin_x2 */, AMDGPU::GLOBAL_ATOMIC_SMIN_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13265 { 5470 /* global_atomic_smin_x2 */, AMDGPU::GLOBAL_ATOMIC_SMIN_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13267 { 5470 /* global_atomic_smin_x2 */, AMDGPU::GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13269 { 5492 /* global_atomic_sub */, AMDGPU::GLOBAL_ATOMIC_SUB_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13271 { 5492 /* global_atomic_sub */, AMDGPU::GLOBAL_ATOMIC_SUB_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13273 { 5492 /* global_atomic_sub */, AMDGPU::GLOBAL_ATOMIC_SUB_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13275 { 5492 /* global_atomic_sub */, AMDGPU::GLOBAL_ATOMIC_SUB_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13277 { 5510 /* global_atomic_sub_x2 */, AMDGPU::GLOBAL_ATOMIC_SUB_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13279 { 5510 /* global_atomic_sub_x2 */, AMDGPU::GLOBAL_ATOMIC_SUB_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13281 { 5510 /* global_atomic_sub_x2 */, AMDGPU::GLOBAL_ATOMIC_SUB_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13283 { 5510 /* global_atomic_sub_x2 */, AMDGPU::GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13285 { 5531 /* global_atomic_swap */, AMDGPU::GLOBAL_ATOMIC_SWAP_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13287 { 5531 /* global_atomic_swap */, AMDGPU::GLOBAL_ATOMIC_SWAP_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13289 { 5531 /* global_atomic_swap */, AMDGPU::GLOBAL_ATOMIC_SWAP_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13291 { 5531 /* global_atomic_swap */, AMDGPU::GLOBAL_ATOMIC_SWAP_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13293 { 5550 /* global_atomic_swap_x2 */, AMDGPU::GLOBAL_ATOMIC_SWAP_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13295 { 5550 /* global_atomic_swap_x2 */, AMDGPU::GLOBAL_ATOMIC_SWAP_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13297 { 5550 /* global_atomic_swap_x2 */, AMDGPU::GLOBAL_ATOMIC_SWAP_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13299 { 5550 /* global_atomic_swap_x2 */, AMDGPU::GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13301 { 5572 /* global_atomic_umax */, AMDGPU::GLOBAL_ATOMIC_UMAX_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13303 { 5572 /* global_atomic_umax */, AMDGPU::GLOBAL_ATOMIC_UMAX_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13305 { 5572 /* global_atomic_umax */, AMDGPU::GLOBAL_ATOMIC_UMAX_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13307 { 5572 /* global_atomic_umax */, AMDGPU::GLOBAL_ATOMIC_UMAX_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13309 { 5591 /* global_atomic_umax_x2 */, AMDGPU::GLOBAL_ATOMIC_UMAX_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13311 { 5591 /* global_atomic_umax_x2 */, AMDGPU::GLOBAL_ATOMIC_UMAX_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13313 { 5591 /* global_atomic_umax_x2 */, AMDGPU::GLOBAL_ATOMIC_UMAX_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13315 { 5591 /* global_atomic_umax_x2 */, AMDGPU::GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13317 { 5613 /* global_atomic_umin */, AMDGPU::GLOBAL_ATOMIC_UMIN_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13319 { 5613 /* global_atomic_umin */, AMDGPU::GLOBAL_ATOMIC_UMIN_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13321 { 5613 /* global_atomic_umin */, AMDGPU::GLOBAL_ATOMIC_UMIN_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13323 { 5613 /* global_atomic_umin */, AMDGPU::GLOBAL_ATOMIC_UMIN_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13325 { 5632 /* global_atomic_umin_x2 */, AMDGPU::GLOBAL_ATOMIC_UMIN_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13327 { 5632 /* global_atomic_umin_x2 */, AMDGPU::GLOBAL_ATOMIC_UMIN_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13329 { 5632 /* global_atomic_umin_x2 */, AMDGPU::GLOBAL_ATOMIC_UMIN_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13331 { 5632 /* global_atomic_umin_x2 */, AMDGPU::GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13333 { 5654 /* global_atomic_xor */, AMDGPU::GLOBAL_ATOMIC_XOR_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13335 { 5654 /* global_atomic_xor */, AMDGPU::GLOBAL_ATOMIC_XOR_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13337 { 5654 /* global_atomic_xor */, AMDGPU::GLOBAL_ATOMIC_XOR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13339 { 5654 /* global_atomic_xor */, AMDGPU::GLOBAL_ATOMIC_XOR_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13341 { 5672 /* global_atomic_xor_x2 */, AMDGPU::GLOBAL_ATOMIC_XOR_X2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13343 { 5672 /* global_atomic_xor_x2 */, AMDGPU::GLOBAL_ATOMIC_XOR_X2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmSLC1_4, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmSLC }, },
13345 { 5672 /* global_atomic_xor_x2 */, AMDGPU::GLOBAL_ATOMIC_XOR_X2_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13347 { 5672 /* global_atomic_xor_x2 */, AMDGPU::GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_vi, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmFlatOffset1_4__ImmSLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_glc, MCK_ImmSLC }, },
13349 { 5693 /* global_load_dword */, AMDGPU::GLOBAL_LOAD_DWORD_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13351 { 5693 /* global_load_dword */, AMDGPU::GLOBAL_LOAD_DWORD_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13353 { 5711 /* global_load_dwordx2 */, AMDGPU::GLOBAL_LOAD_DWORDX2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13355 { 5711 /* global_load_dwordx2 */, AMDGPU::GLOBAL_LOAD_DWORDX2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13357 { 5731 /* global_load_dwordx3 */, AMDGPU::GLOBAL_LOAD_DWORDX3_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13359 { 5731 /* global_load_dwordx3 */, AMDGPU::GLOBAL_LOAD_DWORDX3_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_96, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13361 { 5751 /* global_load_dwordx4 */, AMDGPU::GLOBAL_LOAD_DWORDX4_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13363 { 5751 /* global_load_dwordx4 */, AMDGPU::GLOBAL_LOAD_DWORDX4_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_128, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13365 { 5771 /* global_load_sbyte */, AMDGPU::GLOBAL_LOAD_SBYTE_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13367 { 5771 /* global_load_sbyte */, AMDGPU::GLOBAL_LOAD_SBYTE_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13369 { 5789 /* global_load_sbyte_d16 */, AMDGPU::GLOBAL_LOAD_SBYTE_D16_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13371 { 5789 /* global_load_sbyte_d16 */, AMDGPU::GLOBAL_LOAD_SBYTE_D16_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13373 { 5811 /* global_load_sbyte_d16_hi */, AMDGPU::GLOBAL_LOAD_SBYTE_D16_HI_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13375 { 5811 /* global_load_sbyte_d16_hi */, AMDGPU::GLOBAL_LOAD_SBYTE_D16_HI_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13377 { 5836 /* global_load_short_d16 */, AMDGPU::GLOBAL_LOAD_SHORT_D16_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13379 { 5836 /* global_load_short_d16 */, AMDGPU::GLOBAL_LOAD_SHORT_D16_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13381 { 5858 /* global_load_short_d16_hi */, AMDGPU::GLOBAL_LOAD_SHORT_D16_HI_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13383 { 5858 /* global_load_short_d16_hi */, AMDGPU::GLOBAL_LOAD_SHORT_D16_HI_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13385 { 5883 /* global_load_sshort */, AMDGPU::GLOBAL_LOAD_SSHORT_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13387 { 5883 /* global_load_sshort */, AMDGPU::GLOBAL_LOAD_SSHORT_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13389 { 5902 /* global_load_ubyte */, AMDGPU::GLOBAL_LOAD_UBYTE_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13391 { 5902 /* global_load_ubyte */, AMDGPU::GLOBAL_LOAD_UBYTE_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13393 { 5920 /* global_load_ubyte_d16 */, AMDGPU::GLOBAL_LOAD_UBYTE_D16_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13395 { 5920 /* global_load_ubyte_d16 */, AMDGPU::GLOBAL_LOAD_UBYTE_D16_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13397 { 5942 /* global_load_ubyte_d16_hi */, AMDGPU::GLOBAL_LOAD_UBYTE_D16_HI_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13399 { 5942 /* global_load_ubyte_d16_hi */, AMDGPU::GLOBAL_LOAD_UBYTE_D16_HI_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6__imm_95_0, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13401 { 5967 /* global_load_ushort */, AMDGPU::GLOBAL_LOAD_USHORT_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13403 { 5967 /* global_load_ushort */, AMDGPU::GLOBAL_LOAD_USHORT_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13405 { 5986 /* global_store_byte */, AMDGPU::GLOBAL_STORE_BYTE_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13407 { 5986 /* global_store_byte */, AMDGPU::GLOBAL_STORE_BYTE_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13409 { 6004 /* global_store_byte_d16_hi */, AMDGPU::GLOBAL_STORE_BYTE_D16_HI_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13411 { 6004 /* global_store_byte_d16_hi */, AMDGPU::GLOBAL_STORE_BYTE_D16_HI_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13413 { 6029 /* global_store_dword */, AMDGPU::GLOBAL_STORE_DWORD_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13415 { 6029 /* global_store_dword */, AMDGPU::GLOBAL_STORE_DWORD_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13417 { 6048 /* global_store_dwordx2 */, AMDGPU::GLOBAL_STORE_DWORDX2_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13419 { 6048 /* global_store_dwordx2 */, AMDGPU::GLOBAL_STORE_DWORDX2_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_64, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13421 { 6069 /* global_store_dwordx3 */, AMDGPU::GLOBAL_STORE_DWORDX3_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13423 { 6069 /* global_store_dwordx3 */, AMDGPU::GLOBAL_STORE_DWORDX3_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_96, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13425 { 6090 /* global_store_dwordx4 */, AMDGPU::GLOBAL_STORE_DWORDX4_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13427 { 6090 /* global_store_dwordx4 */, AMDGPU::GLOBAL_STORE_DWORDX4_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VReg_128, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13429 { 6111 /* global_store_short */, AMDGPU::GLOBAL_STORE_SHORT_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13431 { 6111 /* global_store_short */, AMDGPU::GLOBAL_STORE_SHORT_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13433 { 6130 /* global_store_short_d16_hi */, AMDGPU::GLOBAL_STORE_SHORT_D16_HI_vi, Convert__Reg1_0__Reg1_1__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_off, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
13435 { 6130 /* global_store_short_d16_hi */, AMDGPU::GLOBAL_STORE_SHORT_D16_HI_SADDR_vi, Convert__Reg1_0__Reg1_1__Reg1_2__ImmFlatOffset1_3__ImmGLC1_4__ImmSLC1_5__ImmDLC1_6, AMFBS_HasFlatGlobalInsts_isGFX8GFX9, { MCK_VReg_64, MCK_VGPR_32, MCK_SReg_64, MCK_ImmFlatOffset, MCK_ImmGLC, MCK_ImmSLC, MCK_ImmDLC }, },
30436 { 4992 /* global_atomic_add */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30437 { 4992 /* global_atomic_add */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30440 { 4992 /* global_atomic_add */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30441 { 4992 /* global_atomic_add */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30444 { 4992 /* global_atomic_add */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30445 { 4992 /* global_atomic_add */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30448 { 4992 /* global_atomic_add */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30449 { 4992 /* global_atomic_add */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30456 { 5032 /* global_atomic_add_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30457 { 5032 /* global_atomic_add_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30460 { 5032 /* global_atomic_add_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30461 { 5032 /* global_atomic_add_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30464 { 5032 /* global_atomic_add_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30465 { 5032 /* global_atomic_add_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30468 { 5032 /* global_atomic_add_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30469 { 5032 /* global_atomic_add_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30472 { 5053 /* global_atomic_and */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30473 { 5053 /* global_atomic_and */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30476 { 5053 /* global_atomic_and */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30477 { 5053 /* global_atomic_and */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30480 { 5053 /* global_atomic_and */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30481 { 5053 /* global_atomic_and */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30484 { 5053 /* global_atomic_and */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30485 { 5053 /* global_atomic_and */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30488 { 5071 /* global_atomic_and_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30489 { 5071 /* global_atomic_and_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30492 { 5071 /* global_atomic_and_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30493 { 5071 /* global_atomic_and_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30496 { 5071 /* global_atomic_and_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30497 { 5071 /* global_atomic_and_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30500 { 5071 /* global_atomic_and_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30501 { 5071 /* global_atomic_and_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30504 { 5092 /* global_atomic_cmpswap */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30505 { 5092 /* global_atomic_cmpswap */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30508 { 5092 /* global_atomic_cmpswap */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30509 { 5092 /* global_atomic_cmpswap */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30512 { 5092 /* global_atomic_cmpswap */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30513 { 5092 /* global_atomic_cmpswap */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30516 { 5092 /* global_atomic_cmpswap */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30517 { 5092 /* global_atomic_cmpswap */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30520 { 5114 /* global_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30521 { 5114 /* global_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30524 { 5114 /* global_atomic_cmpswap_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30525 { 5114 /* global_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30528 { 5114 /* global_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30529 { 5114 /* global_atomic_cmpswap_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30532 { 5114 /* global_atomic_cmpswap_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30533 { 5114 /* global_atomic_cmpswap_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30536 { 5139 /* global_atomic_dec */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30537 { 5139 /* global_atomic_dec */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30540 { 5139 /* global_atomic_dec */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30541 { 5139 /* global_atomic_dec */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30544 { 5139 /* global_atomic_dec */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30545 { 5139 /* global_atomic_dec */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30548 { 5139 /* global_atomic_dec */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30549 { 5139 /* global_atomic_dec */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30552 { 5157 /* global_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30553 { 5157 /* global_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30556 { 5157 /* global_atomic_dec_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30557 { 5157 /* global_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30560 { 5157 /* global_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30561 { 5157 /* global_atomic_dec_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30564 { 5157 /* global_atomic_dec_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30565 { 5157 /* global_atomic_dec_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30616 { 5309 /* global_atomic_inc */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30617 { 5309 /* global_atomic_inc */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30620 { 5309 /* global_atomic_inc */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30621 { 5309 /* global_atomic_inc */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30624 { 5309 /* global_atomic_inc */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30625 { 5309 /* global_atomic_inc */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30628 { 5309 /* global_atomic_inc */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30629 { 5309 /* global_atomic_inc */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30632 { 5327 /* global_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30633 { 5327 /* global_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30636 { 5327 /* global_atomic_inc_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30637 { 5327 /* global_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30640 { 5327 /* global_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30641 { 5327 /* global_atomic_inc_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30644 { 5327 /* global_atomic_inc_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30645 { 5327 /* global_atomic_inc_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30648 { 5348 /* global_atomic_or */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30649 { 5348 /* global_atomic_or */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30652 { 5348 /* global_atomic_or */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30653 { 5348 /* global_atomic_or */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30656 { 5348 /* global_atomic_or */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30657 { 5348 /* global_atomic_or */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30660 { 5348 /* global_atomic_or */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30661 { 5348 /* global_atomic_or */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30664 { 5365 /* global_atomic_or_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30665 { 5365 /* global_atomic_or_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30668 { 5365 /* global_atomic_or_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30669 { 5365 /* global_atomic_or_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30672 { 5365 /* global_atomic_or_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30673 { 5365 /* global_atomic_or_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30676 { 5365 /* global_atomic_or_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30677 { 5365 /* global_atomic_or_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30684 { 5410 /* global_atomic_smax */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30685 { 5410 /* global_atomic_smax */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30688 { 5410 /* global_atomic_smax */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30689 { 5410 /* global_atomic_smax */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30692 { 5410 /* global_atomic_smax */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30693 { 5410 /* global_atomic_smax */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30696 { 5410 /* global_atomic_smax */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30697 { 5410 /* global_atomic_smax */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30700 { 5429 /* global_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30701 { 5429 /* global_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30704 { 5429 /* global_atomic_smax_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30705 { 5429 /* global_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30708 { 5429 /* global_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30709 { 5429 /* global_atomic_smax_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30712 { 5429 /* global_atomic_smax_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30713 { 5429 /* global_atomic_smax_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30716 { 5451 /* global_atomic_smin */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30717 { 5451 /* global_atomic_smin */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30720 { 5451 /* global_atomic_smin */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30721 { 5451 /* global_atomic_smin */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30724 { 5451 /* global_atomic_smin */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30725 { 5451 /* global_atomic_smin */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30728 { 5451 /* global_atomic_smin */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30729 { 5451 /* global_atomic_smin */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30732 { 5470 /* global_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30733 { 5470 /* global_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30736 { 5470 /* global_atomic_smin_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30737 { 5470 /* global_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30740 { 5470 /* global_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30741 { 5470 /* global_atomic_smin_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30744 { 5470 /* global_atomic_smin_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30745 { 5470 /* global_atomic_smin_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30748 { 5492 /* global_atomic_sub */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30749 { 5492 /* global_atomic_sub */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30752 { 5492 /* global_atomic_sub */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30753 { 5492 /* global_atomic_sub */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30756 { 5492 /* global_atomic_sub */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30757 { 5492 /* global_atomic_sub */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30760 { 5492 /* global_atomic_sub */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30761 { 5492 /* global_atomic_sub */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30764 { 5510 /* global_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30765 { 5510 /* global_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30768 { 5510 /* global_atomic_sub_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30769 { 5510 /* global_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30772 { 5510 /* global_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30773 { 5510 /* global_atomic_sub_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30776 { 5510 /* global_atomic_sub_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30777 { 5510 /* global_atomic_sub_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30780 { 5531 /* global_atomic_swap */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30781 { 5531 /* global_atomic_swap */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30784 { 5531 /* global_atomic_swap */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30785 { 5531 /* global_atomic_swap */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30788 { 5531 /* global_atomic_swap */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30789 { 5531 /* global_atomic_swap */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30792 { 5531 /* global_atomic_swap */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30793 { 5531 /* global_atomic_swap */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30796 { 5550 /* global_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30797 { 5550 /* global_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30800 { 5550 /* global_atomic_swap_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30801 { 5550 /* global_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30804 { 5550 /* global_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30805 { 5550 /* global_atomic_swap_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30808 { 5550 /* global_atomic_swap_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30809 { 5550 /* global_atomic_swap_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30812 { 5572 /* global_atomic_umax */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30813 { 5572 /* global_atomic_umax */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30816 { 5572 /* global_atomic_umax */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30817 { 5572 /* global_atomic_umax */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30820 { 5572 /* global_atomic_umax */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30821 { 5572 /* global_atomic_umax */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30824 { 5572 /* global_atomic_umax */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30825 { 5572 /* global_atomic_umax */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30828 { 5591 /* global_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30829 { 5591 /* global_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30832 { 5591 /* global_atomic_umax_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30833 { 5591 /* global_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30836 { 5591 /* global_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30837 { 5591 /* global_atomic_umax_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30840 { 5591 /* global_atomic_umax_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30841 { 5591 /* global_atomic_umax_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30844 { 5613 /* global_atomic_umin */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30845 { 5613 /* global_atomic_umin */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30848 { 5613 /* global_atomic_umin */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30849 { 5613 /* global_atomic_umin */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30852 { 5613 /* global_atomic_umin */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30853 { 5613 /* global_atomic_umin */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30856 { 5613 /* global_atomic_umin */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30857 { 5613 /* global_atomic_umin */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30860 { 5632 /* global_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30861 { 5632 /* global_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30864 { 5632 /* global_atomic_umin_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30865 { 5632 /* global_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30868 { 5632 /* global_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30869 { 5632 /* global_atomic_umin_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30872 { 5632 /* global_atomic_umin_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30873 { 5632 /* global_atomic_umin_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30876 { 5654 /* global_atomic_xor */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30877 { 5654 /* global_atomic_xor */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30880 { 5654 /* global_atomic_xor */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30881 { 5654 /* global_atomic_xor */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30884 { 5654 /* global_atomic_xor */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30885 { 5654 /* global_atomic_xor */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30888 { 5654 /* global_atomic_xor */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30889 { 5654 /* global_atomic_xor */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30892 { 5672 /* global_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30893 { 5672 /* global_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30896 { 5672 /* global_atomic_xor_x2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30897 { 5672 /* global_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30900 { 5672 /* global_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30901 { 5672 /* global_atomic_xor_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30904 { 5672 /* global_atomic_xor_x2 */, 16 /* 4 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30905 { 5672 /* global_atomic_xor_x2 */, 64 /* 6 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30910 { 5693 /* global_load_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30911 { 5693 /* global_load_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30912 { 5693 /* global_load_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30913 { 5693 /* global_load_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30918 { 5693 /* global_load_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30919 { 5693 /* global_load_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30920 { 5693 /* global_load_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30921 { 5693 /* global_load_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30926 { 5711 /* global_load_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30927 { 5711 /* global_load_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30928 { 5711 /* global_load_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30929 { 5711 /* global_load_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30934 { 5711 /* global_load_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30935 { 5711 /* global_load_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30936 { 5711 /* global_load_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30937 { 5711 /* global_load_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30942 { 5731 /* global_load_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30943 { 5731 /* global_load_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30944 { 5731 /* global_load_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30945 { 5731 /* global_load_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30950 { 5731 /* global_load_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30951 { 5731 /* global_load_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30952 { 5731 /* global_load_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30953 { 5731 /* global_load_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30958 { 5751 /* global_load_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30959 { 5751 /* global_load_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30960 { 5751 /* global_load_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30961 { 5751 /* global_load_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30966 { 5751 /* global_load_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30967 { 5751 /* global_load_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30968 { 5751 /* global_load_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30969 { 5751 /* global_load_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30974 { 5771 /* global_load_sbyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30975 { 5771 /* global_load_sbyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30976 { 5771 /* global_load_sbyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30977 { 5771 /* global_load_sbyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30982 { 5771 /* global_load_sbyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30983 { 5771 /* global_load_sbyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30984 { 5771 /* global_load_sbyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30985 { 5771 /* global_load_sbyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30990 { 5789 /* global_load_sbyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30991 { 5789 /* global_load_sbyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30992 { 5789 /* global_load_sbyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30993 { 5789 /* global_load_sbyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30998 { 5789 /* global_load_sbyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
30999 { 5789 /* global_load_sbyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31000 { 5789 /* global_load_sbyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31001 { 5789 /* global_load_sbyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31006 { 5811 /* global_load_sbyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31007 { 5811 /* global_load_sbyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31008 { 5811 /* global_load_sbyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31009 { 5811 /* global_load_sbyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31014 { 5811 /* global_load_sbyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31015 { 5811 /* global_load_sbyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31016 { 5811 /* global_load_sbyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31017 { 5811 /* global_load_sbyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31022 { 5836 /* global_load_short_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31023 { 5836 /* global_load_short_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31024 { 5836 /* global_load_short_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31025 { 5836 /* global_load_short_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31030 { 5836 /* global_load_short_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31031 { 5836 /* global_load_short_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31032 { 5836 /* global_load_short_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31033 { 5836 /* global_load_short_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31038 { 5858 /* global_load_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31039 { 5858 /* global_load_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31040 { 5858 /* global_load_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31041 { 5858 /* global_load_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31046 { 5858 /* global_load_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31047 { 5858 /* global_load_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31048 { 5858 /* global_load_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31049 { 5858 /* global_load_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31054 { 5883 /* global_load_sshort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31055 { 5883 /* global_load_sshort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31056 { 5883 /* global_load_sshort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31057 { 5883 /* global_load_sshort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31062 { 5883 /* global_load_sshort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31063 { 5883 /* global_load_sshort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31064 { 5883 /* global_load_sshort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31065 { 5883 /* global_load_sshort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31070 { 5902 /* global_load_ubyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31071 { 5902 /* global_load_ubyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31072 { 5902 /* global_load_ubyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31073 { 5902 /* global_load_ubyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31078 { 5902 /* global_load_ubyte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31079 { 5902 /* global_load_ubyte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31080 { 5902 /* global_load_ubyte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31081 { 5902 /* global_load_ubyte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31086 { 5920 /* global_load_ubyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31087 { 5920 /* global_load_ubyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31088 { 5920 /* global_load_ubyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31089 { 5920 /* global_load_ubyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31094 { 5920 /* global_load_ubyte_d16 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31095 { 5920 /* global_load_ubyte_d16 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31096 { 5920 /* global_load_ubyte_d16 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31097 { 5920 /* global_load_ubyte_d16 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31102 { 5942 /* global_load_ubyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31103 { 5942 /* global_load_ubyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31104 { 5942 /* global_load_ubyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31105 { 5942 /* global_load_ubyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31110 { 5942 /* global_load_ubyte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31111 { 5942 /* global_load_ubyte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31112 { 5942 /* global_load_ubyte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31113 { 5942 /* global_load_ubyte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31118 { 5967 /* global_load_ushort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31119 { 5967 /* global_load_ushort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31120 { 5967 /* global_load_ushort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31121 { 5967 /* global_load_ushort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31126 { 5967 /* global_load_ushort */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31127 { 5967 /* global_load_ushort */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31128 { 5967 /* global_load_ushort */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31129 { 5967 /* global_load_ushort */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31134 { 5986 /* global_store_byte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31135 { 5986 /* global_store_byte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31136 { 5986 /* global_store_byte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31137 { 5986 /* global_store_byte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31142 { 5986 /* global_store_byte */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31143 { 5986 /* global_store_byte */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31144 { 5986 /* global_store_byte */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31145 { 5986 /* global_store_byte */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31150 { 6004 /* global_store_byte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31151 { 6004 /* global_store_byte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31152 { 6004 /* global_store_byte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31153 { 6004 /* global_store_byte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31158 { 6004 /* global_store_byte_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31159 { 6004 /* global_store_byte_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31160 { 6004 /* global_store_byte_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31161 { 6004 /* global_store_byte_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31166 { 6029 /* global_store_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31167 { 6029 /* global_store_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31168 { 6029 /* global_store_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31169 { 6029 /* global_store_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31174 { 6029 /* global_store_dword */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31175 { 6029 /* global_store_dword */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31176 { 6029 /* global_store_dword */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31177 { 6029 /* global_store_dword */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31182 { 6048 /* global_store_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31183 { 6048 /* global_store_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31184 { 6048 /* global_store_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31185 { 6048 /* global_store_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31190 { 6048 /* global_store_dwordx2 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31191 { 6048 /* global_store_dwordx2 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31192 { 6048 /* global_store_dwordx2 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31193 { 6048 /* global_store_dwordx2 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31198 { 6069 /* global_store_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31199 { 6069 /* global_store_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31200 { 6069 /* global_store_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31201 { 6069 /* global_store_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31206 { 6069 /* global_store_dwordx3 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31207 { 6069 /* global_store_dwordx3 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31208 { 6069 /* global_store_dwordx3 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31209 { 6069 /* global_store_dwordx3 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31214 { 6090 /* global_store_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31215 { 6090 /* global_store_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31216 { 6090 /* global_store_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31217 { 6090 /* global_store_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31222 { 6090 /* global_store_dwordx4 */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31223 { 6090 /* global_store_dwordx4 */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31224 { 6090 /* global_store_dwordx4 */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31225 { 6090 /* global_store_dwordx4 */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31230 { 6111 /* global_store_short */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31231 { 6111 /* global_store_short */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31232 { 6111 /* global_store_short */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31233 { 6111 /* global_store_short */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31238 { 6111 /* global_store_short */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31239 { 6111 /* global_store_short */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31240 { 6111 /* global_store_short */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31241 { 6111 /* global_store_short */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31246 { 6130 /* global_store_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31247 { 6130 /* global_store_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31248 { 6130 /* global_store_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31249 { 6130 /* global_store_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31254 { 6130 /* global_store_short_d16_hi */, 8 /* 3 */, MCK_ImmFlatOffset, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31255 { 6130 /* global_store_short_d16_hi */, 64 /* 6 */, MCK_ImmDLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31256 { 6130 /* global_store_short_d16_hi */, 16 /* 4 */, MCK_ImmGLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },
31257 { 6130 /* global_store_short_d16_hi */, 32 /* 5 */, MCK_ImmSLC, AMFBS_HasFlatGlobalInsts_isGFX8GFX9 },