reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
22250 { 22736 /* v_dot2_f32_f16 */, AMDGPU::V_DOT2_F32_F16_gfx10, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcV2F16, MCK_VSrcV2F16, MCK_VSrcF32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22252 { 22751 /* v_dot2_i32_i16 */, AMDGPU::V_DOT2_I32_I16_gfx10, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcV2B16, MCK_VSrcV2B16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22254 { 22766 /* v_dot2_u32_u16 */, AMDGPU::V_DOT2_U32_U16_gfx10, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcV2B16, MCK_VSrcV2B16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22258 { 22827 /* v_dot4_u32_u8 */, AMDGPU::V_DOT4_U32_U8_gfx10, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22262 { 22870 /* v_dot8_u32_u4 */, AMDGPU::V_DOT8_U32_U4_gfx10, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 76869 { 22736 /* v_dot2_f32_f16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_isGFX10Plus }, 76870 { 22736 /* v_dot2_f32_f16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_isGFX10Plus }, 76871 { 22736 /* v_dot2_f32_f16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76872 { 22736 /* v_dot2_f32_f16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_isGFX10Plus }, 76873 { 22736 /* v_dot2_f32_f16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76879 { 22751 /* v_dot2_i32_i16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_isGFX10Plus }, 76880 { 22751 /* v_dot2_i32_i16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_isGFX10Plus }, 76881 { 22751 /* v_dot2_i32_i16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76882 { 22751 /* v_dot2_i32_i16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_isGFX10Plus }, 76883 { 22751 /* v_dot2_i32_i16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76889 { 22766 /* v_dot2_u32_u16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_isGFX10Plus }, 76890 { 22766 /* v_dot2_u32_u16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_isGFX10Plus }, 76891 { 22766 /* v_dot2_u32_u16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76892 { 22766 /* v_dot2_u32_u16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_isGFX10Plus }, 76893 { 22766 /* v_dot2_u32_u16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76927 { 22827 /* v_dot4_u32_u8 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_isGFX10Plus }, 76928 { 22827 /* v_dot4_u32_u8 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_isGFX10Plus }, 76929 { 22827 /* v_dot4_u32_u8 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76930 { 22827 /* v_dot4_u32_u8 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_isGFX10Plus }, 76931 { 22827 /* v_dot4_u32_u8 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76960 { 22870 /* v_dot8_u32_u4 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_isGFX10Plus }, 76961 { 22870 /* v_dot8_u32_u4 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_isGFX10Plus }, 76962 { 22870 /* v_dot8_u32_u4 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_isGFX10Plus }, 76963 { 22870 /* v_dot8_u32_u4 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_isGFX10Plus }, 76964 { 22870 /* v_dot8_u32_u4 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_isGFX10Plus },