reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
22251 { 22736 /* v_dot2_f32_f16 */, AMDGPU::V_DOT2_F32_F16_vi, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_HasVOP3PInsts, { MCK_VGPR_32, MCK_VSrcV2F16, MCK_VSrcV2F16, MCK_VSrcF32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22253 { 22751 /* v_dot2_i32_i16 */, AMDGPU::V_DOT2_I32_I16_vi, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_HasVOP3PInsts, { MCK_VGPR_32, MCK_VSrcV2B16, MCK_VSrcV2B16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22255 { 22766 /* v_dot2_u32_u16 */, AMDGPU::V_DOT2_U32_U16_vi, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_HasVOP3PInsts, { MCK_VGPR_32, MCK_VSrcV2B16, MCK_VSrcV2B16, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22259 { 22827 /* v_dot4_u32_u8 */, AMDGPU::V_DOT4_U32_U8_vi, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_HasVOP3PInsts, { MCK_VGPR_32, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 22263 { 22870 /* v_dot8_u32_u4 */, AMDGPU::V_DOT8_U32_U4_vi, ConvertCustom_cvtVOP3P, AMFBS_HasDot2Insts_HasVOP3PInsts, { MCK_VGPR_32, MCK_VSrcB32, MCK_VSrcB32, MCK_VSrcB32, MCK_ImmOpSel, MCK_ImmOpSelHi, MCK_ImmNegLo, MCK_ImmNegHi, MCK_ImmClampSI }, }, 76874 { 22736 /* v_dot2_f32_f16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76875 { 22736 /* v_dot2_f32_f16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76876 { 22736 /* v_dot2_f32_f16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76877 { 22736 /* v_dot2_f32_f16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76878 { 22736 /* v_dot2_f32_f16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76884 { 22751 /* v_dot2_i32_i16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76885 { 22751 /* v_dot2_i32_i16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76886 { 22751 /* v_dot2_i32_i16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76887 { 22751 /* v_dot2_i32_i16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76888 { 22751 /* v_dot2_i32_i16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76894 { 22766 /* v_dot2_u32_u16 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76895 { 22766 /* v_dot2_u32_u16 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76896 { 22766 /* v_dot2_u32_u16 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76897 { 22766 /* v_dot2_u32_u16 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76898 { 22766 /* v_dot2_u32_u16 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76932 { 22827 /* v_dot4_u32_u8 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76933 { 22827 /* v_dot4_u32_u8 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76934 { 22827 /* v_dot4_u32_u8 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76935 { 22827 /* v_dot4_u32_u8 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76936 { 22827 /* v_dot4_u32_u8 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76965 { 22870 /* v_dot8_u32_u4 */, 256 /* 8 */, MCK_ImmClampSI, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76966 { 22870 /* v_dot8_u32_u4 */, 16 /* 4 */, MCK_ImmOpSel, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76967 { 22870 /* v_dot8_u32_u4 */, 32 /* 5 */, MCK_ImmOpSelHi, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76968 { 22870 /* v_dot8_u32_u4 */, 64 /* 6 */, MCK_ImmNegLo, AMFBS_HasDot2Insts_HasVOP3PInsts }, 76969 { 22870 /* v_dot8_u32_u4 */, 128 /* 7 */, MCK_ImmNegHi, AMFBS_HasDot2Insts_HasVOP3PInsts },