reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
23561 { 13222 /* v_add_co_ci_u32 */, AMDGPU::V_ADD_CO_CI_U32_dpp8_w32_gfx10, ConvertCustom_cvtDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32, { MCK_VGPR_32, MCK_VCC_LO, MCK_VGPR_32, MCK_VGPR_32, MCK_VCC_LO, MCK_ImmDPP8, MCK_ImmFI }, }, 23607 { 21959 /* v_cndmask_b32 */, AMDGPU::V_CNDMASK_B32_dpp8_w32_gfx10, ConvertCustom_cvtDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32, { MCK_VGPR_32, MCK_VGPR_32, MCK_VGPR_32, MCK_VCC_LO, MCK_ImmDPP8, MCK_ImmFI }, }, 23855 { 25959 /* v_sub_co_ci_u32 */, AMDGPU::V_SUB_CO_CI_U32_dpp8_w32_gfx10, ConvertCustom_cvtDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32, { MCK_VGPR_32, MCK_VCC_LO, MCK_VGPR_32, MCK_VGPR_32, MCK_VCC_LO, MCK_ImmDPP8, MCK_ImmFI }, }, 23885 { 26156 /* v_subrev_co_ci_u32 */, AMDGPU::V_SUBREV_CO_CI_U32_dpp8_w32_gfx10, ConvertCustom_cvtDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32, { MCK_VGPR_32, MCK_VCC_LO, MCK_VGPR_32, MCK_VGPR_32, MCK_VCC_LO, MCK_ImmDPP8, MCK_ImmFI }, }, 72854 { 13222 /* v_add_co_ci_u32 */, 32 /* 5 */, MCK_ImmDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 72855 { 13222 /* v_add_co_ci_u32 */, 64 /* 6 */, MCK_ImmFI, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 75919 { 21959 /* v_cndmask_b32 */, 16 /* 4 */, MCK_ImmDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 75920 { 21959 /* v_cndmask_b32 */, 32 /* 5 */, MCK_ImmFI, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 79656 { 25959 /* v_sub_co_ci_u32 */, 32 /* 5 */, MCK_ImmDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 79657 { 25959 /* v_sub_co_ci_u32 */, 64 /* 6 */, MCK_ImmFI, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 79903 { 26156 /* v_subrev_co_ci_u32 */, 32 /* 5 */, MCK_ImmDPP8, AMFBS_HasDPP8_isGFX10Plus_isWave32 }, 79904 { 26156 /* v_subrev_co_ci_u32 */, 64 /* 6 */, MCK_ImmFI, AMFBS_HasDPP8_isGFX10Plus_isWave32 },