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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18858 { 13251 /* v_add_f16 */, AMDGPU::V_ADD_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
18864 { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
18876 { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
18886 { 13598 /* v_ceil_f16 */, AMDGPU::V_CEIL_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
18903 { 13657 /* v_cmp_class_f16_e32 */, AMDGPU::V_CMP_CLASS_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
18935 { 13762 /* v_cmp_eq_f16_e32 */, AMDGPU::V_CMP_EQ_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
18967 { 13852 /* v_cmp_eq_i16_e32 */, AMDGPU::V_CMP_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
18999 { 13942 /* v_cmp_eq_u16_e32 */, AMDGPU::V_CMP_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19031 { 14031 /* v_cmp_f_f16_e32 */, AMDGPU::V_CMP_F_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19059 { 14115 /* v_cmp_f_i16_e32 */, AMDGPU::V_CMP_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19087 { 14199 /* v_cmp_f_u16_e32 */, AMDGPU::V_CMP_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19119 { 14284 /* v_cmp_ge_f16_e32 */, AMDGPU::V_CMP_GE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19151 { 14374 /* v_cmp_ge_i16_e32 */, AMDGPU::V_CMP_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19183 { 14464 /* v_cmp_ge_u16_e32 */, AMDGPU::V_CMP_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19215 { 14554 /* v_cmp_gt_f16_e32 */, AMDGPU::V_CMP_GT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19247 { 14644 /* v_cmp_gt_i16_e32 */, AMDGPU::V_CMP_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19279 { 14734 /* v_cmp_gt_u16_e32 */, AMDGPU::V_CMP_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19311 { 14824 /* v_cmp_le_f16_e32 */, AMDGPU::V_CMP_LE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19343 { 14914 /* v_cmp_le_i16_e32 */, AMDGPU::V_CMP_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19375 { 15004 /* v_cmp_le_u16_e32 */, AMDGPU::V_CMP_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19407 { 15094 /* v_cmp_lg_f16_e32 */, AMDGPU::V_CMP_LG_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19439 { 15184 /* v_cmp_lt_f16_e32 */, AMDGPU::V_CMP_LT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19471 { 15274 /* v_cmp_lt_i16_e32 */, AMDGPU::V_CMP_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19503 { 15364 /* v_cmp_lt_u16_e32 */, AMDGPU::V_CMP_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19535 { 15454 /* v_cmp_ne_i16_e32 */, AMDGPU::V_CMP_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19567 { 15544 /* v_cmp_ne_u16_e32 */, AMDGPU::V_CMP_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19599 { 15635 /* v_cmp_neq_f16_e32 */, AMDGPU::V_CMP_NEQ_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19631 { 15731 /* v_cmp_nge_f16_e32 */, AMDGPU::V_CMP_NGE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19663 { 15827 /* v_cmp_ngt_f16_e32 */, AMDGPU::V_CMP_NGT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19695 { 15923 /* v_cmp_nle_f16_e32 */, AMDGPU::V_CMP_NLE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19727 { 16019 /* v_cmp_nlg_f16_e32 */, AMDGPU::V_CMP_NLG_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19759 { 16115 /* v_cmp_nlt_f16_e32 */, AMDGPU::V_CMP_NLT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19791 { 16209 /* v_cmp_o_f16_e32 */, AMDGPU::V_CMP_O_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19819 { 16293 /* v_cmp_t_i16_e32 */, AMDGPU::V_CMP_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19847 { 16377 /* v_cmp_t_u16_e32 */, AMDGPU::V_CMP_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
19879 { 16463 /* v_cmp_tru_f16_e32 */, AMDGPU::V_CMP_TRU_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
19911 { 16557 /* v_cmp_u_f16_e32 */, AMDGPU::V_CMP_U_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20197 { 18790 /* v_cmpx_class_f16_e32 */, AMDGPU::V_CMPX_CLASS_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20223 { 18901 /* v_cmpx_eq_f16_e32 */, AMDGPU::V_CMPX_EQ_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20249 { 18997 /* v_cmpx_eq_i16_e32 */, AMDGPU::V_CMPX_EQ_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20275 { 19093 /* v_cmpx_eq_u16_e32 */, AMDGPU::V_CMPX_EQ_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20301 { 19188 /* v_cmpx_f_f16_e32 */, AMDGPU::V_CMPX_F_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20325 { 19278 /* v_cmpx_f_i16_e32 */, AMDGPU::V_CMPX_F_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20349 { 19368 /* v_cmpx_f_u16_e32 */, AMDGPU::V_CMPX_F_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20375 { 19459 /* v_cmpx_ge_f16_e32 */, AMDGPU::V_CMPX_GE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20401 { 19555 /* v_cmpx_ge_i16_e32 */, AMDGPU::V_CMPX_GE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20427 { 19651 /* v_cmpx_ge_u16_e32 */, AMDGPU::V_CMPX_GE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20453 { 19747 /* v_cmpx_gt_f16_e32 */, AMDGPU::V_CMPX_GT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20479 { 19843 /* v_cmpx_gt_i16_e32 */, AMDGPU::V_CMPX_GT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20505 { 19939 /* v_cmpx_gt_u16_e32 */, AMDGPU::V_CMPX_GT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20531 { 20035 /* v_cmpx_le_f16_e32 */, AMDGPU::V_CMPX_LE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20557 { 20131 /* v_cmpx_le_i16_e32 */, AMDGPU::V_CMPX_LE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20583 { 20227 /* v_cmpx_le_u16_e32 */, AMDGPU::V_CMPX_LE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20609 { 20323 /* v_cmpx_lg_f16_e32 */, AMDGPU::V_CMPX_LG_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20635 { 20419 /* v_cmpx_lt_f16_e32 */, AMDGPU::V_CMPX_LT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20661 { 20515 /* v_cmpx_lt_i16_e32 */, AMDGPU::V_CMPX_LT_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20687 { 20611 /* v_cmpx_lt_u16_e32 */, AMDGPU::V_CMPX_LT_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20713 { 20707 /* v_cmpx_ne_i16_e32 */, AMDGPU::V_CMPX_NE_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20739 { 20803 /* v_cmpx_ne_u16_e32 */, AMDGPU::V_CMPX_NE_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20765 { 20900 /* v_cmpx_neq_f16_e32 */, AMDGPU::V_CMPX_NEQ_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20791 { 21002 /* v_cmpx_nge_f16_e32 */, AMDGPU::V_CMPX_NGE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20817 { 21104 /* v_cmpx_ngt_f16_e32 */, AMDGPU::V_CMPX_NGT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20843 { 21206 /* v_cmpx_nle_f16_e32 */, AMDGPU::V_CMPX_NLE_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20869 { 21308 /* v_cmpx_nlg_f16_e32 */, AMDGPU::V_CMPX_NLG_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20895 { 21410 /* v_cmpx_nlt_f16_e32 */, AMDGPU::V_CMPX_NLT_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20921 { 21510 /* v_cmpx_o_f16_e32 */, AMDGPU::V_CMPX_O_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
20945 { 21600 /* v_cmpx_t_i16_e32 */, AMDGPU::V_CMPX_T_I16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20969 { 21690 /* v_cmpx_t_u16_e32 */, AMDGPU::V_CMPX_T_U16_e32_vi, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcB16, MCK_VGPR_32 }, },
20995 { 21782 /* v_cmpx_tru_f16_e32 */, AMDGPU::V_CMPX_TRU_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
21021 { 21882 /* v_cmpx_u_f16_e32 */, AMDGPU::V_CMPX_U_F16_e32_vi, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VSrcF16, MCK_VGPR_32 }, },
21052 { 21973 /* v_cos_f16 */, AMDGPU::V_COS_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21060 { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e32_vi, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16 }, },
21062 { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e32_vi, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16 }, },
21100 { 22271 /* v_cvt_i16_f16 */, AMDGPU::V_CVT_I16_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21125 { 22561 /* v_cvt_u16_f16 */, AMDGPU::V_CVT_U16_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21139 { 22899 /* v_exp_f16 */, AMDGPU::V_EXP_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21155 { 22969 /* v_floor_f16 */, AMDGPU::V_FLOOR_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21170 { 23168 /* v_fract_f16 */, AMDGPU::V_FRACT_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21178 { 23204 /* v_frexp_exp_i16_f16 */, AMDGPU::V_FREXP_EXP_I16_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21186 { 23264 /* v_frexp_mant_f16 */, AMDGPU::V_FREXP_MANT_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21206 { 23439 /* v_ldexp_f16 */, AMDGPU::V_LDEXP_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21210 { 23501 /* v_log_f16 */, AMDGPU::V_LOG_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21217 { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21222 { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21226 { 23695 /* v_mac_f16 */, AMDGPU::V_MAC_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2__Tie0_1_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21232 { 23970 /* v_madak_f16 */, AMDGPU::V_MADAK_F16_vi, Convert__Reg1_0__VCSrcF161_1__Reg1_2__KImmFP161_3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VCSrcF16, MCK_VGPR_32, MCK_KImmFP16 }, },
21236 { 23994 /* v_madmk_f16 */, AMDGPU::V_MADMK_F16_vi, Convert__Reg1_0__VCSrcF321_1__KImmFP161_2__Reg1_3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VCSrcF32, MCK_KImmFP16, MCK_VGPR_32 }, },
21241 { 24084 /* v_max_f16 */, AMDGPU::V_MAX_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21245 { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21250 { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21257 { 24775 /* v_min_f16 */, AMDGPU::V_MIN_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21261 { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21266 { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21287 { 24989 /* v_mul_f16 */, AMDGPU::V_MUL_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21303 { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21322 { 25609 /* v_rcp_f16 */, AMDGPU::V_RCP_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21338 { 25707 /* v_rndne_f16 */, AMDGPU::V_RNDNE_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21348 { 25775 /* v_rsq_f16 */, AMDGPU::V_RSQ_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21360 { 25906 /* v_sin_f16 */, AMDGPU::V_SIN_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21365 { 25926 /* v_sqrt_f16 */, AMDGPU::V_SQRT_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21379 { 25988 /* v_sub_f16 */, AMDGPU::V_SUB_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21385 { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21405 { 26191 /* v_subrev_f16 */, AMDGPU::V_SUBREV_F16_e32_vi, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21411 { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e32_vi, Convert__Reg1_0__VSrcB161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VGPR_32 }, },
21418 { 26314 /* v_trunc_f16 */, AMDGPU::V_TRUNC_F16_e32_vi, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcF16 }, },
21448 { 13251 /* v_add_f16 */, AMDGPU::V_ADD_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
21464 { 13368 /* v_add_u16 */, AMDGPU::V_ADD_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21485 { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21511 { 13598 /* v_ceil_f16 */, AMDGPU::V_CEIL_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
21522 { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21530 { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21538 { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21546 { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21554 { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21561 { 14103 /* v_cmp_f_i16 */, AMDGPU::V_CMP_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21568 { 14187 /* v_cmp_f_u16 */, AMDGPU::V_CMP_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21576 { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21584 { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21592 { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21600 { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21608 { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21616 { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21624 { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21632 { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21640 { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21648 { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21656 { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21664 { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21672 { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21680 { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21688 { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21696 { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21704 { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21712 { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21720 { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21728 { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21736 { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21744 { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21751 { 16281 /* v_cmp_t_i16 */, AMDGPU::V_CMP_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21758 { 16365 /* v_cmp_t_u16 */, AMDGPU::V_CMP_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21766 { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21774 { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21846 { 18773 /* v_cmpx_class_f16 */, AMDGPU::V_CMPX_CLASS_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21854 { 18887 /* v_cmpx_eq_f16 */, AMDGPU::V_CMPX_EQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21862 { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21870 { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21878 { 19175 /* v_cmpx_f_f16 */, AMDGPU::V_CMPX_F_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21885 { 19265 /* v_cmpx_f_i16 */, AMDGPU::V_CMPX_F_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21892 { 19355 /* v_cmpx_f_u16 */, AMDGPU::V_CMPX_F_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21900 { 19445 /* v_cmpx_ge_f16 */, AMDGPU::V_CMPX_GE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21908 { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21916 { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21924 { 19733 /* v_cmpx_gt_f16 */, AMDGPU::V_CMPX_GT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21932 { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21940 { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21948 { 20021 /* v_cmpx_le_f16 */, AMDGPU::V_CMPX_LE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21956 { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21964 { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21972 { 20309 /* v_cmpx_lg_f16 */, AMDGPU::V_CMPX_LG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21980 { 20405 /* v_cmpx_lt_f16 */, AMDGPU::V_CMPX_LT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21988 { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21996 { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22004 { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22012 { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22020 { 20885 /* v_cmpx_neq_f16 */, AMDGPU::V_CMPX_NEQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22028 { 20987 /* v_cmpx_nge_f16 */, AMDGPU::V_CMPX_NGE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22036 { 21089 /* v_cmpx_ngt_f16 */, AMDGPU::V_CMPX_NGT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22044 { 21191 /* v_cmpx_nle_f16 */, AMDGPU::V_CMPX_NLE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22052 { 21293 /* v_cmpx_nlg_f16 */, AMDGPU::V_CMPX_NLG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22060 { 21395 /* v_cmpx_nlt_f16 */, AMDGPU::V_CMPX_NLT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22068 { 21497 /* v_cmpx_o_f16 */, AMDGPU::V_CMPX_O_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22075 { 21587 /* v_cmpx_t_i16 */, AMDGPU::V_CMPX_T_I16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22082 { 21677 /* v_cmpx_t_u16 */, AMDGPU::V_CMPX_T_U16_e64_vi, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
22090 { 21767 /* v_cmpx_tru_f16 */, AMDGPU::V_CMPX_TRU_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22098 { 21869 /* v_cmpx_u_f16 */, AMDGPU::V_CMPX_U_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22115 { 21973 /* v_cos_f16 */, AMDGPU::V_COS_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22135 { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22137 { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22175 { 22271 /* v_cvt_i16_f16 */, AMDGPU::V_CVT_I16_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22221 { 22561 /* v_cvt_u16_f16 */, AMDGPU::V_CVT_U16_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22265 { 22899 /* v_exp_f16 */, AMDGPU::V_EXP_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22281 { 22969 /* v_floor_f16 */, AMDGPU::V_FLOOR_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22308 { 23168 /* v_fract_f16 */, AMDGPU::V_FRACT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22316 { 23204 /* v_frexp_exp_i16_f16 */, AMDGPU::V_FREXP_EXP_I16_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22324 { 23264 /* v_frexp_mant_f16 */, AMDGPU::V_FREXP_MANT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22336 { 23348 /* v_interp_p1ll_f16 */, AMDGPU::V_INTERP_P1LL_F16_vi, ConvertCustom_cvtVOP3Interp, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_Attr, MCK_AttrChan, MCK_ImmHigh, MCK_ImmClampSI, MCK_ImmOModSI }, },
22338 { 23366 /* v_interp_p1lv_f16 */, AMDGPU::V_INTERP_P1LV_F16_vi, ConvertCustom_cvtVOP3Interp, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_Attr, MCK_AttrChan, MCK_RegOrImmWithFP16InputMods, MCK_ImmHigh, MCK_ImmClampSI, MCK_ImmOModSI }, },
22346 { 23439 /* v_ldexp_f16 */, AMDGPU::V_LDEXP_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithInt32InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22359 { 23501 /* v_log_f16 */, AMDGPU::V_LOG_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22371 { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22380 { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22387 { 23695 /* v_mac_f16 */, AMDGPU::V_MAC_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22445 { 24084 /* v_max_f16 */, AMDGPU::V_MAX_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22452 { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22458 { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22520 { 24775 /* v_min_f16 */, AMDGPU::V_MIN_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22527 { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22533 { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22564 { 24989 /* v_mul_f16 */, AMDGPU::V_MUL_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22592 { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22664 { 25609 /* v_rcp_f16 */, AMDGPU::V_RCP_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22676 { 25707 /* v_rndne_f16 */, AMDGPU::V_RNDNE_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22686 { 25775 /* v_rsq_f16 */, AMDGPU::V_RSQ_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22710 { 25906 /* v_sin_f16 */, AMDGPU::V_SIN_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22715 { 25926 /* v_sqrt_f16 */, AMDGPU::V_SQRT_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22730 { 25988 /* v_sub_f16 */, AMDGPU::V_SUB_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22741 { 26080 /* v_sub_u16 */, AMDGPU::V_SUB_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22762 { 26191 /* v_subrev_f16 */, AMDGPU::V_SUBREV_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22768 { 26246 /* v_subrev_u16 */, AMDGPU::V_SUBREV_U16_e64_vi, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22775 { 26314 /* v_trunc_f16 */, AMDGPU::V_TRUNC_F16_e64_vi, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX8GFX9, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
72908 { 13251 /* v_add_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
72909 { 13251 /* v_add_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
72910 { 13251 /* v_add_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73183 { 13598 /* v_ceil_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73184 { 13598 /* v_ceil_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73185 { 13598 /* v_ceil_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73264 { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73265 { 13641 /* v_cmp_class_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73311 { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73312 { 13749 /* v_cmp_eq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73313 { 13749 /* v_cmp_eq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73357 { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73389 { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73423 { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73424 { 14019 /* v_cmp_f_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73425 { 14019 /* v_cmp_f_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73468 { 14103 /* v_cmp_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73495 { 14187 /* v_cmp_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73525 { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73526 { 14271 /* v_cmp_ge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73527 { 14271 /* v_cmp_ge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73571 { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73603 { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73637 { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73638 { 14541 /* v_cmp_gt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73639 { 14541 /* v_cmp_gt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73683 { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73715 { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73749 { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73750 { 14811 /* v_cmp_le_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73751 { 14811 /* v_cmp_le_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73795 { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73827 { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73861 { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73862 { 15081 /* v_cmp_lg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73863 { 15081 /* v_cmp_lg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73909 { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73910 { 15171 /* v_cmp_lt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
73911 { 15171 /* v_cmp_lt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
73955 { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
73987 { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74019 { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74051 { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74085 { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74086 { 15621 /* v_cmp_neq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74087 { 15621 /* v_cmp_neq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74133 { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74134 { 15717 /* v_cmp_nge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74135 { 15717 /* v_cmp_nge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74181 { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74182 { 15813 /* v_cmp_ngt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74183 { 15813 /* v_cmp_ngt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74229 { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74230 { 15909 /* v_cmp_nle_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74231 { 15909 /* v_cmp_nle_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74277 { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74278 { 16005 /* v_cmp_nlg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74279 { 16005 /* v_cmp_nlg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74325 { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74326 { 16101 /* v_cmp_nlt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74327 { 16101 /* v_cmp_nlt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74373 { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74374 { 16197 /* v_cmp_o_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74375 { 16197 /* v_cmp_o_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74418 { 16281 /* v_cmp_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74445 { 16365 /* v_cmp_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74475 { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74476 { 16449 /* v_cmp_tru_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74477 { 16449 /* v_cmp_tru_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74523 { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74524 { 16545 /* v_cmp_u_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74525 { 16545 /* v_cmp_u_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74761 { 18773 /* v_cmpx_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74762 { 18773 /* v_cmpx_class_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74803 { 18887 /* v_cmpx_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74804 { 18887 /* v_cmpx_eq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74805 { 18887 /* v_cmpx_eq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74844 { 18983 /* v_cmpx_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74871 { 19079 /* v_cmpx_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74900 { 19175 /* v_cmpx_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74901 { 19175 /* v_cmpx_f_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74902 { 19175 /* v_cmpx_f_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
74941 { 19265 /* v_cmpx_f_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74965 { 19355 /* v_cmpx_f_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74991 { 19445 /* v_cmpx_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
74992 { 19445 /* v_cmpx_ge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
74993 { 19445 /* v_cmpx_ge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75032 { 19541 /* v_cmpx_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75059 { 19637 /* v_cmpx_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75088 { 19733 /* v_cmpx_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75089 { 19733 /* v_cmpx_gt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75090 { 19733 /* v_cmpx_gt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75129 { 19829 /* v_cmpx_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75156 { 19925 /* v_cmpx_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75185 { 20021 /* v_cmpx_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75186 { 20021 /* v_cmpx_le_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75187 { 20021 /* v_cmpx_le_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75226 { 20117 /* v_cmpx_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75253 { 20213 /* v_cmpx_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75282 { 20309 /* v_cmpx_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75283 { 20309 /* v_cmpx_lg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75284 { 20309 /* v_cmpx_lg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75325 { 20405 /* v_cmpx_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75326 { 20405 /* v_cmpx_lt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75327 { 20405 /* v_cmpx_lt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75366 { 20501 /* v_cmpx_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75393 { 20597 /* v_cmpx_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75420 { 20693 /* v_cmpx_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75447 { 20789 /* v_cmpx_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75476 { 20885 /* v_cmpx_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75477 { 20885 /* v_cmpx_neq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75478 { 20885 /* v_cmpx_neq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75519 { 20987 /* v_cmpx_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75520 { 20987 /* v_cmpx_nge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75521 { 20987 /* v_cmpx_nge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75562 { 21089 /* v_cmpx_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75563 { 21089 /* v_cmpx_ngt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75564 { 21089 /* v_cmpx_ngt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75605 { 21191 /* v_cmpx_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75606 { 21191 /* v_cmpx_nle_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75607 { 21191 /* v_cmpx_nle_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75648 { 21293 /* v_cmpx_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75649 { 21293 /* v_cmpx_nlg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75650 { 21293 /* v_cmpx_nlg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75691 { 21395 /* v_cmpx_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75692 { 21395 /* v_cmpx_nlt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75693 { 21395 /* v_cmpx_nlt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75734 { 21497 /* v_cmpx_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75735 { 21497 /* v_cmpx_o_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75736 { 21497 /* v_cmpx_o_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75775 { 21587 /* v_cmpx_t_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75799 { 21677 /* v_cmpx_t_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75825 { 21767 /* v_cmpx_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75826 { 21767 /* v_cmpx_tru_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75827 { 21767 /* v_cmpx_tru_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75868 { 21869 /* v_cmpx_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX8GFX9 },
75869 { 21869 /* v_cmpx_u_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75870 { 21869 /* v_cmpx_u_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75975 { 21973 /* v_cos_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
75976 { 21973 /* v_cos_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
75977 { 21973 /* v_cos_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76124 { 22059 /* v_cvt_f16_i16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76125 { 22059 /* v_cvt_f16_i16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76156 { 22073 /* v_cvt_f16_u16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76157 { 22073 /* v_cvt_f16_u16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76493 { 22271 /* v_cvt_i16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
76494 { 22271 /* v_cvt_i16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76745 { 22561 /* v_cvt_u16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
76746 { 22561 /* v_cvt_u16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76980 { 22899 /* v_exp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
76981 { 22899 /* v_exp_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
76982 { 22899 /* v_exp_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77155 { 22969 /* v_floor_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77156 { 22969 /* v_floor_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77157 { 22969 /* v_floor_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77333 { 23168 /* v_fract_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77334 { 23168 /* v_fract_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77335 { 23168 /* v_fract_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77414 { 23204 /* v_frexp_exp_i16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77415 { 23204 /* v_frexp_exp_i16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77489 { 23264 /* v_frexp_mant_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77490 { 23264 /* v_frexp_mant_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77491 { 23264 /* v_frexp_mant_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77601 { 23348 /* v_interp_p1ll_f16 */, 4 /* 2 */, MCK_Attr, AMFBS_Has16BitInsts_isGFX8GFX9 },
77602 { 23348 /* v_interp_p1ll_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77603 { 23348 /* v_interp_p1ll_f16 */, 64 /* 6 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77604 { 23348 /* v_interp_p1ll_f16 */, 32 /* 5 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77605 { 23348 /* v_interp_p1ll_f16 */, 16 /* 4 */, MCK_ImmHigh, AMFBS_Has16BitInsts_isGFX8GFX9 },
77612 { 23366 /* v_interp_p1lv_f16 */, 4 /* 2 */, MCK_Attr, AMFBS_Has16BitInsts_isGFX8GFX9 },
77613 { 23366 /* v_interp_p1lv_f16 */, 16 /* 4 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77614 { 23366 /* v_interp_p1lv_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77615 { 23366 /* v_interp_p1lv_f16 */, 128 /* 7 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77616 { 23366 /* v_interp_p1lv_f16 */, 64 /* 6 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77617 { 23366 /* v_interp_p1lv_f16 */, 32 /* 5 */, MCK_ImmHigh, AMFBS_Has16BitInsts_isGFX8GFX9 },
77651 { 23439 /* v_ldexp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77652 { 23439 /* v_ldexp_f16 */, 4 /* 2 */, MCK_RegOrImmWithInt32InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77653 { 23439 /* v_ldexp_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77654 { 23439 /* v_ldexp_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77723 { 23501 /* v_log_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77724 { 23501 /* v_log_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77725 { 23501 /* v_log_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77905 { 23695 /* v_mac_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
77906 { 23695 /* v_mac_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
77907 { 23695 /* v_mac_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78045 { 23970 /* v_madak_f16 */, 8 /* 3 */, MCK_KImmFP16, AMFBS_Has16BitInsts_isGFX8GFX9 },
78049 { 23994 /* v_madmk_f16 */, 4 /* 2 */, MCK_KImmFP16, AMFBS_Has16BitInsts_isGFX8GFX9 },
78081 { 24084 /* v_max_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
78082 { 24084 /* v_max_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78083 { 24084 /* v_max_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78370 { 24775 /* v_min_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
78371 { 24775 /* v_min_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78372 { 24775 /* v_min_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78614 { 24989 /* v_mul_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
78615 { 24989 /* v_mul_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
78616 { 24989 /* v_mul_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79146 { 25609 /* v_rcp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79147 { 25609 /* v_rcp_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79148 { 25609 /* v_rcp_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79272 { 25707 /* v_rndne_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79273 { 25707 /* v_rndne_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79274 { 25707 /* v_rndne_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79362 { 25775 /* v_rsq_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79363 { 25775 /* v_rsq_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79364 { 25775 /* v_rsq_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79496 { 25906 /* v_sin_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79497 { 25906 /* v_sin_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79498 { 25906 /* v_sin_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79571 { 25926 /* v_sqrt_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79572 { 25926 /* v_sqrt_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79573 { 25926 /* v_sqrt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79710 { 25988 /* v_sub_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79711 { 25988 /* v_sub_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79712 { 25988 /* v_sub_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79957 { 26191 /* v_subrev_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
79958 { 26191 /* v_subrev_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
79959 { 26191 /* v_subrev_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
80105 { 26314 /* v_trunc_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX8GFX9 },
80106 { 26314 /* v_trunc_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX8GFX9 },
80107 { 26314 /* v_trunc_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX8GFX9 },