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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc18857 { 13251 /* v_add_f16 */, AMDGPU::V_ADD_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
18885 { 13598 /* v_ceil_f16 */, AMDGPU::V_CEIL_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
18902 { 13657 /* v_cmp_class_f16_e32 */, AMDGPU::V_CMP_CLASS_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
18934 { 13762 /* v_cmp_eq_f16_e32 */, AMDGPU::V_CMP_EQ_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
18966 { 13852 /* v_cmp_eq_i16_e32 */, AMDGPU::V_CMP_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
18998 { 13942 /* v_cmp_eq_u16_e32 */, AMDGPU::V_CMP_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19030 { 14031 /* v_cmp_f_f16_e32 */, AMDGPU::V_CMP_F_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19118 { 14284 /* v_cmp_ge_f16_e32 */, AMDGPU::V_CMP_GE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19150 { 14374 /* v_cmp_ge_i16_e32 */, AMDGPU::V_CMP_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19182 { 14464 /* v_cmp_ge_u16_e32 */, AMDGPU::V_CMP_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19214 { 14554 /* v_cmp_gt_f16_e32 */, AMDGPU::V_CMP_GT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19246 { 14644 /* v_cmp_gt_i16_e32 */, AMDGPU::V_CMP_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19278 { 14734 /* v_cmp_gt_u16_e32 */, AMDGPU::V_CMP_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19310 { 14824 /* v_cmp_le_f16_e32 */, AMDGPU::V_CMP_LE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19342 { 14914 /* v_cmp_le_i16_e32 */, AMDGPU::V_CMP_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19374 { 15004 /* v_cmp_le_u16_e32 */, AMDGPU::V_CMP_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19406 { 15094 /* v_cmp_lg_f16_e32 */, AMDGPU::V_CMP_LG_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19438 { 15184 /* v_cmp_lt_f16_e32 */, AMDGPU::V_CMP_LT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19470 { 15274 /* v_cmp_lt_i16_e32 */, AMDGPU::V_CMP_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19502 { 15364 /* v_cmp_lt_u16_e32 */, AMDGPU::V_CMP_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19534 { 15454 /* v_cmp_ne_i16_e32 */, AMDGPU::V_CMP_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19566 { 15544 /* v_cmp_ne_u16_e32 */, AMDGPU::V_CMP_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
19598 { 15635 /* v_cmp_neq_f16_e32 */, AMDGPU::V_CMP_NEQ_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19630 { 15731 /* v_cmp_nge_f16_e32 */, AMDGPU::V_CMP_NGE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19662 { 15827 /* v_cmp_ngt_f16_e32 */, AMDGPU::V_CMP_NGT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19694 { 15923 /* v_cmp_nle_f16_e32 */, AMDGPU::V_CMP_NLE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19726 { 16019 /* v_cmp_nlg_f16_e32 */, AMDGPU::V_CMP_NLG_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19758 { 16115 /* v_cmp_nlt_f16_e32 */, AMDGPU::V_CMP_NLT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19790 { 16209 /* v_cmp_o_f16_e32 */, AMDGPU::V_CMP_O_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19878 { 16463 /* v_cmp_tru_f16_e32 */, AMDGPU::V_CMP_TRU_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
19910 { 16557 /* v_cmp_u_f16_e32 */, AMDGPU::V_CMP_U_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20196 { 18790 /* v_cmpx_class_f16_e32 */, AMDGPU::V_CMPX_CLASS_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20222 { 18901 /* v_cmpx_eq_f16_e32 */, AMDGPU::V_CMPX_EQ_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20248 { 18997 /* v_cmpx_eq_i16_e32 */, AMDGPU::V_CMPX_EQ_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20274 { 19093 /* v_cmpx_eq_u16_e32 */, AMDGPU::V_CMPX_EQ_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20300 { 19188 /* v_cmpx_f_f16_e32 */, AMDGPU::V_CMPX_F_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20374 { 19459 /* v_cmpx_ge_f16_e32 */, AMDGPU::V_CMPX_GE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20400 { 19555 /* v_cmpx_ge_i16_e32 */, AMDGPU::V_CMPX_GE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20426 { 19651 /* v_cmpx_ge_u16_e32 */, AMDGPU::V_CMPX_GE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20452 { 19747 /* v_cmpx_gt_f16_e32 */, AMDGPU::V_CMPX_GT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20478 { 19843 /* v_cmpx_gt_i16_e32 */, AMDGPU::V_CMPX_GT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20504 { 19939 /* v_cmpx_gt_u16_e32 */, AMDGPU::V_CMPX_GT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20530 { 20035 /* v_cmpx_le_f16_e32 */, AMDGPU::V_CMPX_LE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20556 { 20131 /* v_cmpx_le_i16_e32 */, AMDGPU::V_CMPX_LE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20582 { 20227 /* v_cmpx_le_u16_e32 */, AMDGPU::V_CMPX_LE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20608 { 20323 /* v_cmpx_lg_f16_e32 */, AMDGPU::V_CMPX_LG_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20634 { 20419 /* v_cmpx_lt_f16_e32 */, AMDGPU::V_CMPX_LT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20660 { 20515 /* v_cmpx_lt_i16_e32 */, AMDGPU::V_CMPX_LT_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20686 { 20611 /* v_cmpx_lt_u16_e32 */, AMDGPU::V_CMPX_LT_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20712 { 20707 /* v_cmpx_ne_i16_e32 */, AMDGPU::V_CMPX_NE_I16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20738 { 20803 /* v_cmpx_ne_u16_e32 */, AMDGPU::V_CMPX_NE_U16_e32_gfx10, Convert__VSrcB161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VGPR_32 }, },
20764 { 20900 /* v_cmpx_neq_f16_e32 */, AMDGPU::V_CMPX_NEQ_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20790 { 21002 /* v_cmpx_nge_f16_e32 */, AMDGPU::V_CMPX_NGE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20816 { 21104 /* v_cmpx_ngt_f16_e32 */, AMDGPU::V_CMPX_NGT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20842 { 21206 /* v_cmpx_nle_f16_e32 */, AMDGPU::V_CMPX_NLE_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20868 { 21308 /* v_cmpx_nlg_f16_e32 */, AMDGPU::V_CMPX_NLG_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20894 { 21410 /* v_cmpx_nlt_f16_e32 */, AMDGPU::V_CMPX_NLT_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20920 { 21510 /* v_cmpx_o_f16_e32 */, AMDGPU::V_CMPX_O_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
20994 { 21782 /* v_cmpx_tru_f16_e32 */, AMDGPU::V_CMPX_TRU_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
21020 { 21882 /* v_cmpx_u_f16_e32 */, AMDGPU::V_CMPX_U_F16_e32_gfx10, Convert__VSrcF161_0__Reg1_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcF16, MCK_VGPR_32 }, },
21051 { 21973 /* v_cos_f16 */, AMDGPU::V_COS_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21059 { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e32_gfx10, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16 }, },
21061 { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e32_gfx10, Convert__Reg1_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16 }, },
21099 { 22271 /* v_cvt_i16_f16 */, AMDGPU::V_CVT_I16_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21124 { 22561 /* v_cvt_u16_f16 */, AMDGPU::V_CVT_U16_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21138 { 22899 /* v_exp_f16 */, AMDGPU::V_EXP_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21154 { 22969 /* v_floor_f16 */, AMDGPU::V_FLOOR_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21169 { 23168 /* v_fract_f16 */, AMDGPU::V_FRACT_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21177 { 23204 /* v_frexp_exp_i16_f16 */, AMDGPU::V_FREXP_EXP_I16_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21185 { 23264 /* v_frexp_mant_f16 */, AMDGPU::V_FREXP_MANT_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21205 { 23439 /* v_ldexp_f16 */, AMDGPU::V_LDEXP_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21209 { 23501 /* v_log_f16 */, AMDGPU::V_LOG_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21240 { 24084 /* v_max_f16 */, AMDGPU::V_MAX_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21256 { 24775 /* v_min_f16 */, AMDGPU::V_MIN_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21286 { 24989 /* v_mul_f16 */, AMDGPU::V_MUL_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21321 { 25609 /* v_rcp_f16 */, AMDGPU::V_RCP_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21337 { 25707 /* v_rndne_f16 */, AMDGPU::V_RNDNE_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21347 { 25775 /* v_rsq_f16 */, AMDGPU::V_RSQ_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21359 { 25906 /* v_sin_f16 */, AMDGPU::V_SIN_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21364 { 25926 /* v_sqrt_f16 */, AMDGPU::V_SQRT_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21378 { 25988 /* v_sub_f16 */, AMDGPU::V_SUB_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21404 { 26191 /* v_subrev_f16 */, AMDGPU::V_SUBREV_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1__Reg1_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16, MCK_VGPR_32 }, },
21417 { 26314 /* v_trunc_f16 */, AMDGPU::V_TRUNC_F16_e32_gfx10, Convert__Reg1_0__VSrcF161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcF16 }, },
21447 { 13251 /* v_add_f16 */, AMDGPU::V_ADD_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
21462 { 13342 /* v_add_nc_u16 */, AMDGPU::V_ADD_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21486 { 13489 /* v_ashrrev_i16 */, AMDGPU::V_ASHRREV_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
21510 { 13598 /* v_ceil_f16 */, AMDGPU::V_CEIL_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
21521 { 13641 /* v_cmp_class_f16 */, AMDGPU::V_CMP_CLASS_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21529 { 13749 /* v_cmp_eq_f16 */, AMDGPU::V_CMP_EQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21537 { 13839 /* v_cmp_eq_i16 */, AMDGPU::V_CMP_EQ_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21545 { 13929 /* v_cmp_eq_u16 */, AMDGPU::V_CMP_EQ_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21553 { 14019 /* v_cmp_f_f16 */, AMDGPU::V_CMP_F_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21575 { 14271 /* v_cmp_ge_f16 */, AMDGPU::V_CMP_GE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21583 { 14361 /* v_cmp_ge_i16 */, AMDGPU::V_CMP_GE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21591 { 14451 /* v_cmp_ge_u16 */, AMDGPU::V_CMP_GE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21599 { 14541 /* v_cmp_gt_f16 */, AMDGPU::V_CMP_GT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21607 { 14631 /* v_cmp_gt_i16 */, AMDGPU::V_CMP_GT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21615 { 14721 /* v_cmp_gt_u16 */, AMDGPU::V_CMP_GT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21623 { 14811 /* v_cmp_le_f16 */, AMDGPU::V_CMP_LE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21631 { 14901 /* v_cmp_le_i16 */, AMDGPU::V_CMP_LE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21639 { 14991 /* v_cmp_le_u16 */, AMDGPU::V_CMP_LE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21647 { 15081 /* v_cmp_lg_f16 */, AMDGPU::V_CMP_LG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21655 { 15171 /* v_cmp_lt_f16 */, AMDGPU::V_CMP_LT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21663 { 15261 /* v_cmp_lt_i16 */, AMDGPU::V_CMP_LT_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21671 { 15351 /* v_cmp_lt_u16 */, AMDGPU::V_CMP_LT_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21679 { 15441 /* v_cmp_ne_i16 */, AMDGPU::V_CMP_NE_I16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21687 { 15531 /* v_cmp_ne_u16 */, AMDGPU::V_CMP_NE_U16_e64_gfx10, Convert__BoolReg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_VSrcB16, MCK_VSrcB16 }, },
21695 { 15621 /* v_cmp_neq_f16 */, AMDGPU::V_CMP_NEQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21703 { 15717 /* v_cmp_nge_f16 */, AMDGPU::V_CMP_NGE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21711 { 15813 /* v_cmp_ngt_f16 */, AMDGPU::V_CMP_NGT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21719 { 15909 /* v_cmp_nle_f16 */, AMDGPU::V_CMP_NLE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21727 { 16005 /* v_cmp_nlg_f16 */, AMDGPU::V_CMP_NLG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21735 { 16101 /* v_cmp_nlt_f16 */, AMDGPU::V_CMP_NLT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21743 { 16197 /* v_cmp_o_f16 */, AMDGPU::V_CMP_O_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21765 { 16449 /* v_cmp_tru_f16 */, AMDGPU::V_CMP_TRU_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21773 { 16545 /* v_cmp_u_f16 */, AMDGPU::V_CMP_U_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_BoolReg, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21845 { 18773 /* v_cmpx_class_f16 */, AMDGPU::V_CMPX_CLASS_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_VSrcB32 }, },
21853 { 18887 /* v_cmpx_eq_f16 */, AMDGPU::V_CMPX_EQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21861 { 18983 /* v_cmpx_eq_i16 */, AMDGPU::V_CMPX_EQ_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21869 { 19079 /* v_cmpx_eq_u16 */, AMDGPU::V_CMPX_EQ_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21877 { 19175 /* v_cmpx_f_f16 */, AMDGPU::V_CMPX_F_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21899 { 19445 /* v_cmpx_ge_f16 */, AMDGPU::V_CMPX_GE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21907 { 19541 /* v_cmpx_ge_i16 */, AMDGPU::V_CMPX_GE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21915 { 19637 /* v_cmpx_ge_u16 */, AMDGPU::V_CMPX_GE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21923 { 19733 /* v_cmpx_gt_f16 */, AMDGPU::V_CMPX_GT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21931 { 19829 /* v_cmpx_gt_i16 */, AMDGPU::V_CMPX_GT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21939 { 19925 /* v_cmpx_gt_u16 */, AMDGPU::V_CMPX_GT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21947 { 20021 /* v_cmpx_le_f16 */, AMDGPU::V_CMPX_LE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21955 { 20117 /* v_cmpx_le_i16 */, AMDGPU::V_CMPX_LE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21963 { 20213 /* v_cmpx_le_u16 */, AMDGPU::V_CMPX_LE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21971 { 20309 /* v_cmpx_lg_f16 */, AMDGPU::V_CMPX_LG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21979 { 20405 /* v_cmpx_lt_f16 */, AMDGPU::V_CMPX_LT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
21987 { 20501 /* v_cmpx_lt_i16 */, AMDGPU::V_CMPX_LT_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
21995 { 20597 /* v_cmpx_lt_u16 */, AMDGPU::V_CMPX_LT_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22003 { 20693 /* v_cmpx_ne_i16 */, AMDGPU::V_CMPX_NE_I16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22011 { 20789 /* v_cmpx_ne_u16 */, AMDGPU::V_CMPX_NE_U16_e64_gfx10, Convert__VSrcB161_0__VSrcB161_1, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VSrcB16, MCK_VSrcB16 }, },
22019 { 20885 /* v_cmpx_neq_f16 */, AMDGPU::V_CMPX_NEQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22027 { 20987 /* v_cmpx_nge_f16 */, AMDGPU::V_CMPX_NGE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22035 { 21089 /* v_cmpx_ngt_f16 */, AMDGPU::V_CMPX_NGT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22043 { 21191 /* v_cmpx_nle_f16 */, AMDGPU::V_CMPX_NLE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22051 { 21293 /* v_cmpx_nlg_f16 */, AMDGPU::V_CMPX_NLG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22059 { 21395 /* v_cmpx_nlt_f16 */, AMDGPU::V_CMPX_NLT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22067 { 21497 /* v_cmpx_o_f16 */, AMDGPU::V_CMPX_O_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22089 { 21767 /* v_cmpx_tru_f16 */, AMDGPU::V_CMPX_TRU_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22097 { 21869 /* v_cmpx_u_f16 */, AMDGPU::V_CMPX_U_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22114 { 21973 /* v_cos_f16 */, AMDGPU::V_COS_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22134 { 22059 /* v_cvt_f16_i16 */, AMDGPU::V_CVT_F16_I16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22136 { 22073 /* v_cvt_f16_u16 */, AMDGPU::V_CVT_F16_U16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_ImmClampSI, MCK_ImmOModSI }, },
22174 { 22271 /* v_cvt_i16_f16 */, AMDGPU::V_CVT_I16_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22220 { 22561 /* v_cvt_u16_f16 */, AMDGPU::V_CVT_U16_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22264 { 22899 /* v_exp_f16 */, AMDGPU::V_EXP_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22280 { 22969 /* v_floor_f16 */, AMDGPU::V_FLOOR_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22307 { 23168 /* v_fract_f16 */, AMDGPU::V_FRACT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22315 { 23204 /* v_frexp_exp_i16_f16 */, AMDGPU::V_FREXP_EXP_I16_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI }, },
22323 { 23264 /* v_frexp_mant_f16 */, AMDGPU::V_FREXP_MANT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22335 { 23348 /* v_interp_p1ll_f16 */, AMDGPU::V_INTERP_P1LL_F16_gfx10, ConvertCustom_cvtVOP3Interp, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_Attr, MCK_AttrChan, MCK_ImmHigh, MCK_ImmClampSI, MCK_ImmOModSI }, },
22337 { 23366 /* v_interp_p1lv_f16 */, AMDGPU::V_INTERP_P1LV_F16_gfx10, ConvertCustom_cvtVOP3Interp, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_Attr, MCK_AttrChan, MCK_RegOrImmWithFP16InputMods, MCK_ImmHigh, MCK_ImmClampSI, MCK_ImmOModSI }, },
22339 { 23384 /* v_interp_p2_f16 */, AMDGPU::V_INTERP_P2_F16_gfx10, ConvertCustom_cvtVOP3Interp, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP32InputMods, MCK_Attr, MCK_AttrChan, MCK_RegOrImmWithFP32InputMods, MCK_ImmHigh, MCK_ImmClampSI }, },
22345 { 23439 /* v_ldexp_f16 */, AMDGPU::V_LDEXP_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithInt32InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22358 { 23501 /* v_log_f16 */, AMDGPU::V_LOG_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22372 { 23589 /* v_lshlrev_b16 */, AMDGPU::V_LSHLREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22381 { 23653 /* v_lshrrev_b16 */, AMDGPU::V_LSHRREV_B16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22444 { 24084 /* v_max_f16 */, AMDGPU::V_MAX_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22453 { 24114 /* v_max_i16 */, AMDGPU::V_MAX_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22459 { 24151 /* v_max_u16 */, AMDGPU::V_MAX_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22519 { 24775 /* v_min_f16 */, AMDGPU::V_MIN_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22528 { 24805 /* v_min_i16 */, AMDGPU::V_MIN_I16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22534 { 24842 /* v_min_u16 */, AMDGPU::V_MIN_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22563 { 24989 /* v_mul_f16 */, AMDGPU::V_MUL_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22593 { 25123 /* v_mul_lo_u16 */, AMDGPU::V_MUL_LO_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22663 { 25609 /* v_rcp_f16 */, AMDGPU::V_RCP_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22675 { 25707 /* v_rndne_f16 */, AMDGPU::V_RNDNE_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22685 { 25775 /* v_rsq_f16 */, AMDGPU::V_RSQ_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22709 { 25906 /* v_sin_f16 */, AMDGPU::V_SIN_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22714 { 25926 /* v_sqrt_f16 */, AMDGPU::V_SQRT_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22729 { 25988 /* v_sub_f16 */, AMDGPU::V_SUB_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22739 { 26054 /* v_sub_nc_u16 */, AMDGPU::V_SUB_NC_U16_gfx10, Convert__Reg1_0__VSrcB161_1__VSrcB161_2, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_VSrcB16, MCK_VSrcB16 }, },
22761 { 26191 /* v_subrev_f16 */, AMDGPU::V_SUBREV_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
22774 { 26314 /* v_trunc_f16 */, AMDGPU::V_TRUNC_F16_e64_gfx10, ConvertCustom_cvtVOP3, AMFBS_Has16BitInsts_isGFX10Plus, { MCK_VGPR_32, MCK_RegOrImmWithFP16InputMods, MCK_ImmClampSI, MCK_ImmOModSI }, },
72905 { 13251 /* v_add_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
72906 { 13251 /* v_add_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
72907 { 13251 /* v_add_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73180 { 13598 /* v_ceil_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73181 { 13598 /* v_ceil_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
73182 { 13598 /* v_ceil_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73262 { 13641 /* v_cmp_class_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73263 { 13641 /* v_cmp_class_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73308 { 13749 /* v_cmp_eq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73309 { 13749 /* v_cmp_eq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73310 { 13749 /* v_cmp_eq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73356 { 13839 /* v_cmp_eq_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73388 { 13929 /* v_cmp_eq_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73420 { 14019 /* v_cmp_f_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73421 { 14019 /* v_cmp_f_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73422 { 14019 /* v_cmp_f_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73522 { 14271 /* v_cmp_ge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73523 { 14271 /* v_cmp_ge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73524 { 14271 /* v_cmp_ge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73570 { 14361 /* v_cmp_ge_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73602 { 14451 /* v_cmp_ge_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73634 { 14541 /* v_cmp_gt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73635 { 14541 /* v_cmp_gt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73636 { 14541 /* v_cmp_gt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73682 { 14631 /* v_cmp_gt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73714 { 14721 /* v_cmp_gt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73746 { 14811 /* v_cmp_le_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73747 { 14811 /* v_cmp_le_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73748 { 14811 /* v_cmp_le_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73794 { 14901 /* v_cmp_le_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73826 { 14991 /* v_cmp_le_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73858 { 15081 /* v_cmp_lg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73859 { 15081 /* v_cmp_lg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73860 { 15081 /* v_cmp_lg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73906 { 15171 /* v_cmp_lt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73907 { 15171 /* v_cmp_lt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
73908 { 15171 /* v_cmp_lt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
73954 { 15261 /* v_cmp_lt_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
73986 { 15351 /* v_cmp_lt_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74018 { 15441 /* v_cmp_ne_i16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74050 { 15531 /* v_cmp_ne_u16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74082 { 15621 /* v_cmp_neq_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74083 { 15621 /* v_cmp_neq_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74084 { 15621 /* v_cmp_neq_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74130 { 15717 /* v_cmp_nge_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74131 { 15717 /* v_cmp_nge_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74132 { 15717 /* v_cmp_nge_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74178 { 15813 /* v_cmp_ngt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74179 { 15813 /* v_cmp_ngt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74180 { 15813 /* v_cmp_ngt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74226 { 15909 /* v_cmp_nle_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74227 { 15909 /* v_cmp_nle_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74228 { 15909 /* v_cmp_nle_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74274 { 16005 /* v_cmp_nlg_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74275 { 16005 /* v_cmp_nlg_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74276 { 16005 /* v_cmp_nlg_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74322 { 16101 /* v_cmp_nlt_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74323 { 16101 /* v_cmp_nlt_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74324 { 16101 /* v_cmp_nlt_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74370 { 16197 /* v_cmp_o_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74371 { 16197 /* v_cmp_o_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74372 { 16197 /* v_cmp_o_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74472 { 16449 /* v_cmp_tru_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74473 { 16449 /* v_cmp_tru_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74474 { 16449 /* v_cmp_tru_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74520 { 16545 /* v_cmp_u_f16 */, 1 /* 0 */, MCK_BoolReg, AMFBS_Has16BitInsts_isGFX10Plus },
74521 { 16545 /* v_cmp_u_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74522 { 16545 /* v_cmp_u_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74760 { 18773 /* v_cmpx_class_f16 */, 1 /* 0 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74801 { 18887 /* v_cmpx_eq_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74802 { 18887 /* v_cmpx_eq_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74898 { 19175 /* v_cmpx_f_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74899 { 19175 /* v_cmpx_f_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
74989 { 19445 /* v_cmpx_ge_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
74990 { 19445 /* v_cmpx_ge_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75086 { 19733 /* v_cmpx_gt_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75087 { 19733 /* v_cmpx_gt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75183 { 20021 /* v_cmpx_le_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75184 { 20021 /* v_cmpx_le_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75280 { 20309 /* v_cmpx_lg_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75281 { 20309 /* v_cmpx_lg_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75323 { 20405 /* v_cmpx_lt_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75324 { 20405 /* v_cmpx_lt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75474 { 20885 /* v_cmpx_neq_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75475 { 20885 /* v_cmpx_neq_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75517 { 20987 /* v_cmpx_nge_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75518 { 20987 /* v_cmpx_nge_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75560 { 21089 /* v_cmpx_ngt_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75561 { 21089 /* v_cmpx_ngt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75603 { 21191 /* v_cmpx_nle_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75604 { 21191 /* v_cmpx_nle_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75646 { 21293 /* v_cmpx_nlg_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75647 { 21293 /* v_cmpx_nlg_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75689 { 21395 /* v_cmpx_nlt_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75690 { 21395 /* v_cmpx_nlt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75732 { 21497 /* v_cmpx_o_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75733 { 21497 /* v_cmpx_o_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75823 { 21767 /* v_cmpx_tru_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75824 { 21767 /* v_cmpx_tru_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75866 { 21869 /* v_cmpx_u_f16 */, 3 /* 0, 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75867 { 21869 /* v_cmpx_u_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
75972 { 21973 /* v_cos_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
75973 { 21973 /* v_cos_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
75974 { 21973 /* v_cos_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
76122 { 22059 /* v_cvt_f16_i16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
76123 { 22059 /* v_cvt_f16_i16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
76154 { 22073 /* v_cvt_f16_u16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
76155 { 22073 /* v_cvt_f16_u16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
76491 { 22271 /* v_cvt_i16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
76492 { 22271 /* v_cvt_i16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
76743 { 22561 /* v_cvt_u16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
76744 { 22561 /* v_cvt_u16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
76977 { 22899 /* v_exp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
76978 { 22899 /* v_exp_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
76979 { 22899 /* v_exp_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77152 { 22969 /* v_floor_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77153 { 22969 /* v_floor_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77154 { 22969 /* v_floor_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77330 { 23168 /* v_fract_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77331 { 23168 /* v_fract_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77332 { 23168 /* v_fract_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77412 { 23204 /* v_frexp_exp_i16_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77413 { 23204 /* v_frexp_exp_i16_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77486 { 23264 /* v_frexp_mant_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77487 { 23264 /* v_frexp_mant_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77488 { 23264 /* v_frexp_mant_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77596 { 23348 /* v_interp_p1ll_f16 */, 4 /* 2 */, MCK_Attr, AMFBS_Has16BitInsts_isGFX10Plus },
77597 { 23348 /* v_interp_p1ll_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77598 { 23348 /* v_interp_p1ll_f16 */, 64 /* 6 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77599 { 23348 /* v_interp_p1ll_f16 */, 32 /* 5 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77600 { 23348 /* v_interp_p1ll_f16 */, 16 /* 4 */, MCK_ImmHigh, AMFBS_Has16BitInsts_isGFX10Plus },
77606 { 23366 /* v_interp_p1lv_f16 */, 4 /* 2 */, MCK_Attr, AMFBS_Has16BitInsts_isGFX10Plus },
77607 { 23366 /* v_interp_p1lv_f16 */, 16 /* 4 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77608 { 23366 /* v_interp_p1lv_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP32InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77609 { 23366 /* v_interp_p1lv_f16 */, 128 /* 7 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77610 { 23366 /* v_interp_p1lv_f16 */, 64 /* 6 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77611 { 23366 /* v_interp_p1lv_f16 */, 32 /* 5 */, MCK_ImmHigh, AMFBS_Has16BitInsts_isGFX10Plus },
77618 { 23384 /* v_interp_p2_f16 */, 4 /* 2 */, MCK_Attr, AMFBS_Has16BitInsts_isGFX10Plus },
77619 { 23384 /* v_interp_p2_f16 */, 18 /* 1, 4 */, MCK_RegOrImmWithFP32InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77620 { 23384 /* v_interp_p2_f16 */, 64 /* 6 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77621 { 23384 /* v_interp_p2_f16 */, 32 /* 5 */, MCK_ImmHigh, AMFBS_Has16BitInsts_isGFX10Plus },
77647 { 23439 /* v_ldexp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77648 { 23439 /* v_ldexp_f16 */, 4 /* 2 */, MCK_RegOrImmWithInt32InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77649 { 23439 /* v_ldexp_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77650 { 23439 /* v_ldexp_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
77720 { 23501 /* v_log_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
77721 { 23501 /* v_log_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
77722 { 23501 /* v_log_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
78078 { 24084 /* v_max_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
78079 { 24084 /* v_max_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
78080 { 24084 /* v_max_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
78367 { 24775 /* v_min_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
78368 { 24775 /* v_min_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
78369 { 24775 /* v_min_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
78611 { 24989 /* v_mul_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
78612 { 24989 /* v_mul_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
78613 { 24989 /* v_mul_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79143 { 25609 /* v_rcp_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79144 { 25609 /* v_rcp_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79145 { 25609 /* v_rcp_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79269 { 25707 /* v_rndne_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79270 { 25707 /* v_rndne_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79271 { 25707 /* v_rndne_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79359 { 25775 /* v_rsq_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79360 { 25775 /* v_rsq_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79361 { 25775 /* v_rsq_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79493 { 25906 /* v_sin_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79494 { 25906 /* v_sin_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79495 { 25906 /* v_sin_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79568 { 25926 /* v_sqrt_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79569 { 25926 /* v_sqrt_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79570 { 25926 /* v_sqrt_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79707 { 25988 /* v_sub_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79708 { 25988 /* v_sub_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79709 { 25988 /* v_sub_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
79954 { 26191 /* v_subrev_f16 */, 6 /* 1, 2 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
79955 { 26191 /* v_subrev_f16 */, 16 /* 4 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
79956 { 26191 /* v_subrev_f16 */, 8 /* 3 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },
80102 { 26314 /* v_trunc_f16 */, 2 /* 1 */, MCK_RegOrImmWithFP16InputMods, AMFBS_Has16BitInsts_isGFX10Plus },
80103 { 26314 /* v_trunc_f16 */, 8 /* 3 */, MCK_ImmOModSI, AMFBS_Has16BitInsts_isGFX10Plus },
80104 { 26314 /* v_trunc_f16 */, 4 /* 2 */, MCK_ImmClampSI, AMFBS_Has16BitInsts_isGFX10Plus },