|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12305 if ((FB[AArch64::FeatureTLB_RMI]))
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc15771 if ((FB[AArch64::FeatureTLB_RMI]))
gen/lib/Target/AArch64/AArch64GenSubtargetInfo.inc 315 { "tlb-rmi", "Enable v8.4-A TLB Range and Maintenance Instructions", AArch64::FeatureTLB_RMI, { { { 0x0ULL, 0x0ULL, 0x0ULL, } } } },
17910 if (Bits[AArch64::FeatureTLB_RMI]) HasTLB_RMI = true;
gen/lib/Target/AArch64/AArch64GenSystemOperands.inc 4658 { "VMALLE1OS", 0x408, false, {AArch64::FeatureTLB_RMI} }, // 32
4659 { "VAE1OS", 0x409, true, {AArch64::FeatureTLB_RMI} }, // 33
4660 { "ASIDE1OS", 0x40A, true, {AArch64::FeatureTLB_RMI} }, // 34
4661 { "VAAE1OS", 0x40B, true, {AArch64::FeatureTLB_RMI} }, // 35
4662 { "VALE1OS", 0x40D, true, {AArch64::FeatureTLB_RMI} }, // 36
4663 { "VAALE1OS", 0x40F, true, {AArch64::FeatureTLB_RMI} }, // 37
4664 { "IPAS2E1OS", 0x2420, true, {AArch64::FeatureTLB_RMI} }, // 38
4665 { "IPAS2LE1OS", 0x2424, true, {AArch64::FeatureTLB_RMI} }, // 39
4666 { "VAE2OS", 0x2409, true, {AArch64::FeatureTLB_RMI} }, // 40
4667 { "VALE2OS", 0x240D, true, {AArch64::FeatureTLB_RMI} }, // 41
4668 { "VMALLS12E1OS", 0x240E, false, {AArch64::FeatureTLB_RMI} }, // 42
4669 { "VAE3OS", 0x3409, true, {AArch64::FeatureTLB_RMI} }, // 43
4670 { "VALE3OS", 0x340D, true, {AArch64::FeatureTLB_RMI} }, // 44
4671 { "ALLE2OS", 0x2408, false, {AArch64::FeatureTLB_RMI} }, // 45
4672 { "ALLE1OS", 0x240C, false, {AArch64::FeatureTLB_RMI} }, // 46
4673 { "ALLE3OS", 0x3408, false, {AArch64::FeatureTLB_RMI} }, // 47
4674 { "RVAE1", 0x431, true, {AArch64::FeatureTLB_RMI} }, // 48
4675 { "RVAAE1", 0x433, true, {AArch64::FeatureTLB_RMI} }, // 49
4676 { "RVALE1", 0x435, true, {AArch64::FeatureTLB_RMI} }, // 50
4677 { "RVAALE1", 0x437, true, {AArch64::FeatureTLB_RMI} }, // 51
4678 { "RVAE1IS", 0x411, true, {AArch64::FeatureTLB_RMI} }, // 52
4679 { "RVAAE1IS", 0x413, true, {AArch64::FeatureTLB_RMI} }, // 53
4680 { "RVALE1IS", 0x415, true, {AArch64::FeatureTLB_RMI} }, // 54
4681 { "RVAALE1IS", 0x417, true, {AArch64::FeatureTLB_RMI} }, // 55
4682 { "RVAE1OS", 0x429, true, {AArch64::FeatureTLB_RMI} }, // 56
4683 { "RVAAE1OS", 0x42B, true, {AArch64::FeatureTLB_RMI} }, // 57
4684 { "RVALE1OS", 0x42D, true, {AArch64::FeatureTLB_RMI} }, // 58
4685 { "RVAALE1OS", 0x42F, true, {AArch64::FeatureTLB_RMI} }, // 59
4686 { "RIPAS2E1IS", 0x2402, true, {AArch64::FeatureTLB_RMI} }, // 60
4687 { "RIPAS2LE1IS", 0x2406, true, {AArch64::FeatureTLB_RMI} }, // 61
4688 { "RIPAS2E1", 0x2422, true, {AArch64::FeatureTLB_RMI} }, // 62
4689 { "RIPAS2LE1", 0x2426, true, {AArch64::FeatureTLB_RMI} }, // 63
4690 { "RIPAS2E1OS", 0x2423, true, {AArch64::FeatureTLB_RMI} }, // 64
4691 { "RIPAS2LE1OS", 0x2427, true, {AArch64::FeatureTLB_RMI} }, // 65
4692 { "RVAE2", 0x2431, true, {AArch64::FeatureTLB_RMI} }, // 66
4693 { "RVALE2", 0x2435, true, {AArch64::FeatureTLB_RMI} }, // 67
4694 { "RVAE2IS", 0x2411, true, {AArch64::FeatureTLB_RMI} }, // 68
4695 { "RVALE2IS", 0x2415, true, {AArch64::FeatureTLB_RMI} }, // 69
4696 { "RVAE2OS", 0x2429, true, {AArch64::FeatureTLB_RMI} }, // 70
4697 { "RVALE2OS", 0x242D, true, {AArch64::FeatureTLB_RMI} }, // 71
4698 { "RVAE3", 0x3431, true, {AArch64::FeatureTLB_RMI} }, // 72
4699 { "RVALE3", 0x3435, true, {AArch64::FeatureTLB_RMI} }, // 73
4700 { "RVAE3IS", 0x3411, true, {AArch64::FeatureTLB_RMI} }, // 74
4701 { "RVALE3IS", 0x3415, true, {AArch64::FeatureTLB_RMI} }, // 75
4702 { "RVAE3OS", 0x3429, true, {AArch64::FeatureTLB_RMI} }, // 76
4703 { "RVALE3OS", 0x342D, true, {AArch64::FeatureTLB_RMI} }, // 77
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 2821 {"tlb-rmi", {AArch64::FeatureTLB_RMI}},