reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17802 if (Bits[AArch64::FeatureAES]) HasAES = true; 17803 if (Bits[AArch64::FeatureAM]) HasAM = true; 17804 if (Bits[AArch64::FeatureAggressiveFMA]) HasAggressiveFMA = true; 17805 if (Bits[AArch64::FeatureAltFPCmp]) HasAlternativeNZCV = true; 17806 if (Bits[AArch64::FeatureAlternateSExtLoadCVTF32Pattern]) UseAlternateSExtLoadCVTF32Pattern = true; 17807 if (Bits[AArch64::FeatureArithmeticBccFusion]) HasArithmeticBccFusion = true; 17808 if (Bits[AArch64::FeatureArithmeticCbzFusion]) HasArithmeticCbzFusion = true; 17809 if (Bits[AArch64::FeatureBalanceFPOps]) BalanceFPOps = true; 17810 if (Bits[AArch64::FeatureBranchTargetId]) HasBTI = true; 17811 if (Bits[AArch64::FeatureCCIDX]) HasCCIDX = true; 17812 if (Bits[AArch64::FeatureCCPP]) HasCCPP = true; 17813 if (Bits[AArch64::FeatureCRC]) HasCRC = true; 17814 if (Bits[AArch64::FeatureCacheDeepPersist]) HasCCDP = true; 17815 if (Bits[AArch64::FeatureCallSavedX8]) CustomCallSavedXRegs[8] = true; 17816 if (Bits[AArch64::FeatureCallSavedX9]) CustomCallSavedXRegs[9] = true; 17817 if (Bits[AArch64::FeatureCallSavedX10]) CustomCallSavedXRegs[10] = true; 17818 if (Bits[AArch64::FeatureCallSavedX11]) CustomCallSavedXRegs[11] = true; 17819 if (Bits[AArch64::FeatureCallSavedX12]) CustomCallSavedXRegs[12] = true; 17820 if (Bits[AArch64::FeatureCallSavedX13]) CustomCallSavedXRegs[13] = true; 17821 if (Bits[AArch64::FeatureCallSavedX14]) CustomCallSavedXRegs[14] = true; 17822 if (Bits[AArch64::FeatureCallSavedX15]) CustomCallSavedXRegs[15] = true; 17823 if (Bits[AArch64::FeatureCallSavedX18]) CustomCallSavedXRegs[18] = true; 17824 if (Bits[AArch64::FeatureComplxNum]) HasComplxNum = true; 17825 if (Bits[AArch64::FeatureCrypto]) HasCrypto = true; 17826 if (Bits[AArch64::FeatureCustomCheapAsMoveHandling]) CustomAsCheapAsMove = true; 17827 if (Bits[AArch64::FeatureDIT]) HasDIT = true; 17828 if (Bits[AArch64::FeatureDisableLatencySchedHeuristic]) DisableLatencySchedHeuristic = true; 17829 if (Bits[AArch64::FeatureDotProd]) HasDotProd = true; 17830 if (Bits[AArch64::FeatureETE]) HasETE = true; 17831 if (Bits[AArch64::FeatureExynosCheapAsMoveHandling]) ExynosAsCheapAsMove = true; 17832 if (Bits[AArch64::FeatureFMI]) HasFMI = true; 17833 if (Bits[AArch64::FeatureFP16FML]) HasFP16FML = true; 17834 if (Bits[AArch64::FeatureFPARMv8]) HasFPARMv8 = true; 17835 if (Bits[AArch64::FeatureFRInt3264]) HasFRInt3264 = true; 17836 if (Bits[AArch64::FeatureForce32BitJumpTables]) Force32BitJumpTables = true; 17837 if (Bits[AArch64::FeatureFullFP16]) HasFullFP16 = true; 17838 if (Bits[AArch64::FeatureFuseAES]) HasFuseAES = true; 17839 if (Bits[AArch64::FeatureFuseAddress]) HasFuseAddress = true; 17840 if (Bits[AArch64::FeatureFuseArithmeticLogic]) HasFuseArithmeticLogic = true; 17841 if (Bits[AArch64::FeatureFuseCCSelect]) HasFuseCCSelect = true; 17842 if (Bits[AArch64::FeatureFuseCryptoEOR]) HasFuseCryptoEOR = true; 17843 if (Bits[AArch64::FeatureFuseLiterals]) HasFuseLiterals = true; 17844 if (Bits[AArch64::FeatureJS]) HasJS = true; 17845 if (Bits[AArch64::FeatureLOR]) HasLOR = true; 17846 if (Bits[AArch64::FeatureLSE]) HasLSE = true; 17847 if (Bits[AArch64::FeatureLSLFast]) HasLSLFast = true; 17848 if (Bits[AArch64::FeatureMPAM]) HasMPAM = true; 17849 if (Bits[AArch64::FeatureMTE]) HasMTE = true; 17850 if (Bits[AArch64::FeatureNEON]) HasNEON = true; 17851 if (Bits[AArch64::FeatureNV]) HasNV = true; 17852 if (Bits[AArch64::FeatureNoNegativeImmediates]) NegativeImmediates = false; 17853 if (Bits[AArch64::FeaturePA]) HasPA = true; 17854 if (Bits[AArch64::FeaturePAN]) HasPAN = true; 17855 if (Bits[AArch64::FeaturePAN_RWV]) HasPAN_RWV = true; 17856 if (Bits[AArch64::FeaturePMU]) HasPMU = true; 17857 if (Bits[AArch64::FeaturePerfMon]) HasPerfMon = true; 17858 if (Bits[AArch64::FeaturePostRAScheduler]) UsePostRAScheduler = true; 17859 if (Bits[AArch64::FeaturePredRes]) HasPredRes = true; 17860 if (Bits[AArch64::FeaturePredictableSelectIsExpensive]) PredictableSelectIsExpensive = true; 17861 if (Bits[AArch64::FeaturePsUAO]) HasPsUAO = true; 17862 if (Bits[AArch64::FeatureRAS]) HasRAS = true; 17863 if (Bits[AArch64::FeatureRASv8_4]) HasRASv8_4 = true; 17864 if (Bits[AArch64::FeatureRCPC]) HasRCPC = true; 17865 if (Bits[AArch64::FeatureRCPC_IMMO]) HasRCPC_IMMO = true; 17866 if (Bits[AArch64::FeatureRDM]) HasRDM = true; 17867 if (Bits[AArch64::FeatureRandGen]) HasRandGen = true; 17868 if (Bits[AArch64::FeatureReserveX1]) ReserveXRegister[1] = true; 17869 if (Bits[AArch64::FeatureReserveX2]) ReserveXRegister[2] = true; 17870 if (Bits[AArch64::FeatureReserveX3]) ReserveXRegister[3] = true; 17871 if (Bits[AArch64::FeatureReserveX4]) ReserveXRegister[4] = true; 17872 if (Bits[AArch64::FeatureReserveX5]) ReserveXRegister[5] = true; 17873 if (Bits[AArch64::FeatureReserveX6]) ReserveXRegister[6] = true; 17874 if (Bits[AArch64::FeatureReserveX7]) ReserveXRegister[7] = true; 17875 if (Bits[AArch64::FeatureReserveX9]) ReserveXRegister[9] = true; 17876 if (Bits[AArch64::FeatureReserveX10]) ReserveXRegister[10] = true; 17877 if (Bits[AArch64::FeatureReserveX11]) ReserveXRegister[11] = true; 17878 if (Bits[AArch64::FeatureReserveX12]) ReserveXRegister[12] = true; 17879 if (Bits[AArch64::FeatureReserveX13]) ReserveXRegister[13] = true; 17880 if (Bits[AArch64::FeatureReserveX14]) ReserveXRegister[14] = true; 17881 if (Bits[AArch64::FeatureReserveX15]) ReserveXRegister[15] = true; 17882 if (Bits[AArch64::FeatureReserveX18]) ReserveXRegister[18] = true; 17883 if (Bits[AArch64::FeatureReserveX20]) ReserveXRegister[20] = true; 17884 if (Bits[AArch64::FeatureReserveX21]) ReserveXRegister[21] = true; 17885 if (Bits[AArch64::FeatureReserveX22]) ReserveXRegister[22] = true; 17886 if (Bits[AArch64::FeatureReserveX23]) ReserveXRegister[23] = true; 17887 if (Bits[AArch64::FeatureReserveX24]) ReserveXRegister[24] = true; 17888 if (Bits[AArch64::FeatureReserveX25]) ReserveXRegister[25] = true; 17889 if (Bits[AArch64::FeatureReserveX26]) ReserveXRegister[26] = true; 17890 if (Bits[AArch64::FeatureReserveX27]) ReserveXRegister[27] = true; 17891 if (Bits[AArch64::FeatureReserveX28]) ReserveXRegister[28] = true; 17892 if (Bits[AArch64::FeatureSB]) HasSB = true; 17893 if (Bits[AArch64::FeatureSEL2]) HasSEL2 = true; 17894 if (Bits[AArch64::FeatureSHA2]) HasSHA2 = true; 17895 if (Bits[AArch64::FeatureSHA3]) HasSHA3 = true; 17896 if (Bits[AArch64::FeatureSM4]) HasSM4 = true; 17897 if (Bits[AArch64::FeatureSPE]) HasSPE = true; 17898 if (Bits[AArch64::FeatureSSBS]) HasSSBS = true; 17899 if (Bits[AArch64::FeatureSVE]) HasSVE = true; 17900 if (Bits[AArch64::FeatureSVE2]) HasSVE2 = true; 17901 if (Bits[AArch64::FeatureSVE2AES]) HasSVE2AES = true; 17902 if (Bits[AArch64::FeatureSVE2BitPerm]) HasSVE2BitPerm = true; 17903 if (Bits[AArch64::FeatureSVE2SHA3]) HasSVE2SHA3 = true; 17904 if (Bits[AArch64::FeatureSVE2SM4]) HasSVE2SM4 = true; 17905 if (Bits[AArch64::FeatureSlowMisaligned128Store]) Misaligned128StoreIsSlow = true; 17906 if (Bits[AArch64::FeatureSlowPaired128]) Paired128IsSlow = true; 17907 if (Bits[AArch64::FeatureSlowSTRQro]) STRQroIsSlow = true; 17908 if (Bits[AArch64::FeatureSpecRestrict]) HasSpecRestrict = true; 17909 if (Bits[AArch64::FeatureStrictAlign]) StrictAlign = true; 17910 if (Bits[AArch64::FeatureTLB_RMI]) HasTLB_RMI = true; 17911 if (Bits[AArch64::FeatureTME]) HasTME = true; 17912 if (Bits[AArch64::FeatureTRACEV8_4]) HasTRACEV8_4 = true; 17913 if (Bits[AArch64::FeatureTRBE]) HasTRBE = true; 17914 if (Bits[AArch64::FeatureTaggedGlobals]) AllowTaggedGlobals = true; 17915 if (Bits[AArch64::FeatureUseAA]) UseAA = true; 17916 if (Bits[AArch64::FeatureUseEL1ForTP]) UseEL1ForTP = true; 17917 if (Bits[AArch64::FeatureUseEL2ForTP]) UseEL2ForTP = true; 17918 if (Bits[AArch64::FeatureUseEL3ForTP]) UseEL3ForTP = true; 17919 if (Bits[AArch64::FeatureUseRSqrt]) UseRSqrt = true; 17920 if (Bits[AArch64::FeatureVH]) HasVH = true; 17921 if (Bits[AArch64::FeatureZCRegMove]) HasZeroCycleRegMove = true; 17922 if (Bits[AArch64::FeatureZCZeroing]) HasZeroCycleZeroing = true; 17923 if (Bits[AArch64::FeatureZCZeroingFP]) HasZeroCycleZeroingFP = true; 17924 if (Bits[AArch64::FeatureZCZeroingFPWorkaround]) HasZeroCycleZeroingFPWorkaround = true; 17925 if (Bits[AArch64::FeatureZCZeroingGP]) HasZeroCycleZeroingGP = true; 17926 if (Bits[AArch64::HasV8_1aOps]) HasV8_1aOps = true; 17927 if (Bits[AArch64::HasV8_2aOps]) HasV8_2aOps = true; 17928 if (Bits[AArch64::HasV8_3aOps]) HasV8_3aOps = true; 17929 if (Bits[AArch64::HasV8_4aOps]) HasV8_4aOps = true; 17930 if (Bits[AArch64::HasV8_5aOps]) HasV8_5aOps = true; 17931 if (Bits[AArch64::ProcA35] && ARMProcFamily < CortexA35) ARMProcFamily = CortexA35; 17932 if (Bits[AArch64::ProcA53] && ARMProcFamily < CortexA53) ARMProcFamily = CortexA53; 17933 if (Bits[AArch64::ProcA55] && ARMProcFamily < CortexA55) ARMProcFamily = CortexA55; 17934 if (Bits[AArch64::ProcA57] && ARMProcFamily < CortexA57) ARMProcFamily = CortexA57; 17935 if (Bits[AArch64::ProcA65] && ARMProcFamily < CortexA65) ARMProcFamily = CortexA65; 17936 if (Bits[AArch64::ProcA72] && ARMProcFamily < CortexA72) ARMProcFamily = CortexA72; 17937 if (Bits[AArch64::ProcA73] && ARMProcFamily < CortexA73) ARMProcFamily = CortexA73; 17938 if (Bits[AArch64::ProcA75] && ARMProcFamily < CortexA75) ARMProcFamily = CortexA75; 17939 if (Bits[AArch64::ProcA76] && ARMProcFamily < CortexA76) ARMProcFamily = CortexA76; 17940 if (Bits[AArch64::ProcCyclone] && ARMProcFamily < Cyclone) ARMProcFamily = Cyclone; 17941 if (Bits[AArch64::ProcExynosM1] && ARMProcFamily < ExynosM1) ARMProcFamily = ExynosM1; 17942 if (Bits[AArch64::ProcExynosM2] && ARMProcFamily < ExynosM1) ARMProcFamily = ExynosM1; 17943 if (Bits[AArch64::ProcExynosM3] && ARMProcFamily < ExynosM3) ARMProcFamily = ExynosM3; 17944 if (Bits[AArch64::ProcExynosM4] && ARMProcFamily < ExynosM3) ARMProcFamily = ExynosM3; 17945 if (Bits[AArch64::ProcFalkor] && ARMProcFamily < Falkor) ARMProcFamily = Falkor; 17946 if (Bits[AArch64::ProcKryo] && ARMProcFamily < Kryo) ARMProcFamily = Kryo; 17947 if (Bits[AArch64::ProcNeoverseE1] && ARMProcFamily < NeoverseE1) ARMProcFamily = NeoverseE1; 17948 if (Bits[AArch64::ProcNeoverseN1] && ARMProcFamily < NeoverseN1) ARMProcFamily = NeoverseN1; 17949 if (Bits[AArch64::ProcSaphira] && ARMProcFamily < Saphira) ARMProcFamily = Saphira; 17950 if (Bits[AArch64::ProcTSV110] && ARMProcFamily < TSV110) ARMProcFamily = TSV110; 17951 if (Bits[AArch64::ProcThunderX] && ARMProcFamily < ThunderX) ARMProcFamily = ThunderX; 17952 if (Bits[AArch64::ProcThunderX2T99] && ARMProcFamily < ThunderX2T99) ARMProcFamily = ThunderX2T99; 17953 if (Bits[AArch64::ProcThunderXT81] && ARMProcFamily < ThunderXT81) ARMProcFamily = ThunderXT81; 17954 if (Bits[AArch64::ProcThunderXT83] && ARMProcFamily < ThunderXT83) ARMProcFamily = ThunderXT83; 17955 if (Bits[AArch64::ProcThunderXT88] && ARMProcFamily < ThunderXT88) ARMProcFamily = ThunderXT88;