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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 8940 { AArch64::bsub, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::hsub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::sub_32, AArch64::sub_32, 0, AArch64::subo64_then_sub_32, 0, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::dsub1_then_bsub, AArch64::dsub1_then_hsub, AArch64::dsub1_then_ssub, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_hsub, AArch64::dsub2_then_ssub, AArch64::qsub1_then_bsub, AArch64::qsub1_then_dsub, AArch64::qsub1_then_hsub, AArch64::qsub1_then_ssub, 0, 0, 0, 0, AArch64::qsub2_then_bsub, AArch64::qsub2_then_dsub, AArch64::qsub2_then_hsub, AArch64::qsub2_then_ssub, 0, AArch64::zsub1_then_bsub, AArch64::zsub1_then_dsub, AArch64::zsub1_then_hsub, AArch64::zsub1_then_ssub, AArch64::zsub1_then_zsub, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, AArch64::zsub2_then_zsub, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_qsub1_then_dsub, 0, AArch64::dsub_qsub1_then_dsub_qsub2_then_dsub, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::qsub1_then_dsub_qsub2_then_dsub, 0, 0, 0, AArch64::dsub_zsub1_then_dsub, AArch64::zsub_zsub1_then_zsub, 0, AArch64::dsub_zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub_zsub1_then_zsub_zsub2_then_zsub, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, AArch64::zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub1_then_zsub_zsub2_then_zsub, 0, 0, 0, },
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 1084 static const unsigned SubRegs[] = {AArch64::dsub0, AArch64::dsub1,
3017 SelectLoad(Node, 2, AArch64::LD1Twov8b, AArch64::dsub0);
3023 SelectLoad(Node, 2, AArch64::LD1Twov4h, AArch64::dsub0);
3029 SelectLoad(Node, 2, AArch64::LD1Twov2s, AArch64::dsub0);
3035 SelectLoad(Node, 2, AArch64::LD1Twov1d, AArch64::dsub0);
3044 SelectLoad(Node, 3, AArch64::LD1Threev8b, AArch64::dsub0);
3050 SelectLoad(Node, 3, AArch64::LD1Threev4h, AArch64::dsub0);
3056 SelectLoad(Node, 3, AArch64::LD1Threev2s, AArch64::dsub0);
3062 SelectLoad(Node, 3, AArch64::LD1Threev1d, AArch64::dsub0);
3071 SelectLoad(Node, 4, AArch64::LD1Fourv8b, AArch64::dsub0);
3077 SelectLoad(Node, 4, AArch64::LD1Fourv4h, AArch64::dsub0);
3083 SelectLoad(Node, 4, AArch64::LD1Fourv2s, AArch64::dsub0);
3089 SelectLoad(Node, 4, AArch64::LD1Fourv1d, AArch64::dsub0);
3098 SelectLoad(Node, 2, AArch64::LD2Twov8b, AArch64::dsub0);
3104 SelectLoad(Node, 2, AArch64::LD2Twov4h, AArch64::dsub0);
3110 SelectLoad(Node, 2, AArch64::LD2Twov2s, AArch64::dsub0);
3116 SelectLoad(Node, 2, AArch64::LD1Twov1d, AArch64::dsub0);
3125 SelectLoad(Node, 3, AArch64::LD3Threev8b, AArch64::dsub0);
3131 SelectLoad(Node, 3, AArch64::LD3Threev4h, AArch64::dsub0);
3137 SelectLoad(Node, 3, AArch64::LD3Threev2s, AArch64::dsub0);
3143 SelectLoad(Node, 3, AArch64::LD1Threev1d, AArch64::dsub0);
3152 SelectLoad(Node, 4, AArch64::LD4Fourv8b, AArch64::dsub0);
3158 SelectLoad(Node, 4, AArch64::LD4Fourv4h, AArch64::dsub0);
3164 SelectLoad(Node, 4, AArch64::LD4Fourv2s, AArch64::dsub0);
3170 SelectLoad(Node, 4, AArch64::LD1Fourv1d, AArch64::dsub0);
3179 SelectLoad(Node, 2, AArch64::LD2Rv8b, AArch64::dsub0);
3185 SelectLoad(Node, 2, AArch64::LD2Rv4h, AArch64::dsub0);
3191 SelectLoad(Node, 2, AArch64::LD2Rv2s, AArch64::dsub0);
3197 SelectLoad(Node, 2, AArch64::LD2Rv1d, AArch64::dsub0);
3206 SelectLoad(Node, 3, AArch64::LD3Rv8b, AArch64::dsub0);
3212 SelectLoad(Node, 3, AArch64::LD3Rv4h, AArch64::dsub0);
3218 SelectLoad(Node, 3, AArch64::LD3Rv2s, AArch64::dsub0);
3224 SelectLoad(Node, 3, AArch64::LD3Rv1d, AArch64::dsub0);
3233 SelectLoad(Node, 4, AArch64::LD4Rv8b, AArch64::dsub0);
3239 SelectLoad(Node, 4, AArch64::LD4Rv4h, AArch64::dsub0);
3245 SelectLoad(Node, 4, AArch64::LD4Rv2s, AArch64::dsub0);
3251 SelectLoad(Node, 4, AArch64::LD4Rv1d, AArch64::dsub0);
3597 SelectPostLoad(Node, 2, AArch64::LD2Twov8b_POST, AArch64::dsub0);
3603 SelectPostLoad(Node, 2, AArch64::LD2Twov4h_POST, AArch64::dsub0);
3609 SelectPostLoad(Node, 2, AArch64::LD2Twov2s_POST, AArch64::dsub0);
3615 SelectPostLoad(Node, 2, AArch64::LD1Twov1d_POST, AArch64::dsub0);
3625 SelectPostLoad(Node, 3, AArch64::LD3Threev8b_POST, AArch64::dsub0);
3631 SelectPostLoad(Node, 3, AArch64::LD3Threev4h_POST, AArch64::dsub0);
3637 SelectPostLoad(Node, 3, AArch64::LD3Threev2s_POST, AArch64::dsub0);
3643 SelectPostLoad(Node, 3, AArch64::LD1Threev1d_POST, AArch64::dsub0);
3653 SelectPostLoad(Node, 4, AArch64::LD4Fourv8b_POST, AArch64::dsub0);
3659 SelectPostLoad(Node, 4, AArch64::LD4Fourv4h_POST, AArch64::dsub0);
3665 SelectPostLoad(Node, 4, AArch64::LD4Fourv2s_POST, AArch64::dsub0);
3671 SelectPostLoad(Node, 4, AArch64::LD1Fourv1d_POST, AArch64::dsub0);
3681 SelectPostLoad(Node, 2, AArch64::LD1Twov8b_POST, AArch64::dsub0);
3687 SelectPostLoad(Node, 2, AArch64::LD1Twov4h_POST, AArch64::dsub0);
3693 SelectPostLoad(Node, 2, AArch64::LD1Twov2s_POST, AArch64::dsub0);
3699 SelectPostLoad(Node, 2, AArch64::LD1Twov1d_POST, AArch64::dsub0);
3709 SelectPostLoad(Node, 3, AArch64::LD1Threev8b_POST, AArch64::dsub0);
3715 SelectPostLoad(Node, 3, AArch64::LD1Threev4h_POST, AArch64::dsub0);
3721 SelectPostLoad(Node, 3, AArch64::LD1Threev2s_POST, AArch64::dsub0);
3727 SelectPostLoad(Node, 3, AArch64::LD1Threev1d_POST, AArch64::dsub0);
3737 SelectPostLoad(Node, 4, AArch64::LD1Fourv8b_POST, AArch64::dsub0);
3743 SelectPostLoad(Node, 4, AArch64::LD1Fourv4h_POST, AArch64::dsub0);
3749 SelectPostLoad(Node, 4, AArch64::LD1Fourv2s_POST, AArch64::dsub0);
3755 SelectPostLoad(Node, 4, AArch64::LD1Fourv1d_POST, AArch64::dsub0);
3765 SelectPostLoad(Node, 1, AArch64::LD1Rv8b_POST, AArch64::dsub0);
3771 SelectPostLoad(Node, 1, AArch64::LD1Rv4h_POST, AArch64::dsub0);
3777 SelectPostLoad(Node, 1, AArch64::LD1Rv2s_POST, AArch64::dsub0);
3783 SelectPostLoad(Node, 1, AArch64::LD1Rv1d_POST, AArch64::dsub0);
3793 SelectPostLoad(Node, 2, AArch64::LD2Rv8b_POST, AArch64::dsub0);
3799 SelectPostLoad(Node, 2, AArch64::LD2Rv4h_POST, AArch64::dsub0);
3805 SelectPostLoad(Node, 2, AArch64::LD2Rv2s_POST, AArch64::dsub0);
3811 SelectPostLoad(Node, 2, AArch64::LD2Rv1d_POST, AArch64::dsub0);
3821 SelectPostLoad(Node, 3, AArch64::LD3Rv8b_POST, AArch64::dsub0);
3827 SelectPostLoad(Node, 3, AArch64::LD3Rv4h_POST, AArch64::dsub0);
3833 SelectPostLoad(Node, 3, AArch64::LD3Rv2s_POST, AArch64::dsub0);
3839 SelectPostLoad(Node, 3, AArch64::LD3Rv1d_POST, AArch64::dsub0);
3849 SelectPostLoad(Node, 4, AArch64::LD4Rv8b_POST, AArch64::dsub0);
3855 SelectPostLoad(Node, 4, AArch64::LD4Rv4h_POST, AArch64::dsub0);
3861 SelectPostLoad(Node, 4, AArch64::LD4Rv2s_POST, AArch64::dsub0);
3867 SelectPostLoad(Node, 4, AArch64::LD4Rv1d_POST, AArch64::dsub0);
lib/Target/AArch64/AArch64InstrInfo.cpp 2567 static const unsigned Indices[] = {AArch64::dsub0, AArch64::dsub1,
2577 static const unsigned Indices[] = {AArch64::dsub0, AArch64::dsub1,
2587 static const unsigned Indices[] = {AArch64::dsub0, AArch64::dsub1};
lib/Target/AArch64/AArch64SIMDInstrOpt.cpp 647 case AArch64::dsub0:
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 1275 if (unsigned FirstReg = MRI.getSubReg(Reg, AArch64::dsub0))