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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10729 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<16, AArch64::ZPR_4bRegClassID>());
10738 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<32, AArch64::ZPR_4bRegClassID>());
10747 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<64, AArch64::ZPR_4bRegClassID>());
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6513 static const MCOperandInfo OperandInfo112[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6611 static const MCOperandInfo OperandInfo210[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6631 static const MCOperandInfo OperandInfo230[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3478 { ZPR_4b, ZPR_4bBits, 1000, 16, sizeof(ZPR_4bBits), AArch64::ZPR_4bRegClassID, 1, true },
7386 &AArch64MCRegisterClasses[ZPR_4bRegClassID],
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1045 case AArch64::ZPR_4bRegClassID: