|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10423 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::LSL, 16, false>());
10432 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::LSL, 32, false>());
10441 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::LSL, 64, false>());
10450 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::LSL, 8, false>());
10459 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 16, false>());
10468 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 32, false>());
10477 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 64, false>());
10486 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, false>());
10495 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, true>());
10504 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 16, false>());
10513 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 32, false>());
10522 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 64, false>());
10531 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 8, false>());
10540 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<32, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 8, true>());
10549 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::LSL, 16, false>());
10558 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::LSL, 32, false>());
10567 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::LSL, 64, false>());
10576 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::LSL, 8, false>());
10585 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 16, false>());
10594 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 32, false>());
10603 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 64, false>());
10612 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, false>());
10621 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::SXTW, 8, true>());
10630 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 16, false>());
10639 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 32, false>());
10648 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 64, false>());
10657 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 8, false>());
10666 DiagnosticPredicate DP(Operand.isSVEDataVectorRegWithShiftExtend<64, AArch64::ZPRRegClassID, AArch64_AM::UXTW, 8, true>());
10675 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<128, AArch64::ZPRRegClassID>());
10684 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<16, AArch64::ZPRRegClassID>());
10693 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<32, AArch64::ZPRRegClassID>());
10756 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<64, AArch64::ZPRRegClassID>());
10765 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<8, AArch64::ZPRRegClassID>());
10774 DiagnosticPredicate DP(Operand.isSVEDataVectorRegOfWidth<0, AArch64::ZPRRegClassID>());
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15286 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15295 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15304 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15480 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15492 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15504 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15516 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15528 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15542 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15556 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15570 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15584 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15598 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15612 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15626 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15640 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15652 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15664 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15676 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15887 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15899 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15935 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15947 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15983 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15995 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16023 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16032 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16041 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16050 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16059 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16068 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16079 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16089 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16097 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16111 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16119 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16133 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16141 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16155 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16167 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16179 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16191 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16203 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16205 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16215 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16217 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16227 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16229 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16239 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16241 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16251 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16253 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16263 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16265 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16275 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16277 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16287 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16289 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16299 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16301 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16311 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16313 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16415 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16424 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16433 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16470 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16482 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16494 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16506 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16516 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16526 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16536 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16540 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16552 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16556 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16568 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16572 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16584 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16588 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16600 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16604 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16616 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16620 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16632 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16636 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16648 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16652 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16664 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16668 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16680 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16684 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16696 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16700 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16712 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16716 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16728 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16732 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16744 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16748 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16760 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16764 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16776 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16780 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16792 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16796 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16808 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16812 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16824 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16828 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16840 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16844 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16856 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16860 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16872 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16876 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16888 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16892 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16904 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16908 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17049 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17061 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17097 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17109 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17145 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17157 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17287 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17303 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17319 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17335 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17351 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17471 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17487 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17503 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17623 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17639 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17655 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17671 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17687 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17703 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17719 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17735 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17751 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17767 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17783 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17799 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17815 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17831 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17847 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17863 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17879 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17895 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17911 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17927 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18047 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18063 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18079 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18095 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18111 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18127 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18351 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18367 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19806 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19821 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19836 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19851 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19866 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19881 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19896 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19911 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19926 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19941 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19956 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19971 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19986 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20001 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20016 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20031 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20060 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20076 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20092 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20108 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20124 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20140 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20156 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20172 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20188 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20204 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20220 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20236 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20252 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20268 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20284 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20300 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20391 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20407 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20411 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20422 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20426 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20437 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20453 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20457 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20468 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20484 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20488 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20499 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20503 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20514 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20518 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20529 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20533 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20544 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20548 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20559 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20563 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20574 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20578 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20589 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20605 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20609 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
20620 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20624 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21187 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22258 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22267 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22276 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22287 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22289 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22329 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22357 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22371 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22399 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22413 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22441 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22492 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22520 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22791 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22795 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22807 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22811 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22823 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22827 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22839 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22843 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22987 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22999 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23063 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23075 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23139 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23151 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23267 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23279 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23343 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23355 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23419 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23431 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23443 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23447 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23459 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23463 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23475 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23479 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23491 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23495 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23507 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23511 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23523 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23527 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23539 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23543 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23555 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23571 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23587 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23603 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23619 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23739 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23755 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23771 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24099 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24115 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24979 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24995 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24999 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25010 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25014 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25025 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25041 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25045 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25056 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25072 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25076 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25087 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25091 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25102 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25118 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25122 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25133 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25137 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25507 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26319 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26331 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26391 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26403 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26463 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26475 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26583 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26595 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26655 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26667 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26727 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
26739 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc16002 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16011 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16020 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16196 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16208 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16220 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16232 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16244 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16258 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16272 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16286 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16300 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16314 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16328 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16342 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16356 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16368 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16380 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16392 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16603 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16615 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16651 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16663 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16699 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16711 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16739 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16748 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16757 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16766 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16775 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16784 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16795 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16805 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16813 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16827 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16835 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16849 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16857 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16871 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16883 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16895 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16907 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16919 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16921 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16931 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16933 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16943 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16945 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16955 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16957 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16967 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16969 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16979 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16981 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16991 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16993 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17003 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17005 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17015 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17017 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17027 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17029 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17131 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17140 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17149 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17186 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17198 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17210 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17222 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17232 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17242 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17252 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17256 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17268 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17272 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17284 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17288 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17300 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17304 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17316 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17320 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17332 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17336 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17348 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17352 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17364 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17368 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17380 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17384 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17396 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17400 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17412 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17416 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17428 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17432 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17444 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17448 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17460 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17464 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17476 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17480 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17492 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17496 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17508 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17512 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17524 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17528 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17540 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17544 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17556 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17560 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17572 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17576 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17588 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17592 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17604 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17608 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17620 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17624 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17765 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17777 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17813 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17825 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17861 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17873 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18003 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18019 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18035 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18051 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18067 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18187 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18203 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18219 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18339 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18355 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18371 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18387 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18403 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18419 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18435 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18451 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18467 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18483 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18499 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18515 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18531 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18547 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18563 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18579 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18595 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18611 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18627 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18643 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18763 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18779 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18795 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18811 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18827 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
18843 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19067 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
19083 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20522 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20537 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20552 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20567 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20582 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20597 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20612 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20627 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20642 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20657 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20672 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20687 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20702 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20717 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20732 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20747 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20776 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20792 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20808 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20824 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20840 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20856 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20872 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20888 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20904 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20920 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20936 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20952 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20968 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
20984 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21000 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21016 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21107 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21123 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21127 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21138 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21142 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21153 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21169 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21173 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21184 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21200 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21204 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21215 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21219 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21230 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21234 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21245 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21249 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21260 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21264 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21275 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21279 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21290 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21294 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21305 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21321 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21325 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21336 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
21340 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21903 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22974 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22983 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22992 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23003 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23005 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23045 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23073 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23087 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23115 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23129 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23157 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23208 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23236 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23507 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23511 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23523 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23527 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23539 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23543 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23555 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23559 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23703 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23715 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23779 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23791 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23855 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23867 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23983 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23995 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24059 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24071 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24135 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24147 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24159 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24163 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24175 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24179 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24191 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24195 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24207 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24211 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24223 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24227 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24239 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24243 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24255 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24259 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
24271 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24287 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24303 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24319 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24335 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24455 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24471 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24487 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24815 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
24831 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25695 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25711 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25715 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25726 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25730 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25741 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25757 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25761 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25772 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25788 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25792 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25803 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25807 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25818 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25834 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25838 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
25849 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
25853 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(2).getReg()) &&
26223 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27035 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27047 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27107 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27119 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27179 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27191 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27299 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27311 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27371 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27383 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27443 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
27455 MRI.getRegClass(AArch64::ZPRRegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc11144 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11145 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11158 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11159 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11172 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11173 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11186 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11187 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11200 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11201 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11214 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11215 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11228 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11229 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11242 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11243 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11256 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11257 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11270 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11271 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11284 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11285 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
11298 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
11299 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12058 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12059 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12072 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12073 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12086 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12087 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12100 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12101 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12114 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12115 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12128 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12129 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12142 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12143 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12156 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12157 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12170 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12171 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12184 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12185 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12198 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12199 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12212 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12213 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12791 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12792 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12805 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12806 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12819 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12820 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12833 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12834 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12847 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12848 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12861 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12862 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12875 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12876 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12889 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12890 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12903 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12904 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12917 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12918 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12931 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12932 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
12945 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
12946 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13151 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13152 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13165 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13166 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13179 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13180 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13193 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13194 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13207 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13208 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
13221 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
13222 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
38512 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
38513 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
38514 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::ZPRRegClassID,
38556 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
38557 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
38558 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::ZPRRegClassID,
38585 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/AArch64::ZPRRegClassID,
38586 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/AArch64::ZPRRegClassID,
38587 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/AArch64::ZPRRegClassID,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6439 static const MCOperandInfo OperandInfo38[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6439 static const MCOperandInfo OperandInfo38[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6439 static const MCOperandInfo OperandInfo38[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6442 static const MCOperandInfo OperandInfo41[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6442 static const MCOperandInfo OperandInfo41[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6442 static const MCOperandInfo OperandInfo41[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6442 static const MCOperandInfo OperandInfo41[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6446 static const MCOperandInfo OperandInfo45[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6446 static const MCOperandInfo OperandInfo45[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6446 static const MCOperandInfo OperandInfo45[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6450 static const MCOperandInfo OperandInfo49[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6450 static const MCOperandInfo OperandInfo49[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6450 static const MCOperandInfo OperandInfo49[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6470 static const MCOperandInfo OperandInfo69[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6470 static const MCOperandInfo OperandInfo69[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6473 static const MCOperandInfo OperandInfo72[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6473 static const MCOperandInfo OperandInfo72[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6473 static const MCOperandInfo OperandInfo72[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6475 static const MCOperandInfo OperandInfo74[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6475 static const MCOperandInfo OperandInfo74[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6480 static const MCOperandInfo OperandInfo79[] = { { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6481 static const MCOperandInfo OperandInfo80[] = { { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6482 static const MCOperandInfo OperandInfo81[] = { { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6483 static const MCOperandInfo OperandInfo82[] = { { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6486 static const MCOperandInfo OperandInfo85[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6486 static const MCOperandInfo OperandInfo85[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6487 static const MCOperandInfo OperandInfo86[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6487 static const MCOperandInfo OperandInfo86[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6488 static const MCOperandInfo OperandInfo87[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6488 static const MCOperandInfo OperandInfo87[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6502 static const MCOperandInfo OperandInfo101[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6502 static const MCOperandInfo OperandInfo101[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6502 static const MCOperandInfo OperandInfo101[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6513 static const MCOperandInfo OperandInfo112[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6513 static const MCOperandInfo OperandInfo112[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6513 static const MCOperandInfo OperandInfo112[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6514 static const MCOperandInfo OperandInfo113[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6514 static const MCOperandInfo OperandInfo113[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6514 static const MCOperandInfo OperandInfo113[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6515 static const MCOperandInfo OperandInfo114[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6515 static const MCOperandInfo OperandInfo114[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6515 static const MCOperandInfo OperandInfo114[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6515 static const MCOperandInfo OperandInfo114[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6516 static const MCOperandInfo OperandInfo115[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6517 static const MCOperandInfo OperandInfo116[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6518 static const MCOperandInfo OperandInfo117[] = { { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6519 static const MCOperandInfo OperandInfo118[] = { { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6520 static const MCOperandInfo OperandInfo119[] = { { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6521 static const MCOperandInfo OperandInfo120[] = { { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6524 static const MCOperandInfo OperandInfo123[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6525 static const MCOperandInfo OperandInfo124[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6525 static const MCOperandInfo OperandInfo124[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6531 static const MCOperandInfo OperandInfo130[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6531 static const MCOperandInfo OperandInfo130[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6532 static const MCOperandInfo OperandInfo131[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6532 static const MCOperandInfo OperandInfo131[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6533 static const MCOperandInfo OperandInfo132[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6533 static const MCOperandInfo OperandInfo132[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6534 static const MCOperandInfo OperandInfo133[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6534 static const MCOperandInfo OperandInfo133[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6535 static const MCOperandInfo OperandInfo134[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6535 static const MCOperandInfo OperandInfo134[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6536 static const MCOperandInfo OperandInfo135[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6536 static const MCOperandInfo OperandInfo135[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6537 static const MCOperandInfo OperandInfo136[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6537 static const MCOperandInfo OperandInfo136[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6538 static const MCOperandInfo OperandInfo137[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6538 static const MCOperandInfo OperandInfo137[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6539 static const MCOperandInfo OperandInfo138[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6549 static const MCOperandInfo OperandInfo148[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6549 static const MCOperandInfo OperandInfo148[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6550 static const MCOperandInfo OperandInfo149[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6551 static const MCOperandInfo OperandInfo150[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6552 static const MCOperandInfo OperandInfo151[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6553 static const MCOperandInfo OperandInfo152[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6558 static const MCOperandInfo OperandInfo157[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6567 static const MCOperandInfo OperandInfo166[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6567 static const MCOperandInfo OperandInfo166[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6567 static const MCOperandInfo OperandInfo166[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6572 static const MCOperandInfo OperandInfo171[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6573 static const MCOperandInfo OperandInfo172[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6573 static const MCOperandInfo OperandInfo172[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6573 static const MCOperandInfo OperandInfo172[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6573 static const MCOperandInfo OperandInfo172[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6581 static const MCOperandInfo OperandInfo180[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6581 static const MCOperandInfo OperandInfo180[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6604 static const MCOperandInfo OperandInfo203[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6604 static const MCOperandInfo OperandInfo203[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6608 static const MCOperandInfo OperandInfo207[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6608 static const MCOperandInfo OperandInfo207[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6608 static const MCOperandInfo OperandInfo207[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6608 static const MCOperandInfo OperandInfo207[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6610 static const MCOperandInfo OperandInfo209[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6610 static const MCOperandInfo OperandInfo209[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6610 static const MCOperandInfo OperandInfo209[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6611 static const MCOperandInfo OperandInfo210[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6611 static const MCOperandInfo OperandInfo210[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6611 static const MCOperandInfo OperandInfo210[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6631 static const MCOperandInfo OperandInfo230[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6631 static const MCOperandInfo OperandInfo230[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_4bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6632 static const MCOperandInfo OperandInfo231[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6632 static const MCOperandInfo OperandInfo231[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6633 static const MCOperandInfo OperandInfo232[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6633 static const MCOperandInfo OperandInfo232[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6634 static const MCOperandInfo OperandInfo233[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6634 static const MCOperandInfo OperandInfo233[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6636 static const MCOperandInfo OperandInfo235[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6636 static const MCOperandInfo OperandInfo235[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6636 static const MCOperandInfo OperandInfo235[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6638 static const MCOperandInfo OperandInfo237[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6639 static const MCOperandInfo OperandInfo238[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6640 static const MCOperandInfo OperandInfo239[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6641 static const MCOperandInfo OperandInfo240[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6642 static const MCOperandInfo OperandInfo241[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6643 static const MCOperandInfo OperandInfo242[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6644 static const MCOperandInfo OperandInfo243[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6644 static const MCOperandInfo OperandInfo243[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6645 static const MCOperandInfo OperandInfo244[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6645 static const MCOperandInfo OperandInfo244[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6646 static const MCOperandInfo OperandInfo245[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6646 static const MCOperandInfo OperandInfo245[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6647 static const MCOperandInfo OperandInfo246[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6647 static const MCOperandInfo OperandInfo246[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6648 static const MCOperandInfo OperandInfo247[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6648 static const MCOperandInfo OperandInfo247[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6649 static const MCOperandInfo OperandInfo248[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6649 static const MCOperandInfo OperandInfo248[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::FPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6655 static const MCOperandInfo OperandInfo254[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6656 static const MCOperandInfo OperandInfo255[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6657 static const MCOperandInfo OperandInfo256[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64commonRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6658 static const MCOperandInfo OperandInfo257[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6694 static const MCOperandInfo OperandInfo293[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6701 static const MCOperandInfo OperandInfo300[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6701 static const MCOperandInfo OperandInfo300[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6737 static const MCOperandInfo OperandInfo336[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6751 static const MCOperandInfo OperandInfo350[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6752 static const MCOperandInfo OperandInfo351[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6771 static const MCOperandInfo OperandInfo370[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6771 static const MCOperandInfo OperandInfo370[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6771 static const MCOperandInfo OperandInfo370[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6783 static const MCOperandInfo OperandInfo382[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6823 static const MCOperandInfo OperandInfo422[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6823 static const MCOperandInfo OperandInfo422[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3476 { ZPR, ZPRBits, 288, 32, sizeof(ZPRBits), AArch64::ZPRRegClassID, 1, true },
7362 &AArch64MCRegisterClasses[ZPRRegClassID],
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1043 case AArch64::ZPRRegClassID:
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 1291 if (MRI.getRegClass(AArch64::ZPRRegClassID).contains(Reg))