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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 5088 extern const TargetRegisterClass ZPRRegClass;
References
gen/lib/Target/AArch64/AArch64GenFastISel.inc 620 return fastEmitInst_r(AArch64::DUP_ZR_B, &AArch64::ZPRRegClass, Op0, Op0IsKill);
627 return fastEmitInst_r(AArch64::DUP_ZR_H, &AArch64::ZPRRegClass, Op0, Op0IsKill);
634 return fastEmitInst_r(AArch64::DUP_ZR_S, &AArch64::ZPRRegClass, Op0, Op0IsKill);
663 return fastEmitInst_r(AArch64::DUP_ZR_D, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1482 return fastEmitInst_r(AArch64::SUNPKHI_ZZ_H, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1491 return fastEmitInst_r(AArch64::SUNPKHI_ZZ_S, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1500 return fastEmitInst_r(AArch64::SUNPKHI_ZZ_D, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1520 return fastEmitInst_r(AArch64::SUNPKLO_ZZ_H, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1529 return fastEmitInst_r(AArch64::SUNPKLO_ZZ_S, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1538 return fastEmitInst_r(AArch64::SUNPKLO_ZZ_D, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1596 return fastEmitInst_r(AArch64::UUNPKHI_ZZ_H, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1605 return fastEmitInst_r(AArch64::UUNPKHI_ZZ_S, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1614 return fastEmitInst_r(AArch64::UUNPKHI_ZZ_D, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1634 return fastEmitInst_r(AArch64::UUNPKLO_ZZ_H, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1643 return fastEmitInst_r(AArch64::UUNPKLO_ZZ_S, &AArch64::ZPRRegClass, Op0, Op0IsKill);
1652 return fastEmitInst_r(AArch64::UUNPKLO_ZZ_D, &AArch64::ZPRRegClass, Op0, Op0IsKill);
6234 return fastEmitInst_rr(AArch64::FADD_ZZZ_H, &AArch64::ZPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6243 return fastEmitInst_rr(AArch64::FADD_ZZZ_S, &AArch64::ZPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
6252 return fastEmitInst_rr(AArch64::FADD_ZZZ_D, &AArch64::ZPRRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 6307 &AArch64::ZPRRegClass,
6312 &AArch64::ZPRRegClass,
8232 &AArch64::ZPRRegClass,
lib/Target/AArch64/AArch64AsmPrinter.cpp 612 RC = &AArch64::ZPRRegClass;
636 if (AArch64::ZPRRegClass.contains(Reg)) {
637 RegClass = &AArch64::ZPRRegClass;
lib/Target/AArch64/AArch64ISelLowering.cpp 173 addRegisterClass(MVT::nxv16i8, &AArch64::ZPRRegClass);
174 addRegisterClass(MVT::nxv8i16, &AArch64::ZPRRegClass);
175 addRegisterClass(MVT::nxv4i32, &AArch64::ZPRRegClass);
176 addRegisterClass(MVT::nxv2i64, &AArch64::ZPRRegClass);
178 addRegisterClass(MVT::nxv2f16, &AArch64::ZPRRegClass);
179 addRegisterClass(MVT::nxv4f16, &AArch64::ZPRRegClass);
180 addRegisterClass(MVT::nxv8f16, &AArch64::ZPRRegClass);
181 addRegisterClass(MVT::nxv1f32, &AArch64::ZPRRegClass);
182 addRegisterClass(MVT::nxv2f32, &AArch64::ZPRRegClass);
183 addRegisterClass(MVT::nxv4f32, &AArch64::ZPRRegClass);
184 addRegisterClass(MVT::nxv1f64, &AArch64::ZPRRegClass);
185 addRegisterClass(MVT::nxv2f64, &AArch64::ZPRRegClass);
3223 RC = &AArch64::ZPRRegClass;
5987 return std::make_pair(0U, &AArch64::ZPRRegClass);
lib/Target/AArch64/AArch64InstrInfo.cpp 2534 if (AArch64::ZPRRegClass.contains(DestReg) &&
2535 AArch64::ZPRRegClass.contains(SrcReg)) {