reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
18746         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
18762         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
18778         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
18989         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
24404         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
24420         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
24436         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
24543         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
19462         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
19478         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
19494         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
19705         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
25120         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
25136         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
25152         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
25259         MRI.getRegClass(AArch64::ZPR3RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
 6681 static const MCOperandInfo OperandInfo280[] = { { AArch64::ZPR3RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64commonRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
 6682 static const MCOperandInfo OperandInfo281[] = { { AArch64::ZPR3RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc
 3494   { ZPR3, ZPR3Bits, 17, 32, sizeof(ZPR3Bits), AArch64::ZPR3RegClassID, 1, true },
 7578     &AArch64MCRegisterClasses[ZPR3RegClassID],
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
 1266            MRI.getRegClass(AArch64::ZPR3RegClassID).contains(Reg) ||