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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc18435 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
18451 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
18467 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
18678 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24183 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24199 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24229 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24336 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc19151 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
19167 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
19183 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
19394 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24899 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24915 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
24945 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
25052 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6558 static const MCOperandInfo OperandInfo157[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6677 static const MCOperandInfo OperandInfo276[] = { { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64commonRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6678 static const MCOperandInfo OperandInfo277[] = { { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6783 static const MCOperandInfo OperandInfo382[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6823 static const MCOperandInfo OperandInfo422[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPR2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3483 { ZPR2, ZPR2Bits, 12, 32, sizeof(ZPR2Bits), AArch64::ZPR2RegClassID, 1, true },
7446 &AArch64MCRegisterClasses[ZPR2RegClassID],
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 1262 MRI.getRegClass(AArch64::ZPR2RegClassID).contains(Reg) ||