|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9301 DiagnosticPredicate DP(Operand.isSVEPredicateVectorRegOfWidth<16, AArch64::PPRRegClassID>());
9310 DiagnosticPredicate DP(Operand.isSVEPredicateVectorRegOfWidth<32, AArch64::PPRRegClassID>());
9364 DiagnosticPredicate DP(Operand.isSVEPredicateVectorRegOfWidth<64, AArch64::PPRRegClassID>());
9373 DiagnosticPredicate DP(Operand.isSVEPredicateVectorRegOfWidth<8, AArch64::PPRRegClassID>());
9382 DiagnosticPredicate DP(Operand.isSVEPredicateVectorRegOfWidth<0, AArch64::PPRRegClassID>());
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc15224 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15226 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15228 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15270 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15272 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15274 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15482 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15494 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15506 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15518 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15642 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15654 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15666 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15678 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16353 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16355 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16357 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16399 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
16401 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16403 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16472 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16484 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16496 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21173 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22172 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22174 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22242 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22244 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22532 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22544 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22556 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22568 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22580 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22592 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22604 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22616 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22775 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22777 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22779 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
22793 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22809 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22825 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22841 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
25493 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15940 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15942 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15944 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
15986 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
15988 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
15990 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16198 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16210 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16222 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16234 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
16358 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16370 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16382 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
16394 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17069 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17071 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17073 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17115 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
17117 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
17119 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17188 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17200 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
17212 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
21889 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22888 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22890 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
22958 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
22960 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23248 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23260 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23272 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23284 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23296 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23308 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23320 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23332 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23491 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
23493 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23495 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(2).getReg()) &&
23509 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23525 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23541 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
23557 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(1).getReg()) &&
26209 MRI.getRegClass(AArch64::PPRRegClassID).contains(MI->getOperand(0).getReg()) &&
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc 6479 static const MCOperandInfo OperandInfo78[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6479 static const MCOperandInfo OperandInfo78[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6479 static const MCOperandInfo OperandInfo78[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6479 static const MCOperandInfo OperandInfo78[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6498 static const MCOperandInfo OperandInfo97[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6498 static const MCOperandInfo OperandInfo97[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6498 static const MCOperandInfo OperandInfo97[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6499 static const MCOperandInfo OperandInfo98[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6499 static const MCOperandInfo OperandInfo98[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6499 static const MCOperandInfo OperandInfo98[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6499 static const MCOperandInfo OperandInfo98[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6500 static const MCOperandInfo OperandInfo99[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6500 static const MCOperandInfo OperandInfo99[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6500 static const MCOperandInfo OperandInfo99[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6500 static const MCOperandInfo OperandInfo99[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6524 static const MCOperandInfo OperandInfo123[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6525 static const MCOperandInfo OperandInfo124[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6530 static const MCOperandInfo OperandInfo129[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6530 static const MCOperandInfo OperandInfo129[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6532 static const MCOperandInfo OperandInfo131[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6539 static const MCOperandInfo OperandInfo138[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6548 static const MCOperandInfo OperandInfo147[] = { { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6549 static const MCOperandInfo OperandInfo148[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6572 static const MCOperandInfo OperandInfo171[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPR_3bRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6581 static const MCOperandInfo OperandInfo180[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6736 static const MCOperandInfo OperandInfo335[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6748 static const MCOperandInfo OperandInfo347[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6750 static const MCOperandInfo OperandInfo349[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6750 static const MCOperandInfo OperandInfo349[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6750 static const MCOperandInfo OperandInfo349[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6758 static const MCOperandInfo OperandInfo357[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6758 static const MCOperandInfo OperandInfo357[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6759 static const MCOperandInfo OperandInfo358[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
6771 static const MCOperandInfo OperandInfo370[] = { { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::ZPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6842 static const MCOperandInfo OperandInfo441[] = { { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
6843 static const MCOperandInfo OperandInfo442[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
6844 static const MCOperandInfo OperandInfo443[] = { { AArch64::PPRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc 3439 { PPR, PPRBits, 284, 16, sizeof(PPRBits), AArch64::PPRRegClassID, 1, true },
6918 &AArch64MCRegisterClasses[PPRRegClassID],
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 1048 case AArch64::PPRRegClassID:
3928 auto PPRRegClass = AArch64MCRegisterClasses[AArch64::PPRRegClassID];