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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc19339 { 6370 /* umaddl */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, },
19461 { 6490 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, AMFBS_None, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, },
26697 { 6370 /* umaddl */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_GPR64, MCK_GPR32, MCK_GPR32, MCK_GPR64 }, },
26819 { 6490 /* umull */, AArch64::UMADDLrrr, Convert__Reg1_0__Reg1_1__Reg1_2__regXZR, AMFBS_None, { MCK_GPR64, MCK_GPR32, MCK_GPR32 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc26168 case AArch64::UMADDLrrr:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc26884 case AArch64::UMADDLrrr:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc65563 /*159774*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
65605 /*159857*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
65688 /*160019*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
65721 /*160075*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
92678 /*210962*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
92689 /*210983*/ OPC_MorphNodeTo1, TARGET_VAL(AArch64::UMADDLrrr), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 1377 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
1461 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
1519 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
1577 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
5318 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
5362 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::UMADDLrrr,
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9065 case AArch64::UMADDLrrr:
lib/Target/AArch64/AArch64A53Fix835769.cpp 65 case AArch64::UMADDLrrr:
lib/Target/AArch64/AArch64FastISel.cpp 4074 return fastEmitInst_rrr(AArch64::UMADDLrrr, &AArch64::GPR64RegClass,