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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18621 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0641_0__IndexRange0_11_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18622 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0641_0__IndexRange0_11_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18629 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_11_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18630 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_11_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25979 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0641_0__IndexRange0_11_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25980 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_3__TypedVectorList4_0641_0__IndexRange0_11_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK_TypedVectorList4_064, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25987 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_11_2__Tie0_5_5__regXZR, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25988 { 5311 /* st4 */, AArch64::ST4i64_POST, Convert__Reg1_4__VecListFour1281_1__IndexRange0_11_2__Tie0_5_5__Reg1_6, AMFBS_HasNEON, { MCK__DOT_d, MCK_VecListFour128, MCK_IndexRange0_1, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc24789 case AArch64::ST4i64_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc25505 case AArch64::ST4i64_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc13008 case AArch64::ST4i64_POST: {
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4180 SelectPostStoreLane(Node, 4, AArch64::ST4i64_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 675 { AArch64::ST4i64_POST, "st4", ".d", 1, true, 32 },