reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
18161   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
18162   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18189   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
18190   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25519   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
25520   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_2__TypedVectorList2_1641_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList2_164, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25547   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_16 }, },
25548   { 5234 /* st1 */, AArch64::ST1Twov1d_POST, Convert__Reg1_3__VecListTwo641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_1d, MCK_VecListTwo64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc
24005   case AArch64::ST1Twov1d_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
24721   case AArch64::ST1Twov1d_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
12812     case AArch64::ST1Twov1d_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 3975       SelectPostStore(Node, 2, AArch64::ST1Twov1d_POST);
 4059       SelectPostStore(Node, 2, AArch64::ST1Twov1d_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
  591   { AArch64::ST1Twov1d_POST,    "st1",  ".1d",    1, false, 16 },