|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18153 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18154 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18219 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
18220 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25511 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25512 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_2__TypedVectorList3_4321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_432, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25577 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_48 }, },
25578 { 5234 /* st1 */, AArch64::ST1Threev4s_POST, Convert__Reg1_3__VecListThree1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VecListThree128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc23953 case AArch64::ST1Threev4s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc24669 case AArch64::ST1Threev4s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12808 case AArch64::ST1Threev4s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4085 SelectPostStore(Node, 3, AArch64::ST1Threev4s_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 602 { AArch64::ST1Threev4s_POST, "st1", ".4s", 1, false, 48 },