|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18149 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18150 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18203 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
18204 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25507 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25508 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_2__TypedVectorList3_2321_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList3_232, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25561 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_24 }, },
25562 { 5234 /* st1 */, AArch64::ST1Threev2s_POST, Convert__Reg1_3__VecListThree641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VecListThree64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc23927 case AArch64::ST1Threev2s_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc24643 case AArch64::ST1Threev2s_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12806 case AArch64::ST1Threev2s_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4082 SelectPostStore(Node, 3, AArch64::ST1Threev2s_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 606 { AArch64::ST1Threev2s_POST, "st1", ".2s", 1, false, 24 },