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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18121 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
18122 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18231 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
18232 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25479 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
25480 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_2__TypedVectorList4_8161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_816, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25589 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_64 }, },
25590 { 5234 /* st1 */, AArch64::ST1Fourv8h_POST, Convert__Reg1_3__VecListFour1281_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VecListFour128, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc23723 case AArch64::ST1Fourv8h_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc24439 case AArch64::ST1Fourv8h_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12794 case AArch64::ST1Fourv8h_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4108 SelectPostStore(Node, 4, AArch64::ST1Fourv8h_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 617 { AArch64::ST1Fourv8h_POST, "st1", ".8h", 1, false, 64 },