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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18115 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18116 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
18207 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
18208 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25473 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4161_0__Tie0_3_3__regXZR, AMFBS_HasNEON, { MCK_TypedVectorList4_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25474 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_2__TypedVectorList4_4161_0__Tie0_3_3__Reg1_4, AMFBS_HasNEON, { MCK_TypedVectorList4_416, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
25565 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__regXZR, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK__HASH_32 }, },
25566 { 5234 /* st1 */, AArch64::ST1Fourv4h_POST, Convert__Reg1_3__VecListFour641_1__Tie0_4_4__Reg1_5, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VecListFour64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_GPR64 }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc23684 case AArch64::ST1Fourv4h_POST:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc24400 case AArch64::ST1Fourv4h_POST:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc12791 case AArch64::ST1Fourv4h_POST:
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp 4105 SelectPostStore(Node, 4, AArch64::ST1Fourv4h_POST);
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 621 { AArch64::ST1Fourv4h_POST, "st1", ".4h", 1, false, 32 },